Taratos (type 1 hypervisor OS) | Operating System Development | Page 2

upper trout Jul 7, 2026, 2:46 PM

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search the #define :^)

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in the kvm selftests

brisk saddle Jul 7, 2026, 2:50 PM

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jesus

upper trout Jul 7, 2026, 5:17 PM

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i should write tests more often tbf

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i caught so many stupid bugs by just bothering to write some test code

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now i get it why 60% of infy's code is just tests

low notch Jul 7, 2026, 5:34 PM

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Literally this

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Untested code is broken code goes a long way

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Especially when it comes to regressions after refactoring

civic estuary Jul 7, 2026, 5:34 PM

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How do you test code again

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Do you run on Linux

low notch Jul 7, 2026, 5:35 PM

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For kernel I just compile parts of it in userspace

low notch Jul 7, 2026, 5:35 PM

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civic estuary Do you run on Linux

Yes

civic estuary Jul 7, 2026, 5:35 PM

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I don't really like unit tests for something like a kernel

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I think it's useless

upper trout Jul 7, 2026, 5:35 PM

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low notch Untested code is broken code goes a long way

all my err branches are untested trl

low notch Jul 7, 2026, 5:35 PM

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I will have mature integration tests when the kernel itself is more mature

civic estuary Jul 7, 2026, 5:35 PM

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I'd rather have integration tests like Linux that run on the system idk

low notch Jul 7, 2026, 5:35 PM

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civic estuary I think it's useless

How lol

civic estuary Jul 7, 2026, 5:36 PM

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I just feel like unit tests often make you write tests just for the sake of writing tests

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And u end up testing useless things that you know will work anyway

low notch Jul 7, 2026, 5:36 PM

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Hmm ill have to disagree

civic estuary Jul 7, 2026, 5:36 PM

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My way of testing is just torturing all the subsystems at once and see if something breaks

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Like fireworks

low notch Jul 7, 2026, 5:37 PM

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Unit tests can cover every edge case in a simple easy to reproduce and quick to run manner

civic estuary Jul 7, 2026, 5:37 PM

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Can you give me an example

low notch Jul 7, 2026, 5:37 PM

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E.g. checking a virtual allocator rbteee range collapsing logic

civic estuary Jul 7, 2026, 5:37 PM

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Yeah but like

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If you check that once

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When you write it

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No point in keeping the tests

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idk

low notch Jul 7, 2026, 5:37 PM

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Thats actually very wrong

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If you never touch any code again then sure, but this sort of thing gives you a piece of mind when doing big refactos or optimizations or rewrites later down the line

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Id say regressions are even more important to test for

mystic zealot Jul 7, 2026, 5:38 PM

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i should try to implement unit tests for my os too

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lol

civic estuary Jul 7, 2026, 5:39 PM

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low notch If you never touch any code again then sure, but this sort of thing gives you a ...

But then that'll show up in integration tests

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Not unit tests

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I agree that tests are useful, I just believe that it is not really useful to unit test something like a kernel where everything is intertwined, I do have unit tests for my library (rtl) though, but the rest will be tested through integration stress tests like most kernels

low notch Jul 7, 2026, 5:44 PM

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Integration tests are for testing integrations between components, they show you whether all APIs talk to each other correctly etc etc. But unit tests allow you to test components in isolation, and deterministically construct artificial edge cases or internal states are very hard to reach under normal circumstances

civic estuary Jul 7, 2026, 5:44 PM

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mhm maybe

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I like in general putting asserts everywhere too

low notch Jul 7, 2026, 5:45 PM

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Imo both types are very important , you cant say one is useless and one isn't etc

upper trout Jul 7, 2026, 8:38 PM

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first time in my life i use the into and bound instructions

brisk saddle Jul 7, 2026, 8:41 PM

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upper trout first time in my life i use the `into` and `bound` instructions

honestly bound seems actually useful for certain loop shit if it set a CPU flag instead of an exception mmLol

upper trout Jul 7, 2026, 8:41 PM

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i think it does

brisk saddle Jul 7, 2026, 8:41 PM

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Protected Mode Exceptions ¶
#BR If the bounds test fails.

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compilers could optmise loops with bounds checks so easily

low notch Jul 7, 2026, 8:46 PM

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upper trout first time in my life i use the `into` and `bound` instructions

What did you use them for

upper trout Jul 7, 2026, 8:46 PM

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im writing a test case for every exception

low notch Jul 7, 2026, 8:46 PM

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Ah

upper trout Jul 7, 2026, 8:46 PM

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along with some edge cases (double faults, triple faults, not intercepting a contibutory exception but intercepting the second one, etc)

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the api they have for kvm selftests is so nice meme

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it's the sloppiest code you will find in the entire kernel

pale mesa Jul 7, 2026, 8:48 PM

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slop as in sloppy or ai slop

upper trout Jul 7, 2026, 8:48 PM

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slop as in slop

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i had to patch a few things for my tests to be possible

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because they don't test compatibility mode at all

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so i introduced a new helper and unstaticated the ones that already existed

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the patch is around ~500 loc of added code rn

low notch Jul 7, 2026, 8:50 PM

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Can you port kvm tests to your kernel?

upper trout Jul 7, 2026, 8:50 PM

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if you implement the api, sure

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they run in userspace

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i don't know if anything internal is tested

low notch Jul 7, 2026, 8:51 PM

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Are you going to support kvm api?

upper trout Jul 7, 2026, 8:51 PM

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maybe in 30 years trl

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idk, having the api sounds useful to me only if you want to port qemu

low notch Jul 7, 2026, 8:53 PM

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Yeah

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Well modern VMware also

upper trout Jul 7, 2026, 8:54 PM

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i see

brisk saddle Jul 8, 2026, 12:55 AM

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@upper trout Pog

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This person has commits to Linux on GitHub aswell

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This could be good

odd topaz Jul 8, 2026, 6:13 AM

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I just realized that the broken bit that causes the GenuineIotel string is the LSB in ECX when returned by cpuid
I might be confusing the byte order but this is an interesting coincidence
@brisk saddle

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This might be an issue in CPU-Z or something? Could also be an intermittent fault because we don't have any documentation about it persisting

brisk saddle Jul 8, 2026, 6:19 AM

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odd topaz This might be an issue in CPU-Z or something? Could also be an intermittent faul...

There are tools other than CPU-z that report this no?

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Eg steam and the intlastx report

odd topaz Jul 8, 2026, 6:19 AM

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True, forgot about those

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I wonder if this is some cpu bug that can only be triggered under very specific conditions and that's why we haven't seen any complaints about it anywhere.

brisk saddle Jul 8, 2026, 6:22 AM

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odd topaz I wonder if this is some cpu bug that can only be triggered under very specific ...

Or that atleast on windows it just dosnt cause any issues

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And it's just there silently

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I have two people who said they could have sworn they have seen it before aswell

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And on Linux it would probably only disable a few things

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And not break things wholesale

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Depending on the severity

upper trout Jul 8, 2026, 7:12 AM

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brisk saddle <@576071248933683250> <:Pog:798106400634961950>

Poggers

upper trout Jul 8, 2026, 10:53 AM

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ugh

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int3, into, cause traps

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but for these 2 instructions specifically, svm saves the rip pointing to the instructions

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nooo

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not a big problem, will save the pc of these instructions in the kvm run area

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i already made a new field after the error code for a payload (for these instructions,the payload is the pc, for #pf, the cr2, for #db, the dr6, etc)

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ngl if this patch doesnt get in i will be fuming

upper trout Jul 8, 2026, 4:09 PM

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remember the kvm prefix for forcing emulation

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it's complete garbage like the comment says

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the cpu gets very confused and puts the rip much after the ud2 (so, the kvm instruction emulator cannot gather correctly the instruction to emulate)

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at least the xen prefix gets assembled to something the cpu can execute even if it doesnt make sense to humans

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sucks tbh, i dont know how to test whether the #ud filter doesn't clash with a #ud of an instruction that kvm can emulate

upper trout Jul 9, 2026, 10:41 AM

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maybe today the stars are aligned

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i managed to force kvm to emulate the insn

low notch Jul 9, 2026, 10:48 AM

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why do u need that?

upper trout Jul 9, 2026, 10:51 AM

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several handlers (#db, #bp, #ud, #gp, #pf) are hooked by default

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well, pf not exactly, only if youre not using nested paging

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and i want to make sure that the exception filters dont break the default logic

low notch Jul 9, 2026, 10:53 AM

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Are you going to support nested btw

upper trout Jul 9, 2026, 10:53 AM

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exceptions from nested guests?

low notch Jul 9, 2026, 10:53 AM

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Just nested guests in general

upper trout Jul 9, 2026, 10:54 AM

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in what context

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the kvm patch?

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or my os when i start working on it again

low notch Jul 9, 2026, 10:55 AM

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Yes

upper trout Jul 9, 2026, 10:55 AM

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hmm

low notch Jul 9, 2026, 10:55 AM

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upper trout or my os when i start working on it again

This

upper trout Jul 9, 2026, 10:55 AM

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in the very far future ig

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the biggest trouble is paging

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you have to emulate it

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well, not exactly paging, but nested paging

low notch Jul 9, 2026, 10:57 AM

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Cant nested guests use nested paging also?

upper trout Jul 9, 2026, 10:58 AM

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yes, but the nested page tables are only 1

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the nested guest can use paging with no problem

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but, if the nested hypervisor sets up its own nested page tables for its guest, you have to emulate them

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make the nested hypervisor think it has its own nested page tables, but in reality the topmost hypervisor manages them, and you fault on demand to fill them

low notch Jul 9, 2026, 11:00 AM

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Ah

upper trout Jul 9, 2026, 11:01 AM

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kvm neatly handles this problem tbh

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its mm subsystem (which is arch dependent) is generic enough to be able to handle ept/npt, and even when those are not available

low notch Jul 9, 2026, 11:01 AM

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Yeah its pretty well organized

upper trout Jul 9, 2026, 11:02 AM

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btw some korean dude a month ago discovered a 0 day in that code

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which allows guests to escape the vm

low notch Jul 9, 2026, 11:06 AM

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Yeah I saw that

upper trout Jul 9, 2026, 4:01 PM

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i am going to cry

pale mesa Jul 9, 2026, 4:02 PM

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:(

upper trout Jul 9, 2026, 4:02 PM

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if you intercept a #pf, the cr2 is not written in the guest cr2, but in the exit information

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and when you queue an exception in kvm, you have to indicate the vector, error code, and payload

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in the case of #pf, the payload is the cr2 value that will be written

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the problem is that kvm calls the function for processing the payloads in the ioctls for getting the special registers (crX included)

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so the state you read for the #pf fault is not exactly correct

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i think i am going to ignore this problem

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the problem i am having right now is that consecutive intercepted #pf do not contribute to a #df

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which is done by kvm but for some reason it's not happening

upper trout Jul 9, 2026, 4:09 PM

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upper trout the problem i am having right now is that consecutive intercepted #pf do not con...

when you intercept an exception, you get information as well on whether the exception has occurred during delivery of another exception

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however, this is not happening consistently

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my setup is the following:

zero out offset to #pf handler in the idt
cause a #pf

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first you get a #pf, then you get another #pf because the handler is not mapped, so it gets transformed to a #df

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between the time i inject the first intercepted #pf and the time the second #pf occurs, the "hey mr kvm, this #pf happened during delivery of #pf" is gone because of a bunch of vmexits

low notch Jul 9, 2026, 4:18 PM

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What are you doing exactly rn

upper trout Jul 9, 2026, 4:18 PM

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working on the patch

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trying to get double faults working, when the exceptions that cause them are intercepted too

low notch Jul 9, 2026, 4:19 PM

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Ah

upper trout Jul 9, 2026, 4:31 PM

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fucking nested page faults chad

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theyre the ones that are making kvm forget theres an exception happening during delivery of an exception

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well, the vmexit reason can also be anything other than that

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now i have to think how to make this work

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hmm, actually not, the nested page faults still have that information

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the moment i get the second #pf that info is gone

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in short, when i get the second #pf the cpu and therefore kvm forgets that it has happened because of another #pf, and kvm can't inject a #df to the guest

upper trout Jul 9, 2026, 4:56 PM

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i'm not sure there is a way to fix this problem

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the essence of the problem is that i have to know whether the cpu has started executing from the exception handler, or whether to morph it to a #df

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and that sounds complicated to figure out

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moreover, this only applies to #pf, because the handler is unmapped, what is the code segment is not present? or the idt entry is invalid? or whatever else
i have the same problem but with the #np/#gp/#whatever exceptions

upper trout Jul 9, 2026, 7:36 PM

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i think i have probably corrupted the kernel (a lil bit only)

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the cpu correctly includes the previous exception information on the 428th page fault

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time to activate all nuclear kconfig options

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oh god... why was WARN_ON_ONCE not enabled

upper trout Jul 9, 2026, 8:38 PM

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yeah, according to claude and gemini, if you inject an exception and there is an exception while trying to deliver it, the information is recorded

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so no idea why tf it is zeroed and only made available after this comical amount of page faults

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im probably missing something in the overcomplicated way interrupts are delivered

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i will look into it tomorrow, atp ive been struggling for 5 hours

brisk saddle Jul 9, 2026, 8:41 PM

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upper trout i will look into it tomorrow, atp ive been struggling for 5 hours

You could also leave double fault stuff as a TODO?

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This is still valuable to properly have anyways for other faults

upper trout Jul 9, 2026, 8:42 PM

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well, yeah

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double faults are rare

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btw how do u have 70k messages lmao

brisk saddle Jul 9, 2026, 8:45 PM

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upper trout btw how do u have 70k messages lmao

upper trout Jul 9, 2026, 8:46 PM

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how do you see this info

brisk saddle Jul 9, 2026, 8:46 PM

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It was last year's discord checkpoint thing

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im trying to get a bit higher of a ranking this year

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PSP1G_pspTrollar

pale mesa Jul 9, 2026, 8:47 PM

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you don't get it if you have data collection stuff disabled

low notch Jul 9, 2026, 8:47 PM

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upper trout btw how do u have 70k messages lmao

How do you know

brisk saddle Jul 9, 2026, 8:47 PM

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you can just enable it when it happens and then it pops up

upper trout Jul 9, 2026, 8:47 PM

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low notch How do you know

search by:evalyn

brisk saddle Jul 9, 2026, 8:47 PM

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low notch How do you know

low notch Jul 9, 2026, 8:47 PM

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upper trout search by:evalyn

Why did you even search that lol

upper trout Jul 9, 2026, 8:47 PM

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idk

jade prawn Jul 9, 2026, 8:48 PM

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damn ev you have over 2x as many messages as me and I've been here for way longer

upper trout Jul 9, 2026, 8:48 PM

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i have 55k

pale mesa Jul 9, 2026, 8:48 PM

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brisk saddle you can just enable it when it happens and then it pops up

so they still collect data :^)

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who would've thunk

upper trout Jul 9, 2026, 8:48 PM

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and ive been here since 2020

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well, tbh, most of the time i was not active

brisk saddle Jul 9, 2026, 8:48 PM

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jade prawn damn ev you have over 2x as many messages as me and I've been here for way longe...

It's called having nothing to do all day

upper trout Jul 9, 2026, 8:48 PM

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i was mostly present in 2021

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the other years i have max 500 messages

low notch Jul 9, 2026, 8:49 PM

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The og gdt days

civic estuary Jul 9, 2026, 8:49 PM

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Pretty sure atie taught me how to do gdt lol

upper trout Jul 9, 2026, 8:49 PM

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it's highkey insane to see how much the hobby osdev space has improved

civic estuary Jul 9, 2026, 8:49 PM

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Back in 2020 when I didn't know anything

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I don't want to go back and look at those messages tho

brisk saddle Jul 9, 2026, 8:50 PM

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lowk

upper trout Jul 9, 2026, 8:50 PM

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my most legendary message is this

brisk saddle Jul 9, 2026, 8:50 PM

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when i first joined

civic estuary Jul 9, 2026, 8:50 PM

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too embarrassing

brisk saddle Jul 9, 2026, 8:50 PM

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i was so fucking dumb

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😭

upper trout Jul 9, 2026, 8:50 PM

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#osdev-beginner-0 message

low notch Jul 9, 2026, 8:50 PM

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Lmfao

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Beginner in long mode

brisk saddle Jul 9, 2026, 8:51 PM

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maybe i wasnt that bad mmLol

civic estuary Jul 9, 2026, 8:51 PM

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I can't see that message

upper trout Jul 9, 2026, 8:51 PM

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tbh i spent 9 months to that point only writing real mode brainrot

civic estuary Jul 9, 2026, 8:51 PM

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Where is it

upper trout Jul 9, 2026, 8:51 PM

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archive access

upper trout Jul 9, 2026, 8:51 PM

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upper trout tbh i spent 9 months to that point only writing real mode brainrot

and not very advanced really

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the most i have done is int 0x10 hello world

civic estuary Jul 9, 2026, 8:52 PM

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Ah lol I remember I stole your naming convention

jade prawn Jul 9, 2026, 8:52 PM

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upper trout tbh i spent 9 months to that point only writing real mode brainrot

I got the real mode brainrot out of the way by making bootsector snake and then just using a sane bootloader. Long live the days of Limine version it would've been like 2 or something, and Stivale2

upper trout Jul 9, 2026, 8:52 PM

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real ogs remember qloader

civic estuary Jul 9, 2026, 8:52 PM

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qloader2

brisk saddle Jul 9, 2026, 8:52 PM

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honestly somtimes i feel a little out of place considering i got here so late

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But I'm glad you are all my friends

low notch Jul 9, 2026, 8:53 PM

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I think you learned pretty fast tho

brisk saddle Jul 9, 2026, 8:53 PM

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Yeah

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Though I still have some moments where my brain likes to be slow 😭

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But once I understand something I can get going fast

upper trout Jul 9, 2026, 8:55 PM

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eh

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in a few months you got your os in multiple arches, in that same time i was struggling to understand why my crap real mode os worked on windows qemu and my usb and not in linux qemu KEKW

civic estuary Jul 9, 2026, 8:56 PM

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tbf the resources have improved so much

brisk saddle Jul 9, 2026, 8:56 PM

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A big thing I learnt from my first one was to not rush myself and to take breaks

civic estuary Jul 9, 2026, 8:56 PM

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like back then we were all mediocre helping others to be medicore

brisk saddle Jul 9, 2026, 8:56 PM

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My os has been coming up more slower but it's gonna be nice

low notch Jul 9, 2026, 8:57 PM

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upper trout in a few months you got your os in multiple arches, in that same time i was stru...

What was the issue

brisk saddle Jul 9, 2026, 8:57 PM

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Especially once I finish all of the refactors I want to and get it to a place in really happy to

upper trout Jul 9, 2026, 8:57 PM

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low notch What was the issue

me using hardcoded values for ah=0x02 int 0x13 which i had copied from tutorial oses

low notch Jul 9, 2026, 8:57 PM

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Lol

upper trout Jul 9, 2026, 8:59 PM

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civic estuary tbf the resources have improved so much

well, apart from limine and mlibc existing, and this community providing proper guidance i don't think the resources are better

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i think we just got more used to read books and real oses

brisk saddle Jul 9, 2026, 8:59 PM

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Limine is also something somebody else would have made

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Even if it took longer

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Like Multiboot3 or some crap

upper trout Jul 9, 2026, 8:59 PM

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most ppl were using multi boot with a long mode trampoline

brisk saddle Jul 9, 2026, 9:00 PM

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In the year 3694 but still

civic estuary Jul 9, 2026, 9:00 PM

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upper trout well, apart from limine and mlibc existing, and this community providing proper ...

We are less idiots is what I meant

upper trout Jul 9, 2026, 9:00 PM

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no one had thought of making a bootloader with a custom protocol

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i think the main reason mint started qloader is because grub didn't work with freebsd

civic estuary Jul 9, 2026, 9:00 PM

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So it's easier to guide beginners

low notch Jul 9, 2026, 9:01 PM

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Also beginner osses are now full vibecoded gui and doom ports instead of gdt init

brisk saddle Jul 9, 2026, 9:01 PM

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I do wonder if there are other osdev communities outside of this circle / the forums / the other discords we don't talk about

low notch Jul 9, 2026, 9:01 PM

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Irc but thats mostly dead

upper trout Jul 9, 2026, 9:01 PM

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the biggest one is probably the french osdev

brisk saddle Jul 9, 2026, 9:01 PM

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low notch Also beginner osses are now full vibecoded gui and doom ports instead of gdt ini...

I mean we still get GDT init okays

upper trout Jul 9, 2026, 9:01 PM

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idk if it exists still

brisk saddle Jul 9, 2026, 9:01 PM

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Actually slightly wild story

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A person on reddit with a vibe coded GDT init okay thing

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They leaked their API keys in the repo

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So I joined their discord to tell them

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I met two other friends

civic estuary Jul 9, 2026, 9:02 PM

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upper trout idk if it exists still

It's pretty much dead sadly

brisk saddle Jul 9, 2026, 9:02 PM

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And by that chain of reactions I ended up coming here

civic estuary Jul 9, 2026, 9:02 PM

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Only a few messages per week

low notch Jul 9, 2026, 9:02 PM

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brisk saddle And by that chain of reactions I ended up coming here

Lol

upper trout Jul 9, 2026, 9:02 PM

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there is also open osdev trl

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we should make closed osdev

civic estuary Jul 9, 2026, 9:03 PM

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I think the only other big community is irc

low notch Jul 9, 2026, 9:03 PM

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We are the open osdev since we force source for every project

brisk saddle Jul 9, 2026, 9:03 PM

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upper trout we should make closed osdev

I mean

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There are splinter groups from here

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That are private

upper trout Jul 9, 2026, 9:03 PM

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yeah ik

civic estuary Jul 9, 2026, 9:03 PM

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there's also unmapped stack's community I think

brisk saddle Jul 9, 2026, 9:04 PM

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civic estuary there's also unmapped stack's community I think

That and nanobyte and racistosdev

civic estuary Jul 9, 2026, 9:05 PM

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Those servers are funny

upper trout Jul 9, 2026, 9:05 PM

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there also used to be low level development for teenagers trl

civic estuary Jul 9, 2026, 9:05 PM

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Is that still a thing

brisk saddle Jul 9, 2026, 9:06 PM

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civic estuary Those servers are funny

its just a place for people i .!naenae to mald

upper trout Jul 9, 2026, 9:06 PM

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it seems it still exists

civic estuary Jul 9, 2026, 9:06 PM

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They all died after covid I feel

upper trout Jul 9, 2026, 9:06 PM

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i should leave that server since im not a teenager anymore nooo

civic estuary Jul 9, 2026, 9:06 PM

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french osdev and lldt

brisk saddle Jul 9, 2026, 9:08 PM

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i dont like the idea of a server for teens

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seems like a quick way to get pedos infesting it

upper trout Jul 10, 2026, 8:30 AM

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why is reading from the trace pipe make linux panic on null deref 😭😭😭

jolly timber Jul 10, 2026, 11:24 AM

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upper trout why is reading from the trace pipe make linux panic on null deref 😭😭😭

it dosent?

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i tried reading from it

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nothing happened

brisk saddle Jul 10, 2026, 11:26 AM

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jolly timber it dosent?

they are modifying it lol for kvm

jolly timber Jul 10, 2026, 11:26 AM

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brisk saddle they are modifying it lol for kvm

i mean im on kernel 7.0.13 or sum, is it happening on a newer kernel?

brisk saddle Jul 10, 2026, 11:27 AM

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They are modifying the Linux kernel

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To get better information out of KVM for interrupts

jolly timber Jul 10, 2026, 11:27 AM

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cool

brisk saddle Jul 10, 2026, 11:27 AM

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For QEMU logs

upper trout Jul 10, 2026, 4:11 PM

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this is so fucking odd

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always after the 426th injection, the cpu realizes the #pf is because of a #pf, and then kvm is able to inject a #df instead

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what is the chance this is a nested bug

low notch Jul 10, 2026, 4:19 PM

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Its a decent chance because nested has been very buggy since its inception

upper trout Jul 10, 2026, 4:20 PM

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do u know a way to test this shit in real hw easily

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something like virtme-ng but makes something bootable and runnable

low notch Jul 10, 2026, 4:22 PM

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Well installing a custom kernel and rebooting into it is not very hard

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But debugging it if it dies is harder

upper trout Jul 10, 2026, 4:26 PM

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well, yes

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but if i want to install that custom kernel, id also have to build like 600 unrelated modules

low notch Jul 10, 2026, 4:28 PM

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That takes maybe like 10 minutes on a decent PC

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Just copy your distro config

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And you need to do it once

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Then later rebuilds can keep the same stuff

upper trout Jul 10, 2026, 4:28 PM

#

😵‍💫

#

okie

upper trout Jul 10, 2026, 7:14 PM

#

cry (just a little)

#

not a nested bug

low notch Jul 10, 2026, 7:21 PM

#

Lol

upper trout Jul 10, 2026, 7:44 PM

#

time to go nuclear and dump all register state on enter and exit

upper trout Jul 10, 2026, 7:47 PM

#

upper trout why is reading from the trace pipe make linux panic on null deref 😭😭😭

this was a linux bug btw

#

wrote a quick patch, got a reply and it's getting in soon chad

#

upper trout Jul 10, 2026, 8:53 PM

#

im giving up this shit

#

i am going to work on my project again

low notch Jul 10, 2026, 8:54 PM

#

What's the issue atm

upper trout Jul 10, 2026, 8:54 PM

#

so the way this works is like this

#

i set intercepts for all exceptions

#

most exceptions are not intercepted by default by kvm, only a few are (#db for guest debugging, nmi unmasking, #bp for guest debugging, #ud for some meme, #gp for some nested virt memes and vmware ioport, #pf if not using nested paging)

#

^ actual list depends on whether you're using svm/vmx, from now on, assume svm

#

for those exceptions that are not used by kvm for some internal reason, the action is to enqueue the same exception (this means that, before the next entry, inject the exception [write a field in the vmcb so that the cpu automatically starts servicing an exception])

#

for the other exceptions, i take care to distinguish whether the reason the exception is intercepted for an internal reason or because the user wishes so

#

when you vmexit because of an exception intercept, there is a possibility you have intercepted an exception during the delivery of another exception

#

example: say you intercept page fault exceptions, and the handler for some exception is unmapped

#

let's suppose you trigger a #gp and the handler is unmapped

#

so, you'd vmexit because you intercept #pf

#

and the cpu will also tell you that you have intercepted #pf during the delivery of a #gp

#

kvm handles this correctly, it will enqueue the #gp, and then when my exit handler for #pf enqueues a #pf, it will see that the last exception is a #gp and will change the #pf -> #df

#

what happens now if i intercept #pf, i have the handler for #pf unmapped, and cause a #pf

#

the logical and correct course of action is the following:
----- vmenter -----
mov rax, [unmapped1]
----- vmexit: #pf -----

enqueue #pf back into guest
----- vmenter -----
service #pf, get a #pf while doing so
----- vmexit: #pf during delivery of #pf -----
enqueue #pf
enqueue #pf -> last exception is #pf -> actually enqueue #df
----- vmenter -----
service #df

#

what actually happens:

#

----- vmenter -----
mov rax, [unmapped]
----- vmexit: #pf ------
[repeat 4 times:
----- vmenter -----

service #pf
----- vmexit #npf while delivery of #pf -----
^ the nested page fault happens because it's trying to read the idt, trying to read where the handler is....
]
----- vmenter -----
service #pf: handler is unmapped
----- vmexit: #pf -----

#

see where the problem is?

#

there is NO "while delivering #pf" in the second #pf

#

so the cpu starts looping and vmentering/vmexiting from page faults

#

because if the cpu doesn't say so, kvm doesn't know "while delivering a #pf", so it can't inject a #df

#

and the odd thing is that ALWAYS in the 426th intercept, the cpu finally decides to put that information

#

and then it correctly injects a #df and etc

#

so yeah , i think i am going to better spend my time if i start working again in my os

#

i have a dream (running linux with passed through devices)

upper trout Jul 10, 2026, 9:16 PM

#

upper trout and then it correctly injects a #df and etc

so, if the user had no knowledge of the intercepts, this wouldn't be a problem

#

maybe you would see some extreme latency when getting double page faults

#

but it's specially annoying if you set -d int in qemu and get hit with 52937484930228 page faults with the same register state

brisk saddle Jul 10, 2026, 9:18 PM

#

upper trout but it's specially annoying if you set -d int in qemu and get hit with 529374849...

I mean, qemu could technically de duplicate these from the log right?

upper trout Jul 10, 2026, 9:18 PM

#

i feel that's an ad hoc solution

brisk saddle Jul 10, 2026, 9:19 PM

#

upper trout and the odd thing is that ALWAYS in the 426th intercept, the cpu finally decides...

And if it's always you can always just do a // HACK mmLol

brisk saddle Jul 10, 2026, 9:19 PM

#

upper trout i feel that's an ad hoc solution

Fair but are there other ways arround it?

upper trout Jul 10, 2026, 9:19 PM

#

i haven't tested other combinations of exceptions for double faults

#

but #pf -> #pf is very problematic, as you see

brisk saddle Jul 10, 2026, 9:20 PM

#

If you get page faults constantly in a row buffer them until it could be a df or something else mmLol

low notch Jul 10, 2026, 9:20 PM

#

Does it really have to be perfect for the initial series?

upper trout Jul 10, 2026, 9:21 PM

#

i feel i will be clowned if it's not good enough and there's problems like these

brisk saddle Jul 10, 2026, 9:22 PM

#

upper trout i feel i will be clowned if it's not good enough and there's problems like these

I mean the iotel issue wasn't clowned on

#

You just have to justify it

#

And then they will either say it's fine or it needs more work

upper trout Jul 10, 2026, 9:22 PM

#

yeah ig

#

does anyone else here have an amd system

low notch Jul 10, 2026, 9:23 PM

#

I do but im a bit far away from my PC atm

upper trout Jul 10, 2026, 9:24 PM

#

dw

#

tomorrow or any other day

low notch Jul 10, 2026, 9:26 PM

#

Im afraid im away for a bit longer lol, out of town with the gf

upper trout Jul 10, 2026, 9:27 PM

#

respectable and based tbh

brisk saddle Jul 10, 2026, 9:31 PM

#

I do, I could test in a little bit if you give an ISO

upper trout Jul 10, 2026, 9:35 PM

#

iso not really

#

install virtme-ng

#

i will send you patches and what to clone, tomorrow though

upper trout Jul 11, 2026, 10:35 PM

#

@clear agate do you happen to know if there is something odd in svm when injecting an exception, and the delivery of that exception causes another exception?

upper trout Jul 11, 2026, 10:35 PM

#

upper trout when you vmexit because of an exception intercept, there is a possibility you ha...

read this

clear agate Jul 11, 2026, 10:46 PM

#

nothing comes to mind, the triggering of another exception should be forward progress, there's nothing particularly wrong with triggering an exception when trying to process one (thats going to double or triple fault fault though), though I'd have to check the manual to see if the exit gets triggered as the new exception (if you have the exit control set) or doublefault...I suspect the new exception would exit first before it becomes a doublefault and now you need to deal with that. But based on what you wrote I dont know what the situation you're asking about specifically is

upper trout Jul 11, 2026, 10:55 PM

#

okay

#

let me be more clear because i think i vomited yesterday a word salad

#

it's a bit hard to explain

#

----- gap -----

#

suppose i have the following setup:

#pf intercepted
in the guest, an instruction which causes a #pf, and a valid idt entry for #pf, but the handler is unmapped

#

the only reason i intercept #pf is for tracing purposes, i am not doing anything special with it because npt is setup, so the only thing that is done in the intercept handler is to inject back the #pf

clear agate Jul 11, 2026, 10:58 PM

#

ok, so this presumably will lead to another pf

upper trout Jul 11, 2026, 10:58 PM

#

yes

#

when the instruction is executed, it causes a #pf

#

it is injected back, and the guest should exit again, with reason #pf and informing that it has been caused during delivery of #pf

clear agate Jul 11, 2026, 10:59 PM

#

but you cant respond to that with a pf legititmetly

upper trout Jul 11, 2026, 10:59 PM

#

upper trout it is injected back, and the guest should exit again, with reason #pf and inform...

and then i should inject a #df instead

clear agate Jul 11, 2026, 10:59 PM

#

maybe?

upper trout Jul 11, 2026, 10:59 PM

#

i mean, yes

#

if you get a #pf while handling a #pf then you get a #df

clear agate Jul 11, 2026, 11:00 PM

#

yes...so what is the issue

#

aka why have you interrupted my factorio session

upper trout Jul 11, 2026, 11:00 PM

#

sorry 😭

#

the issue is that, when you vmexit, the cpu tells you the reason (#pf intercept), and if the intercept has happened during delivery of an exception

clear agate Jul 11, 2026, 11:01 PM

#

ok

upper trout Jul 11, 2026, 11:01 PM

#

so i should get basically

exit reason: #pf interception
exit_int_info: during delivery of #pf

#

the problem is

#

exit_int_info is 0?

#

and the cpu proceeds to loop 426 times exactly, it exiting only saying that a #pf has been intercepted and me injecting it back, until it finally fills the exit_int_info and then i am able to inject a #df and continue as normal

#

i am just asking you whether you have heard anything weird going on with exception injections in svm

#

if not then dw, i will try to debug even harder and you can keep playing factorio letsgo

#

the reason i am messing with shit like this is because i am trying to implement -d int for kvm (only the exceptions part)

clear agate Jul 11, 2026, 11:07 PM

#

exactly 426 times sounds more like some state somewhere is changing

upper trout Jul 11, 2026, 11:08 PM

#

yeah, it's very weird

#

the only exits that happen are for the #pf intercept and some #npfs, which i presume are for trying to resolve the physical address for the idt and the page tables possibly mapping the handler at address 0

upper trout Jul 11, 2026, 11:10 PM

#

upper trout and the cpu proceeds to loop 426 times exactly, it exiting only saying that a #p...

i confirmed that this is not a kvm nested bug

brisk saddle Jul 11, 2026, 11:11 PM

#

upper trout if not then dw, i will try to debug even harder and you can keep playing factori...

JW plays factorio?

clear agate Jul 11, 2026, 11:12 PM

#

try it on vmware maybe, but it makes me suspicious if youre not injecting the right shit back in, the notes in the apm around this arent entirely clear (or simple)

#

but no, I wouldnt be surprised to find out you never get the signal that it was during an idt processing, but getting the signal eventually...doesnt sound very amd

#

(it does sound very intel)

upper trout Jul 11, 2026, 11:13 PM

#

doesn't sound very AMD?

#

ah okay lol

#

hmmm, I am sure i am injecting it correctly, there's a tracepoint for it in kvm

clear agate Jul 11, 2026, 11:14 PM

#

injecting what exactly though

#

you need to inject the df appropriately

upper trout Jul 11, 2026, 11:14 PM

#

the #pf when i intercept the #pf

#

yeah, but I can't

#

because svm is not telling me that i got a #pf during the delivery of a #pf

#

it's missing the last part 426 times

#

so i am constantly looping and reinjecting the #pf until i finally get the info

clear agate Jul 11, 2026, 11:17 PM

#

that still makes me wonder if you injected somethign wrong then, cause it doesntmake sense, what are the other fields showing, i.e. did the faulting address change or not

upper trout Jul 11, 2026, 11:18 PM

#

hmmm

#

i know that kvm is very weird with regards to that

clear agate Jul 11, 2026, 11:18 PM

#

yeah, could be getting fucked by weird kvm shit, try a differnt hypervisor too

upper trout Jul 11, 2026, 11:19 PM

#

when you queue an exception for injection, you can associate with it a payload

#

for the case of #pf, it's a cr2

#

so basically, when you queue the exception (which i do after work exiting), the next time kvm is about to enter, it will inject the #pf and write the value to cr2

clear agate Jul 11, 2026, 11:20 PM

#

yeah, I"m more focused on the exit info atm, that would tell us if you properly are making forward progress. Alternatively maybe dig deeper into kvm to find exactly what you are writing into the hardware

upper trout Jul 11, 2026, 11:20 PM

#

the weird thing is that this action (which kvm calls payload processing) is also done when you use the ioctl for getting the crX registers

clear agate Jul 11, 2026, 11:20 PM

#

dont care what kvm is doing, you asked a svm question

upper trout Jul 11, 2026, 11:20 PM

#

i have also tried to not get the state of the register, but the same shit happens

clear agate Jul 11, 2026, 11:20 PM

#

up to you to isolate if kvm could be getting in the way here

upper trout Jul 11, 2026, 11:22 PM

#

okay

#

will do that

upper trout Jul 11, 2026, 11:23 PM

#

clear agate yeah, could be getting fucked by weird kvm shit, try a differnt hypervisor too

the thing is, im patching kvm

#

so idk how that will help

#

i am going to try doing the same thing in my os, now that i have svm running in it

clear agate Jul 11, 2026, 11:23 PM

#

well good luck, make sure kvm isnt trying to run its instruction emulator

upper trout Jul 11, 2026, 11:23 PM

#

upper trout i am going to try doing the same thing in my os, now that i have svm running in ...

and see if the same 426 times looping shit happens

clear agate Jul 11, 2026, 11:23 PM

#

that might be how it's escaping its loop btw

upper trout Jul 11, 2026, 11:24 PM

#

hmm, i see

#

thank you for your insight

#

i will keep you informed

clear agate Jul 11, 2026, 11:24 PM

#

also if youre attached to qemu make sure it didnt get kicked into user to resolve

upper trout Jul 11, 2026, 11:26 PM

#

well, the ultimate purpose is to support -d int with kvm, but i am not using qemu to test the changes

#

the modified kernel and kvm runs in qemu but i am testing my changes with the kvm selftests api

clear agate Jul 11, 2026, 11:26 PM

#

so you have your own thing running kvm ioctls then, ok, still make sure it didnt run the kvm emulator, it probably isnt but kvm is weird

upper trout Jul 11, 2026, 11:27 PM

#

👍

#

does vmware have something similar?

#

to -d int

#

if it does, then it's 100% a skill issue of mine/kvm issue

#

or vmware is using some galaxybrain tricks

clear agate Jul 12, 2026, 12:46 AM

#

it does but I dont remember the config options, https://williamlam.com/2010/10/1200-undocumented-vmx-parameters.html has a bunch listed, there's something like an exception bitmap somewhere

WilliamLam.com

1200+ undocumented .vmx parameters

Recently while performing some skunkworks testing in my personal lab, I came across a slew of documented and undocumented virtual machine .vmx configuration parameters. Using one of my favorite UNI…

#

log.somethingsomethingsomething

clear agate Jul 12, 2026, 1:53 AM

#

brisk saddle JW plays factorio?

I just took out a big demolisher worm with nothing but gun turrets, and crapped on this channel with off topic nonsense. Now if there's someone to ban this day will be perfect

brisk saddle Jul 12, 2026, 1:54 AM

#

clear agate I just took out a big demolisher worm with nothing but gun turrets, and crapped ...

Fuck yeah

#

That reminds me I should play Factorio again 😭

upper trout Jul 13, 2026, 10:26 AM

#

hmm, gonna try diffing the vmcbs

#

before enter and after exit

#

btw, have i mentioned that i love linux tracing

#

fuck me, theres like 30 fields that change every time

#

lets see if there is anything special in the 426th™ enter

#

omg i love claude

#

let's see if it has extracted anything meaningful from the dump i have provided to it

#

LMAO

#

LMAO

#

LMAO

#

jesus CHRIST

#

https://claude.ai/share/d8c7efdb-5907-4804-b44a-cbd374a6d718

#

WHY THE FUCK IS THE STACK POINTER BEING DECREMENTED

#

how is this even supposed to work

#

let me write a quick poc

#

apparently, i

inject the #PF
the CPU fabricates the exception frame (decrements RSP)
tries to jump to the handler (which is null)
CPU gets a #PF -> i intercept it
repeat

#

so the RSP gets decremented infitely until writing the frame faults, and this is when finally i get the info that i have a #pf cuz of a #pf, and i can inject a #df instead

#

hmm, might i be actually retarded and interrupt delivery is not supposed to work like i think

#

like, if the cpu jumps to an unmapped handler, the #PF doesnt contribute at all to a #DF and this all has been correct behavior

#

the manual does not say anything about this

#

yep

#

fuck me

#

unmapped handlers do not contribute to #DF

#

the CPU simply sets the RIP to the handler, and if any exception happens from so on, it is independent

#

so you will fault when your stack underflows

#

rsp is ffff800007f4ff98
causing a #PF, handler is unmapped
panic: double fault at 0000000000000000, stack FFFF8000079EA010```

#

@clear agate ^

#

well, at least we are balling now, this could now be a patch coolmeme although i have to rebase it now, because the x86 kvm tree has new additions nooo

clear agate Jul 13, 2026, 1:58 PM

#

aha, so there was state changing, told you so

upper trout Jul 13, 2026, 2:04 PM

#

yes

upper trout Jul 15, 2026, 3:10 PM

#

cool

#

i have to write a cmpxchg128 if i dont want to suffer updating amd iommu device table entries god

brisk saddle Jul 15, 2026, 3:21 PM

#

upper trout i have to write a cmpxchg128 if i dont want to suffer updating amd iommu device ...

atlest CMPXCHG16B should exist on any device with am amd iommy right

#

Clueless

upper trout Jul 15, 2026, 3:21 PM

#

yeah yeah

#

but i find it very comic

#

green if you have cmpxchg16b, red if u dont

upper trout Jul 15, 2026, 6:37 PM

#

sphinx + doxygen

#

realized that down the line i am going to forget almost everything i have written, so why not start documenting

civic estuary Jul 15, 2026, 6:43 PM

#

upper trout sphinx + doxygen

May I recommend my documentation generator

#

it's used by uACPI

#

https://uACPI.github.io

upper trout Jul 15, 2026, 6:43 PM

#

i see

#

wait, there's uacpi documentation trl

civic estuary Jul 15, 2026, 6:44 PM

#

I built it because sphinx and doxygen are annoying together and I just wanted something that worked

upper trout Jul 15, 2026, 6:44 PM

#

eh

civic estuary Jul 15, 2026, 6:44 PM

#

I also had managarm docs generated but I forgot to ever PR that

upper trout Jul 15, 2026, 6:44 PM

#

it has been only 2 commands (for the moment)

civic estuary Jul 15, 2026, 6:44 PM

#

upper trout eh

Especially when you also want extra pages

#

Then you use sphinx and breathe and exhale and whatever

upper trout Jul 15, 2026, 6:45 PM

#

lmao

#

inhale

civic estuary Jul 15, 2026, 6:45 PM

#

Is it called inhale?

#

I could swear it was exhale

upper trout Jul 15, 2026, 6:45 PM

#

no no

#

i am meming

upper trout Jul 15, 2026, 9:14 PM

#

after working for 2 weeks straight only with linux code i realize my kernel code quality is garbage KEKW

upper trout Jul 16, 2026, 2:42 PM

#

#

how do i stop making comically large identifiers

pale mesa Jul 16, 2026, 2:48 PM

#

upper trout

dddtppds

upper trout Jul 16, 2026, 2:49 PM

#

nooo nooo nooo nooo nooo

jolly timber Jul 16, 2026, 2:51 PM

#

upper trout

just put each letter of the alphabet for function and when u run out make if 2 then 3...etc

#

trl

upper trout Jul 16, 2026, 2:52 PM

#

a9

jolly timber Jul 16, 2026, 2:52 PM

#

upper trout a9

9 isnt in the alphabet

#

https://klipy.com/gifs/withered-rose-wilted-rose

Klipy

Withered Rose Wilted Rose

▶ Play video

upper trout Jul 16, 2026, 2:52 PM

#

lol

jolly timber Jul 16, 2026, 2:52 PM

#

also chess move ahh name

pale mesa Jul 16, 2026, 2:54 PM

#

what kind of chess board are you playing on 🥀

upper trout Jul 16, 2026, 2:54 PM

#

a secret turkish one

jolly timber Jul 16, 2026, 3:03 PM

#

pale mesa what kind of chess board are you playing on 🥀

oh right

#

lmao

upper trout Jul 16, 2026, 3:06 PM

#

#

chat

#

is this good design

#

(this is based on the amdgpu brainrot)

jolly timber Jul 16, 2026, 3:08 PM

#

upper trout is this good design

no

upper trout Jul 16, 2026, 5:25 PM

#

jesus

#

the qemu implementation of the amd iommu is BALLS

#

gg

#

the passthrough mode is broken

#

it doesn't take into account the read/write allowed setting by the os

#

it only takes that into accout when its necessary to walk page tables

#

yep

#

this is hilarious

#

if i set up a page directory with all 0ed, works as expected

#

why am i so disgraced

#

every time i try to make something non trivial it always breaks because of someone else

low notch Jul 16, 2026, 5:39 PM

#

youre given opportunity to contribute to stuff

upper trout Jul 16, 2026, 5:39 PM

#

true :^)

#

actually yea

low notch Jul 16, 2026, 5:40 PM

#

tbh every time u dig deep this happens

#

happened to me with acpica, linux log ring etc

#

i ended up fixing their stuff

upper trout Jul 16, 2026, 5:41 PM

#

fair

#

well, it's time to go on a tangent now and see how i can fix this

#

working with the qemu memory api sounds like ugh

#

(this is working with any qemu api tbh)

low notch Jul 16, 2026, 5:42 PM

#

tru

upper trout Jul 16, 2026, 6:00 PM

#

hmm, this is going to be tricky

#

i am not sure if qemu has the concept of write only memory regions

#

nope, it doesnt

#

there's only read only, obviously

low notch Jul 16, 2026, 9:16 PM

#

https://x.com/i/status/2077541616131170353

Low Level (@LowLevelTweets)

"what if you came over and we sensually read eachother the kvm nested virt source code" - me courting my wife in 2014, probably

#

I think this is literally you

pale mesa Jul 16, 2026, 9:50 PM

#

lmao

upper trout Jul 16, 2026, 10:01 PM

#

LMFAO

#

Dream date

#

Except we read the qemu chardev api too flobsh

upper trout Jul 17, 2026, 3:44 PM

#

the qemu testing api is so bad it's incredible

#

the interfaces are abhorrent, and i realize almost nothing is even covered by tests

#

the amd iommu tests is literally

#

AMD IOMMU enable... ok

#

otoh the other iommus (intel, virtio, riscv) seem to be thoroughly tested

brisk saddle Jul 18, 2026, 9:53 AM

#

upper trout the qemu testing api is so bad it's incredible

I guess this means if I ever did try and cleanup QEMU TCG Fred I wouldn't need to make tests

#

😭

upper trout Jul 18, 2026, 9:54 AM

#

eh, i guess that tcg is properly tested

#

but i just found it very funny that for most devices, almost nothing is tested

#

at much if it initializes correctly, or some very specific niche thing

#

the api for testing is super terrible too

brisk saddle Jul 18, 2026, 9:55 AM

#

upper trout eh, i guess that tcg is properly tested

I mean stuff like interrupt delivery sounds annoying as fuck to test

upper trout Jul 18, 2026, 9:55 AM

#

not just because it is undocumented

#

but it's very weird

brisk saddle Jul 18, 2026, 9:55 AM

#

upper trout but it's very weird

Example?

upper trout Jul 18, 2026, 9:56 AM

#

for example, you want to create a machine

#

qtest_init("qemu arguments")

#

which is ok ig...

#

but then, say you want to get access to devices

#

you have to call qpci_pc_init or something like that

#

which is like a weird name

#

and then idk, the api for accessing memory and io ports seems fine (it is hard to fuck up that)

#

but the thing is that there's like 3000 ways to do the same

#

"initializing" a handle to a PC instance and then getting devices etc is one way of interacting with devices

#

there's also some QOS iirc brainrot which works with nodes and edges and blablabla

#

overcomplicated

brisk saddle Jul 18, 2026, 9:58 AM

#

Damn 😭

#

I do wonder how I should add integration and unit tests to my kernel

upper trout Jul 18, 2026, 9:59 AM

#

and qemu uses glib god

brisk saddle Jul 18, 2026, 9:59 AM

#

But I know I definitely wont do it however the fuck qemu does it

upper trout Jul 18, 2026, 10:00 AM

#

ask infy or someone else, they def have more experience than me with testing

#

tbf the only time ive written tests in my life was for the kvm selftests/qtest which aren't very pretty interfaces lol

low notch Jul 18, 2026, 10:04 AM

#

brisk saddle I do wonder how I should add integration and unit tests to my kernel

Integration: make a python script with pytest (or any other language with any other test framework), in the test run qemu with some kernel command line that makes the kernel do something. Make the kernel output some magic bytes at the end for pass or fail, consume them and fail or pass the test
Unit: I personally just build parts of kernel code in userspace, with arch specific parts stubbed if required (e.g. irq disabling), then its just normal unit tests from there

brisk saddle Jul 18, 2026, 10:04 AM

#

low notch 1. Integration: make a python script with pytest (or any other language with any...

I think rdmsr has a userspace build variant right?

#

Maybe I could hack something like that together for some things

low notch Jul 18, 2026, 10:05 AM

#

He dropped it because a full userspace arch is a lot of work

#

For unit testing you need much less

upper trout Jul 18, 2026, 10:05 AM

#

low notch He dropped it because a full userspace arch is a lot of work

something like uml?

brisk saddle Jul 18, 2026, 10:05 AM

#

low notch He dropped it because a full userspace arch is a lot of work

Oh yeah fair

low notch Jul 18, 2026, 10:05 AM

#

upper trout something like uml?

Yep

upper trout Jul 18, 2026, 10:06 AM

#

oh yeah that sounds painful

upper trout Jul 18, 2026, 10:10 AM

#

brisk saddle I mean stuff like interrupt delivery sounds annoying as fuck to test

oh yeah

#

i think that you have to provide the qom path for the irq pin

#

ok no, of the device, but i haven't figured out how to attach a handler/work with msis

#

im just polling the iommu and the edu device (which i am using for testing dma)

low notch Jul 18, 2026, 10:15 AM

#

When I asked clanker about qemu APIs it was generally fine

#

If you give it the src locally especially

#

Maybe try that

upper trout Jul 18, 2026, 10:15 AM

#

ngl i used claude for telling me which functions i have to use

brisk saddle Jul 18, 2026, 10:15 AM

#

as an agent or the webui?

upper trout Jul 18, 2026, 10:15 AM

#

the web ui

brisk saddle Jul 18, 2026, 10:15 AM

#

if you want cheap af agents opencode go is cheap af

#

plus its only OSS models

#

and aparently grok??????

upper trout Jul 18, 2026, 10:16 AM

#

lol

brisk saddle Jul 18, 2026, 10:16 AM

#

https://opencode.ai/go

OpenCode Go | Low cost coding models for everyone

Go starts at $5 for your first month, then $10/month, with generous 5-hour request limits for Grok 4.5, GLM-5.2, GLM-5.1, Kimi K3, Kimi K2.7 Code, Kimi K2.6, MiMo-V2.5-Pro, MiMo-V2.5, Qwen3.7 Max, Qwen3.7 Plus, Qwen3.6 Plus, MiniMax M2.7, MiniMax M3, DeepSeek V4 Pro, and DeepSeek V4 Flash.

upper trout Jul 18, 2026, 10:16 AM

#

starts inserting racist remarks in my code

brisk saddle Jul 18, 2026, 10:16 AM

#

It's like 5 bucks a month for the first month

#

And 10 bucks after that

#

And it's pretty generous with usage

#

Except for grok

#

Which is super fucking expensive 😭

#

But it's a flat fee instead of it charging you how much you use so PSP1G_pspTrollar

#

It's nice for more basic tasks since the LLMs aren't thatttt smart but good enough

upper trout Jul 18, 2026, 10:18 AM

#

for writing tests i get their appeal

upper trout Jul 19, 2026, 12:07 PM

#

yayayay

#

iommu code works in real hw

#

most importantly, target aborting the nvme controller does not break it

#

my objective for today and tomorrow is to implement mapping arbitrary gpas -> spas, and to also support pasids for gvas -> gpas -> spas

brisk saddle Jul 19, 2026, 12:09 PM

#

upper trout most importantly, target aborting the nvme controller does not break it

Fun fact I once broke @royal frost IPMI thing on their server by poking random physical memory to try and get machine checks with bad ECC ram 😭

royal frost Jul 19, 2026, 12:09 PM

#

hai again
can confirm, had to reflash

brisk saddle Jul 19, 2026, 12:10 PM

#

Wait do you have devices with IOMMUs

#

Could be useful to test this

#

Esp on fancy servers

royal frost Jul 19, 2026, 12:10 PM

#

idk 💀

#

i have fibrechannel and infiniband cards
those could have iommu

brisk saddle Jul 19, 2026, 12:10 PM

#

royal frost i have fibrechannel and infiniband cards those could have iommu

IOMMU is on the CPU

royal frost Jul 19, 2026, 12:10 PM

#

oh mb

#

xdd

#

thought it was something to do with iosrv

upper trout Jul 19, 2026, 12:11 PM

#

upper trout my objective for today and tomorrow is to implement mapping arbitrary gpas -> sp...

the latter case is quite interesting not because i have pasid aware drivers (although the amdgpu has pasid support, which ig is used for kfd), but because you plug a cpu page table directory directly

low notch Jul 19, 2026, 12:11 PM

#

brisk saddle Wait do you have devices with IOMMUs

like any semi modern laptop has iommu tbh

brisk saddle Jul 19, 2026, 12:11 PM

#

Yeah but if they wana test the RMRR things sever boards may be needed?

upper trout Jul 19, 2026, 12:11 PM

#

upper trout the latter case is quite interesting not because i have pasid aware drivers (alt...

and the AMD iommu has a special mode where you can configure it to treat no pasid tag for a device as if it has pasid=0

low notch Jul 19, 2026, 12:11 PM

#

oh not sure

upper trout Jul 19, 2026, 12:12 PM

#

so you can do a spa=gpa setup, and then use a cpu page directory for a device directly

#

and the best part is that amd nested page tables are exactly the same format as the cpu ones

#

so i don't have to duplicate page tables

#

i can plug the nested page tables for the device and for the virtual machine

#

amd is based tbh

brisk saddle Jul 19, 2026, 12:13 PM

#

upper trout and the AMD iommu has a special mode where you can configure it to treat no pasi...

How close is stuff to getting into booting something like SEABIOS btw? (I also wonder how insane it would be to run the systems firmware on the hypervisor instead)

upper trout Jul 19, 2026, 12:13 PM

#

seabios is easy

royal frost Jul 19, 2026, 12:13 PM

#

brisk saddle IOMMU is on the CPU

well
i have some haswell-ep xeons (that collection you saw + e5-2673 v3)
and then xeon scalable 2nd gen (gold 6138)

brisk saddle Jul 19, 2026, 12:13 PM

#

upper trout so i don't have to duplicate page tables

Honestly why would the pte format need to differ 😭

upper trout Jul 19, 2026, 12:13 PM

#

you have to emulate a very specific subset of q35 to get it working

#

and that's it really

brisk saddle Jul 19, 2026, 12:14 PM

#

Huh neat

upper trout Jul 19, 2026, 12:14 PM

#

well, apart from that

#

i will have to implement fw_cfg

brisk saddle Jul 19, 2026, 12:14 PM

#

Il have to uhhh get inspired by that if I ever make an x86 emulator (and re using an existing decoder because fuck that)

upper trout Jul 19, 2026, 12:14 PM

#

so that seabios can get the acpi tables and the e820 map

#

this means that i have to be writing my own aml

#

meme

brisk saddle Jul 19, 2026, 12:15 PM

#

upper trout this means that i have to be writing my own aml

Make the worst AML you can to make infy cry

upper trout Jul 19, 2026, 12:15 PM

#

yes

brisk saddle Jul 19, 2026, 12:15 PM

#

PSP1G_pspTrollar

upper trout Jul 19, 2026, 12:15 PM

#

but before i get to the point where i get seabios working

#

i really want to have rcu

#

and have something like the memory regions in qemu

#

because in x86 the memory map is quite volatile

#

you have smm, bars, etc etc

#

and ion feel like using a lock when doing mmio

#

and i want to have a system where i can easily specify memory regions, aliases, overlap them, etc

civic estuary Jul 19, 2026, 12:17 PM

#

upper trout i really want to have rcu

do freebsd GUS instead

upper trout Jul 19, 2026, 12:17 PM

#

btw qemu uses rcu

#

memory regions are converted to what's called a flatview

#

which is well, as the name suggests, a flattened view of memory

#

and accesses to this flatview are under a rcu lock

upper trout Jul 19, 2026, 12:18 PM

#

civic estuary do freebsd GUS instead

nah

#

im too uncreative, i think im doing hierarchical rcu

#

ill just copy linux

civic estuary Jul 19, 2026, 12:20 PM

#

RCU is useful because you dont really need to adapt data structures for it

upper trout Jul 20, 2026, 7:13 PM

#

upper trout my objective for today and tomorrow is to implement mapping arbitrary gpas -> sp...

yeah, this is not happening KEKW i got rightfully distracted by the world cup and today i spent my day goofying around

#

i will try to get at least gpa -> spa mappings

#

which is going to be super ez because i only plan to map 4kb and 1gb pages

upper trout Jul 21, 2026, 4:36 PM

#

chad

#

iommu gpa -> spa mappings work

upper trout Jul 21, 2026, 4:52 PM

#

now i have to do unmapping and freeing ( nooo ), after doing so flushing local and remote iotlbs, write the code for double transations, and make a device io memory allocator

#

which will have to take into account p2p zones, exclusion ranges, and the hypertransport range bs

upper trout Jul 22, 2026, 11:03 AM

#

invalidation is so fckn weird

#

you can specify custom page sizes

#

but if you use high enough addresses, the iommu thinks you want to invalidate all the cache

#

because of the way size is encoded

upper trout Jul 22, 2026, 3:08 PM

#

i am reading about virtio iommu

#

why is it so based

#

chad

#

no page tables to manage

#

actually this is so cool

#

i could support only virtio iommu for the guests

pale mesa Jul 22, 2026, 3:10 PM

#

virtio is pretty cool

upper trout Jul 22, 2026, 3:10 PM

#

upper trout i could support only virtio iommu for the guests

and then if i have passed through devices

#

the guests can have another layer of translation

#

i can set up for the device the GPA -> SPA translation tables (which will have the same mappings as the nested page tables)
and then the GVA -> GPA translation tables, which will be modified accordingly with what the guests want

upper trout Jul 22, 2026, 3:12 PM

#

pale mesa virtio is pretty cool

indeed

#

good shit

#

during negotation, you can specify the valid virtual address range

brisk saddle Jul 22, 2026, 3:13 PM

#

upper trout i could support only virtio iommu for the guests

honestly this is not a bad idea for general usage

upper trout Jul 22, 2026, 3:13 PM

#

so i can exclude the non canonical address range

upper trout Jul 22, 2026, 3:13 PM

#

upper trout <:chad:815144781842743334>

.

brisk saddle Jul 22, 2026, 3:13 PM

#

hyper-v does similar and like only uses its virtio clone for a ton of shit

upper trout Jul 22, 2026, 3:13 PM

#

here i used 6 level paging chad look at the addresses

upper trout Jul 22, 2026, 3:14 PM

#

brisk saddle honestly this is not a bad idea for general usage

i think i will be supporting only virtio devices at the beginning

brisk saddle Jul 22, 2026, 3:14 PM

#

upper trout here i used 6 level paging <:chad:815144781842743334> look at the addresses

speaking of funky addresses, are these valid or invalid, and why

upper trout Jul 22, 2026, 3:15 PM

#

is this another arch

#

lol

brisk saddle Jul 22, 2026, 3:15 PM

#

upper trout is this another arch

yes

upper trout Jul 22, 2026, 3:15 PM

#

im guessing la64

brisk saddle Jul 22, 2026, 3:15 PM

#

a loong one

upper trout Jul 22, 2026, 3:15 PM

#

yes

brisk saddle Jul 22, 2026, 3:15 PM

#

indeed

#

Ah you deleted that

#

I don't know if it was right or wrong

#

😭

upper trout Jul 22, 2026, 3:16 PM

#

what did i delete?

brisk saddle Jul 22, 2026, 3:16 PM

#

Maybe my discord bugged

#

In mobile

#

Messages got jumbled

upper trout Jul 22, 2026, 3:16 PM

#

https://klipy.com/gifs/zaunvi-caitvitwt-8

Klipy

Zaunvi Caitvitwt: SpongeBob Taking Notes

▶ Play video

#

well, it's time for the last thing

#

i have invalidations done

#

time to support double translations and then move on to rcu

brisk saddle Jul 22, 2026, 3:17 PM

#

upper trout yes

I do wonder if you can guess what makes thoes address like that

upper trout Jul 22, 2026, 3:18 PM

#

i read the spec

#

only for that part

brisk saddle Jul 22, 2026, 3:18 PM

#

Ah lmao

upper trout Jul 22, 2026, 3:18 PM

#

meme

brisk saddle Jul 22, 2026, 3:18 PM

#

DMWs are cool though

upper trout Jul 22, 2026, 3:18 PM

#

yeah

brisk saddle Jul 22, 2026, 3:18 PM

#

When loongarch64 hypervisor extention support btw mmLol

#

Cc: @clear haven

upper trout Jul 22, 2026, 3:18 PM

#

how will that work

#

ah

#

well idk

#

go to china

brisk saddle Jul 22, 2026, 3:18 PM

#

It has exceptions for hypervisor shit

#

I presume it should be possible

#

Though it's uhhhhhh

#

Fully undocumented

upper trout Jul 22, 2026, 3:19 PM

#

lol

#

i mean, if your arch is well designed you don't need extensive hypervisor specific support

#

x86 was just bad from the beginning

brisk saddle Jul 22, 2026, 3:19 PM

#

😭

#

Trueeee

#

Riscv may actually be worth it later though

#

Since rva23 mandates the H extention

#

And more and more hardware is coming with that

upper trout Jul 22, 2026, 3:20 PM

#

i have heard that the god of qemu/kvm had a hand in the design of rv hypervision

#

so it's a good design

brisk saddle Jul 22, 2026, 3:21 PM

#

if you do end up porting let me know

#

upper trout Jul 22, 2026, 3:21 PM

#

not really trl

#

qwinci has done riscv hv for managarm

#

and fadanoid for keyronex

#

they say it has been very simple

brisk saddle Jul 22, 2026, 3:21 PM

#

ah nice

#

the most i know about it is that it uses sbi

#

lmfao

upper trout Jul 22, 2026, 3:22 PM

#

i see

#

i mean tbh svm isnt very bad

#

it took me 2/3 hours to get a guest running

brisk saddle Jul 22, 2026, 3:22 PM

#

SBI is actually also really well designed

#

It's basically intended to be paravirtualized and shit

#

Since it's basically like a syscall but from the kernel into firmware

#

Well it's exactly that to be specific

upper trout Jul 22, 2026, 3:23 PM

#

i see

brisk saddle Jul 22, 2026, 3:23 PM

#

Same instruction and eveything

upper trout Jul 22, 2026, 3:23 PM

#

til

#

my non-x86 knowledge is very very lacking

#

the only non-x86 arch i have worked with is mips because they teach us that in uni

brisk saddle Jul 22, 2026, 3:24 PM

#

Honestly my favorite part of it is that it gives you a print function

upper trout Jul 22, 2026, 3:24 PM

#

but nothign too specific

#

we used MARS trl

brisk saddle Jul 22, 2026, 3:24 PM

#

So you get port E9 even on real hardware

upper trout Jul 22, 2026, 3:24 PM

#

cool

brisk saddle Jul 22, 2026, 3:24 PM

#

upper trout we used MARS <:trl:829316641191886888>

PSP1G_pspTrollar

#

But yeah

#

Consider a riscv port

#

It's koolio

upper trout Jul 22, 2026, 3:25 PM

#

maybe for another project

brisk saddle Jul 22, 2026, 3:26 PM

#

Fair fair

#

Stuffs looking good tho

upper trout Jul 22, 2026, 3:32 PM

#

#

i am not having 2^20 pasids, so fuck this shit trl

upper trout Jul 22, 2026, 10:53 PM

#

something good about nvmes

#

they don't seem to shit themselves after getting target aborted

#

they keep going, and ig the abort is logged somewhere

#

(apart from the iommu telling you)

#

rn i am trying to debug double translations

#

it is page faulting, with the reason that there is some reserved bit set to non-zero

#

surprisingly, it encounters that bit during gva->gpa translation

#

https://cdn.discordapp.com/emojis/1434611394782691429.webp?size=128

brisk saddle Jul 22, 2026, 10:57 PM

#

I see you stole that emoji from me

#

PSP1G_pspTrollar

upper trout Jul 22, 2026, 10:57 PM

#

i like it

brisk saddle Jul 22, 2026, 10:57 PM

#

My lawyers will be contacting you soon

upper trout Jul 22, 2026, 10:57 PM

#

nooo _ _

upper trout Jul 23, 2026, 10:31 AM

#

🦀 🦀 🦀

#

gva -> gpa mappings work

#

basically, i fucked up a shift

#

the pointer to the pasid table is split in 3 pieces in the device table entry, and one shift was off

#

time to push

upper trout Jul 23, 2026, 10:33 AM

#

upper trout the pointer to the pasid table is split in 3 pieces in the device table entry, a...

so, i am done with amd iommu dma remapping

#

there's not much more what to implement for it

#

i don't think interrupt remapping will be too useful for me

#

but one thing i 100% want to support is interrupt posting

#

if your hardware supports the avic (advanced virtual interrupt controller), which means that you can set a pointer to a page in the guest state which will act as the apic page, and the hardware will treat io and msr io to that region as if it were a real apic

low notch Jul 23, 2026, 10:35 AM

#

Did you like the linux amd iommu state machine

upper trout Jul 23, 2026, 10:35 AM

#

you can make the iommu to set bits in that apic page

#

i havent read it

low notch Jul 23, 2026, 10:36 AM

#

Damn

upper trout Jul 23, 2026, 10:36 AM

#

but tbh initialization is too convoluted

#

it probably makes sense

low notch Jul 23, 2026, 10:36 AM

#

Did you do it from spec entirely?

upper trout Jul 23, 2026, 10:36 AM

#

yes

low notch Jul 23, 2026, 10:36 AM

#

Cool

upper trout Jul 23, 2026, 10:36 AM

#

upper trout but tbh initialization is too convoluted

so like

#

you discover the iommu from the apic table

#

but then to control msis, you need its pci_dev struct

#

but if you initialize the iommu before pci, then you naturally dont have it

#

and at the same time you want to bind pci devices to the iommu during the first pci discovery

#

so you have many steps of initialization

low notch Jul 23, 2026, 10:38 AM

#

Did you do Intel yet?

upper trout Jul 23, 2026, 10:38 AM

#

at least thats what i do but i suppose in linux its the same story

#

nope

#

i do whatever my laptop supports chad

low notch Jul 23, 2026, 10:38 AM

#

Imagine only having one laptop

#

But u can pick up a used relatively modern one for very cheap

upper trout Jul 23, 2026, 10:39 AM

#

yeah

low notch Jul 23, 2026, 10:39 AM

#

Anything post 2012 will probably have an iommu

upper trout Jul 23, 2026, 10:39 AM

#

i have an intel laptop, 2017 which doesnt

#

but probably because its a celeron

low notch Jul 23, 2026, 10:39 AM

#

Oh yeah

#

But its also possible its disabled in bios

upper trout Jul 23, 2026, 10:40 AM

#

not really

#

i would have seen it

#

that same laptop has i2c touchscreen btw

low notch Jul 23, 2026, 10:40 AM

#

Is that like a netbook

upper trout Jul 23, 2026, 10:41 AM

#

writing a driver for it will be interesting

low notch Jul 23, 2026, 10:41 AM

#

Yeah i2c stuff on x86 is kinda annoying, iirc the controllers aren't documented at all

upper trout Jul 23, 2026, 10:41 AM

#

low notch Is that like a netbook

yeah, something like that

low notch Jul 23, 2026, 10:41 AM

#

Oh ok

upper trout Jul 23, 2026, 10:41 AM

#

low notch Yeah i2c stuff on x86 is kinda annoying, iirc the controllers aren't documented ...

its discoverable with acpi

low notch Jul 23, 2026, 10:42 AM

#

Yeah but the smbus device at 1F.X is not documented

upper trout Jul 23, 2026, 10:42 AM

#

#1217009725711847465 message

low notch Jul 23, 2026, 10:42 AM

#

The devices behind i2c are discoverable ofc

upper trout Jul 23, 2026, 10:43 AM

#

oh okay

#

📎 message.txt

low notch Jul 23, 2026, 10:45 AM

#

Cool yeah it tells you which i2c controllers its on and how to talk to it

upper trout Jul 23, 2026, 10:45 AM

#

is the interface standardized?

low notch Jul 23, 2026, 10:45 AM

#

For the smbus? Iirc no

#

Its different between some chipsets and Intel vs amd

upper trout Jul 23, 2026, 10:46 AM

#

no i mean

low notch Jul 23, 2026, 10:46 AM

#

It also usually starts in D3 cold

upper trout Jul 23, 2026, 10:46 AM

#

the commands you have to send to basically work with the touchscreen

low notch Jul 23, 2026, 10:46 AM

#

So you have to wake the PCI device itself

low notch Jul 23, 2026, 10:46 AM

#

upper trout the commands you have to send to basically work with the touchscreen

Yeah thats standard hid over i2c

#

Most likely

upper trout Jul 23, 2026, 10:46 AM

#

ah okay cool

#

oh okay i think i get it

#

the aml tells you the offsets, but you have to talk with smbus/i2c yourself

#

and that depends on whatever chipset you have

low notch Jul 23, 2026, 10:47 AM

#

You have the standard i2c protocol, which is relayed over SMBUS on x86, but then you have the hid protocol on top of the i2c wire

low notch Jul 23, 2026, 10:47 AM

#

upper trout and that depends on whatever chipset you have

Yeah

#

Smbus even exists on QEMU

upper trout Jul 23, 2026, 10:48 AM

#

when you run lspci on this laptop, theres a lot of signal processing controllers

upper trout Jul 23, 2026, 10:48 AM

#

low notch Smbus even exists on QEMU

yeah ik

#

but it doesnt do much

#

it doesnt even fill the correct spd info i think

low notch Jul 23, 2026, 10:48 AM

#

Im not even sure what it does

upper trout Jul 23, 2026, 10:48 AM

#

lol

#

i think you can only query what dimm modules there are

#

low notch Jul 23, 2026, 10:49 AM

#

Yeah

upper trout Jul 23, 2026, 10:49 AM

#

see the Link

low notch Jul 23, 2026, 10:49 AM

#

Its probably also just there to mimic the full q35

upper trout Jul 23, 2026, 10:50 AM

#

so its not even at smbus using the south bridge interface

low notch Jul 23, 2026, 10:50 AM

#

upper trout see the Link

yeah but link is not some standard aml name, that's a private thing inside that device

upper trout Jul 23, 2026, 10:50 AM

#

then look at _DEP

#

meme

low notch Jul 23, 2026, 10:51 AM

#

Isn't this whole thing under PCI0 anyway

upper trout Jul 23, 2026, 10:51 AM

#

yes

low notch Jul 23, 2026, 10:51 AM

#

upper trout so its not even at smbus using the south bridge interface

Wdym by that?

upper trout Jul 23, 2026, 10:51 AM

#

let me get that laptop and run lspci

#

there's a lot (around 10) signal processing devices

#

i think the i2c for the touchscreen is basically under one of these

low notch Jul 23, 2026, 10:52 AM

#

what is the south bridge interface?

upper trout Jul 23, 2026, 10:54 AM

#

📎 message.txt

low notch Jul 23, 2026, 10:55 AM

#

holy

#

can u do lspci -nn

upper trout Jul 23, 2026, 10:55 AM

#

yes

#

this laptop is super cursed

#

it barely runs windows 10

low notch Jul 23, 2026, 10:55 AM

#

i wonder what controller these i2c signal processing things use

#

like is it different from an smbus controller

upper trout Jul 23, 2026, 10:56 AM

#

📎 message.txt

low notch Jul 23, 2026, 10:57 AM

#

why the hell do they have incrementing device id numbers KEKW

upper trout Jul 23, 2026, 10:57 AM

#

lmao

#

right

low notch Jul 23, 2026, 10:57 AM

#

drivers/mfd/intel-lpss-pci.c: { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info },

upper trout Jul 23, 2026, 10:58 AM

#

            Device (I2C3)
            {
                Name (_ADR, 0x00160003)  // _ADR: Address
            }```

#

so basically the touchscreen is in the 4th signal processing contrller

low notch Jul 23, 2026, 10:58 AM

#

the driver is tiny

#

but thats probably because the bulk of it is handled via some parent driver

#

theres the acpi part also https://elixir.bootlin.com/linux/v7.1.4/source/drivers/mfd/intel-lpss-acpi.c

upper trout Jul 23, 2026, 11:01 AM

#

it doesnt apply here tho

low notch Jul 23, 2026, 11:01 AM

#

yeah, probably because its discoverable via pci anyway

#

anyway even the core driver is tiny

#

but idk if thats the entire thing

#

drivers/platform/x86/x86-android-tablets/other.c:                       .dev_name = "FTSC1000",
drivers/platform/x86/x86-android-tablets/other.c:       .dev_id = "i2c-FTSC1000",
drivers/platform/x86/x86-android-tablets/other.c:                       .dev_name = "FTSC1000",
drivers/platform/x86/x86-android-tablets/other.c:       .dev_id = "i2c-FTSC1000",

#

huh lol

upper trout Jul 23, 2026, 11:03 AM

#

Kernel driver in use: intel-lpss
Kernel modules: intel_lpss_pci

#

unless theyre being stacked

#

idk if my laptop qualifies as an x86 android tablet tbh

low notch Jul 23, 2026, 11:04 AM

#

nah, if i had to guess, they put the ftsc1000 i2c device inside they soc

#

but its not discovered via this code path

upper trout Jul 23, 2026, 11:05 AM

#

DMI: MEDION E3213 MD60774/NT13A, BIOS V2.0.4_P2S0T1P1F3G2C2 07/06/2017

low notch Jul 23, 2026, 11:06 AM

#

static const struct x86_i2c_client_info vexia_edu_atla10_5v_i2c_clients[] __initconst = {
        {
                /* kxcjk1013 accelerometer */
                .board_info = {
                        .type = "kxcjk1013",
                        .addr = 0x0f,
                        .dev_name = "kxcjk1013",
                },
                .adapter_path = "\\_SB_.I2C3",
        }, {
                /*  touchscreen controller */
                .board_info = {
                        .type = "hid-over-i2c",
                        .addr = 0x38,
                        .dev_name = "FTSC1000",
                        .swnode = &vexia_edu_atla10_5v_touchscreen_node,
                },
                .adapter_path = "\\_SB_.I2C4",
                .irq_data = {
                        .type = X86_ACPI_IRQ_TYPE_APIC,
                        .index = 0x44,
                        .trigger = ACPI_LEVEL_SENSITIVE,
                        .polarity = ACPI_ACTIVE_HIGH,
                },
        }
};

#

yeah this is hardcoded for some other thing

upper trout Jul 23, 2026, 11:06 AM

#

yeah

#

and the acpi paths are not the same

low notch Jul 23, 2026, 11:07 AM

#

        /* Vexia Edu Atla 10 tablet 5V version */
        .matches = {
            /* Having all 3 of these not set is somewhat unique */
            DMI_MATCH(DMI_SYS_VENDOR, "To be filled by O.E.M."),
            DMI_MATCH(DMI_PRODUCT_NAME, "To be filled by O.E.M."),
            DMI_MATCH(DMI_BOARD_NAME, "To be filled by O.E.M."),
            /* Above strings are too generic, also match on BIOS date */
            DMI_MATCH(DMI_BIOS_DATE, "05/14/2015"),
        },
        .driver_data = (void *)&vexia_edu_atla10_5v_info,

#

that seems like a reliable match KEKW

upper trout Jul 23, 2026, 11:07 AM

#

lmfao

#

comic

low notch Jul 23, 2026, 11:08 AM

#

#

imagine how cursed this shit is

upper trout Jul 23, 2026, 11:08 AM

#

yeah

low notch Jul 23, 2026, 11:08 AM

#

 * DMI based code to deal with broken DSDTs on X86 tablets which ship with
 * Android as (part of) the factory image. The factory kernels shipped on these
 * devices typically have a bunch of things hardcoded, rather than specified
 * in their DSDT.
 *

upper trout Jul 23, 2026, 11:09 AM

#

oh wait this is a spanish tablet

#

funny

#

/*
 * Vexia EDU ATLA 10 tablet 5V, Android 4.4 + Guadalinex Ubuntu tablet
 * distributed to schools in the Spanish Andalucía region.
 */```

#

KEKW

low notch Jul 23, 2026, 11:10 AM

#

Android people even manage to make x86 proprietary

upper trout Jul 23, 2026, 3:57 PM

#

documentation is now live at https://atiep.github.io/taratos/

#

here i will be documenting APIs and internal design

#

as well as stuff i find interesting

upper trout Jul 23, 2026, 4:57 PM

#

github actions is so great btw

#

the last time i had done anything ci/cd related in github was with travis back in 2020

#

it wasnt very good lol

#

now you get machines with 4 vcpus and 16gb of ram and whatnot for free

civic estuary Jul 23, 2026, 8:28 PM

#

upper trout documentation is now live at https://atiep.github.io/taratos/

this is cool

#

I might or might not try to figure out how to do something like this with the zig docs thing

#

but anyway, it's nice that you care to document your stuff for others to use and for people to contribute

upper trout Jul 23, 2026, 8:33 PM

#

the main reason im starting to document is because i will end up forgetting how most of my os works meme

#

but yeah

#

i also wanted to try out sphinx and doxygen and actions and blablabla

#

once my os is more usable and not just a black screen with white text and a halt at the end i will make an action for building it

civic estuary Jul 23, 2026, 8:34 PM

#

upper trout the main reason im starting to document is because i will end up forgetting how ...

I forgot a bunch of stuff from mine as well lol

#

sometimes I look at code and trying to figure it out

upper trout Jul 23, 2026, 8:35 PM

#

same

civic estuary Jul 23, 2026, 8:35 PM

#

I'm not sure if I wanna commits to docs though because the API is likely to change and it's annoying to update

upper trout Jul 23, 2026, 8:35 PM

#

on very few occasions i wonder how tf i have made something to work

#

for example, memory initialization is insane

#Taratos (type 1 hypervisor OS)