uACPI - a portable and easy-to-integrate ACPI implementation | Operating System Development | Page 29

gentle peak Jan 3, 2025, 7:24 PM

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handwritten assembly also doesn't cooperate with LTO at all

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they definitely have the same issue proxima did, regardless of how it's actually implemented

fiery turtle Jan 3, 2025, 7:25 PM

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lemme find it

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korona linked it recently

vast kestrel Jan 3, 2025, 7:25 PM

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Can you maybe try to replicate that in usermode

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And try using Intel vtune or something alike

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To check the diffs

gentle peak Jan 3, 2025, 7:25 PM

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i found it

fiery turtle Jan 3, 2025, 7:25 PM

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https://github.com/managarm/managarm/blob/master/kernel/common/libc.cpp#L77

GitHub

managarm/kernel/common/libc.cpp at master · managarm/managarm

Pragmatic microkernel-based OS with fully asynchronous I/O - managarm/managarm

gentle peak Jan 3, 2025, 7:26 PM

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right

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pain because of templates but shouldn't be too hard to port to c

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actually i have no idea how to map the may_alias

fiery turtle Jan 3, 2025, 7:27 PM

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gentle peak they definitely have the same issue proxima did, regardless of how it's actually...

yup

gentle peak Jan 3, 2025, 7:28 PM

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oh i can just do __attribute__((may_alias))

fiery turtle Jan 3, 2025, 7:28 PM

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what the hell is gnu::artificial

gentle peak Jan 3, 2025, 7:29 PM

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https://stackoverflow.com/questions/20110291/use-cases-of-the-gcc-artificial-function-attribute

Stack Overflow

Use cases of the GCC "artificial" function attribute

I just read about the GCC function attribute artificial but did not quite get the description. Can you give me some examples where it is useful?

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seems like a debugging thing

fiery turtle Jan 3, 2025, 7:30 PM

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interesting

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i dont understand it entirely

vast kestrel Jan 3, 2025, 7:30 PM

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What if you mark your memcpy as noinline and use __builtin

fiery turtle Jan 3, 2025, 7:30 PM

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like by default it already has inlined stuff as part of the backtrace

vast kestrel Jan 3, 2025, 7:31 PM

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Maybe it inlines the rep mosvb where the builtin memcpy didn't think it should

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Like I am almost certain extern function has a stronger barrier than memory clobber

gentle peak Jan 3, 2025, 7:31 PM

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fiery turtle like by default it already has inlined stuff as part of the backtrace

by default the backtrace shows the line of the inlined code instead of the site where it got inlined

vast kestrel Jan 3, 2025, 7:32 PM

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I should mark my intrusive linked list functions as artificial tbh

gentle peak Jan 3, 2025, 7:32 PM

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vast kestrel Like I am almost certain extern function has a stronger barrier than memory clob...

"extern function" doesn't exist in this case because i'm using LTO

vast kestrel Jan 3, 2025, 7:32 PM

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I mean against the asm code

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Didn't you say the inline asm was worse than no inline asm

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And using an extern

fiery turtle Jan 3, 2025, 7:33 PM

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gentle peak by default the backtrace shows the line of the inlined code instead of the site ...

ah

gentle peak Jan 3, 2025, 7:33 PM

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vast kestrel Didn't you say the inline asm was worse than no inline asm

inline asm is worse than normal asm using __builtin yeah

vast kestrel Jan 3, 2025, 7:33 PM

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Try marking the memcpy as noinline and use builtin

gentle peak Jan 3, 2025, 7:34 PM

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i'm porting the phd memcpy rn i'll test that afterwards

vast kestrel Jan 3, 2025, 7:34 PM

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Nice

gentle peak Jan 3, 2025, 7:35 PM

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nevermind i tried that first

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it's now about on part with normal asm

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but still not better than just the naive impls

vast kestrel Jan 3, 2025, 7:35 PM

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Hmmmmm

gentle peak Jan 3, 2025, 7:37 PM

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fiery turtle https://github.com/managarm/managarm/blob/master/kernel/common/libc.cpp#L77

wait isn't this technically UB? it violates strict aliasing as far as i can tell

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eh i'll try it anyway

vast kestrel Jan 3, 2025, 7:38 PM

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What if

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You log the sizes of the memcpy

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Like how much is copied/cleared

fiery turtle Jan 3, 2025, 7:41 PM

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inb4 recurses because logging memcpies

vast kestrel Jan 3, 2025, 7:42 PM

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:^)

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You could override the uacpi functions specifically to log it

gentle peak Jan 3, 2025, 7:45 PM

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@fiery turtle it's official: uacpi memcpy is better than phd memcpy

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phd memcpy gave 6.7M

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it's as straight of a translation to c as possible https://hst.sh/nazavuyaxa.cpp

fiery turtle Jan 3, 2025, 7:47 PM

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bruh

vast kestrel Jan 3, 2025, 7:48 PM

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Sus

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Ok Linux just has an extern asm function on 64bit that either does memcpy if fsrm or a loop that copies 4x8 bytes at a time

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Which it patches at load time obviously

hollow elm Jan 3, 2025, 7:50 PM

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gentle peak wait isn't this technically UB? it violates strict aliasing as far as i can tell

that's what gnu::may_alias is for

gentle peak Jan 3, 2025, 7:50 PM

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ah ok

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still surprising that it's slower than just the plain naive impl

vast kestrel Jan 3, 2025, 7:50 PM

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What does the compiler do with the naive impl that's so special

hollow elm Jan 3, 2025, 7:51 PM

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what does the generated code look like?

vast kestrel Jan 3, 2025, 7:51 PM

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Btw what about using O2 vs O3

gentle peak Jan 3, 2025, 7:51 PM

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not sure

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it all gets inlined into huge functions because lto

vast kestrel Jan 3, 2025, 7:51 PM

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hollow elm what does the generated code look like?

It's hard to figure out even from diffs

gentle peak Jan 3, 2025, 7:51 PM

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oh wait

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if i use __builtin_* phd memcpy is on par with the naive impl

vast kestrel Jan 3, 2025, 7:51 PM

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Hmmm

gentle peak Jan 3, 2025, 7:51 PM

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pretty much the exact same score

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without lto:

phd memcpy: 5.7M
naive memcpy: 5.0M

vast kestrel Jan 3, 2025, 7:54 PM

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With __builtin for the PhD right?

hollow elm Jan 3, 2025, 7:54 PM

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https://godbolt.org/z/h95h7GjGc

gentle peak Jan 3, 2025, 7:55 PM

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vast kestrel With __builtin for the PhD right?

yeah

vast kestrel Jan 3, 2025, 7:55 PM

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I feel like the problem is inline

gentle peak Jan 3, 2025, 7:56 PM

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with -O2 + LTO:

phd memcpy: 7.4M
naive memcpy: 7.3M

vast kestrel Jan 3, 2025, 7:56 PM

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I feel like the copies are never large enough to make movsb be worth it, and that over inlining from it being small hurts it even more

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It doesn't explain the variants with extern tho

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And the naive is probably simple enough that it gets unrolled to something like the builtin

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When it does get inlined

calm latch Jan 3, 2025, 8:13 PM

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fiery turtle https://github.com/managarm/managarm/blob/master/kernel/common/libc.cpp#L77

isn't it just loop unrolling by hand, which the compiler probably does for you anyway?

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(i'm too dumb for it)

loud ice Jan 3, 2025, 8:17 PM

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calm latch isn't it just loop unrolling by hand, which the compiler probably does for you a...

no i dont think they do it for free

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phd memcpy is good for a reason or something

left orbit Jan 3, 2025, 8:18 PM

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most same compilers wont unroll this because of code size

loud ice Jan 3, 2025, 8:18 PM

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also here's a shit ass python script which takes a bunch of single results and calculates the mean and stddev and a 95% confidence interval https://paste.sr.ht/~pitust/43498d8ccca174530b6a1c52607e15fe3ae6e841

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also a "score" which is the low 95% confidence interval value

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uacpi memmove: mean 159819.90625 +- 929.433544647053
compiler_builtins (rust) memmove: mean 159334.46875 +- 1066.4083397122151 (std 3077.8145654056934)

calm latch Jan 3, 2025, 8:21 PM

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This is what a dumb memcpy compiles to with clang

📎 message.txt

loud ice Jan 3, 2025, 8:21 PM

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so within margin of error

calm latch Jan 3, 2025, 8:22 PM

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calm latch This is what a dumb memcpy compiles to with clang

I see it using SSE and copy in 16 byte chunks

loud ice Jan 3, 2025, 8:23 PM

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loud ice uacpi memmove: mean 159819.90625 +- 929.433544647053 compiler_builtins (rust) me...

about the same margin, and its a bit higher

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@dire owl you are the maths expert, how do you calculate a % chance that this is actually an improvement

calm latch Jan 3, 2025, 8:23 PM

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I think it's not

loud ice Jan 3, 2025, 8:24 PM

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is it not?

loud ice Jan 3, 2025, 8:24 PM

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loud ice uacpi memmove: mean 159819.90625 +- 929.433544647053 compiler_builtins (rust) me...

rust strlen has mean 155660.875

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holy fuck

calm latch Jan 3, 2025, 8:25 PM

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calm latch This is what a dumb memcpy compiles to with clang

void *memcpy(void *dest, const void *src, size_t n)
{
    void *k = dest;
    while (n--) {
        *((char *)dest++) = *((char *)src++);
    }

    return k;
}

loud ice Jan 3, 2025, 8:25 PM

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also, i benchmarked my sso patches properly now

No SSO: mean 143967.75 +- 1759.780639039281
SSO: mean 147692.625 +- 1063.661225436405

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so its a definite improvement

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4k points for free

calm latch Jan 3, 2025, 8:26 PM

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sse?

loud ice Jan 3, 2025, 8:26 PM

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sso

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small string optimization

calm latch Jan 3, 2025, 8:26 PM

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oh

loud ice Jan 3, 2025, 8:26 PM

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i have some shitty custom out-of-tree uacpi patches

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which help a bit with allocation pressure

calm latch Jan 3, 2025, 8:27 PM

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Yeah ACPI is full of 5 bytes + terminator strings

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(probably)

loud ice Jan 3, 2025, 8:27 PM

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dont think i got them all in the sso changes though lol

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okay lets do more perf improvement attempts

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oh hmm i think i might not have been benchmarking correctly

left orbit Jan 3, 2025, 8:29 PM

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@loud ice https://github.com/48cf/uACPI/tree/small-string-opt

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i've done a bit more i think, on my branch every buffer in uacpi does "sso"

loud ice Jan 3, 2025, 8:29 PM

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left orbit <@696410219663851552> <https://github.com/48cf/uACPI/tree/small-string-opt>

oh no my changes are way more scuffed

calm latch Jan 3, 2025, 8:29 PM

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Without general regs only trl

left orbit Jan 3, 2025, 8:30 PM

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loud ice oh no my changes are way more scuffed

i bet () but im just giving you my branch if you wanna test it too

loud ice Jan 3, 2025, 8:30 PM

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left orbit <@696410219663851552> <https://github.com/48cf/uACPI/tree/small-string-opt>

here are mine: https://paste.sr.ht/~pitust/7910cb96f046a96261eb6d0116a284779fd502d4

left orbit Jan 3, 2025, 8:31 PM

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ok its probably similar then

loud ice Jan 3, 2025, 8:31 PM

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okay i fucked up my testing methodology

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lets try again

calm latch Jan 3, 2025, 8:31 PM

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fiery turtle https://github.com/managarm/managarm/blob/master/kernel/common/libc.cpp#L77

what's phd about it?

loud ice Jan 3, 2025, 8:31 PM

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calm latch what's phd about it?

korona has a phd

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and its his code

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so

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its phd code

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thus its a phd memcpy

calm latch Jan 3, 2025, 8:31 PM

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oh

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but like it's not someone's thesis or something

loud ice Jan 3, 2025, 8:32 PM

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no no

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lol

left orbit Jan 3, 2025, 8:32 PM

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it's just an inside joke (sort of)

loud ice Jan 3, 2025, 8:32 PM

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oh god

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a thesis about memcpying real fast sounds so cursed

left orbit Jan 3, 2025, 8:32 PM

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all slightly overengineered code written by korona is referred to as "phd code"

calm latch Jan 3, 2025, 8:33 PM

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loud ice a thesis about memcpying real fast sounds so cursed

why

gentle peak Jan 3, 2025, 8:33 PM

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thesis about maximizing uacpi score

left orbit Jan 3, 2025, 8:33 PM

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calm latch why

for one because it's not universal, i guess

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different cpus do different things fast

loud ice Jan 3, 2025, 8:33 PM

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oh no thats not that bad

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the cursed thing is like

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idk

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well its way too practical for a phd

calm latch Jan 3, 2025, 8:34 PM

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fiery turtle https://github.com/managarm/managarm/blob/master/kernel/common/libc.cpp#L77

and like what happens if you give it misaligned pointers

loud ice Jan 3, 2025, 8:35 PM

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its fine

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you are allowed to do that

calm latch Jan 3, 2025, 8:35 PM

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calm latch Without general regs only <:trl:829316641191886888>

this will explode

loud ice Jan 3, 2025, 8:35 PM

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it wont

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movups is explicitly unaligned

calm latch Jan 3, 2025, 8:36 PM

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Thonk

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I wonder what happens if I give it restrict

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to my code that is

loud ice Jan 3, 2025, 8:37 PM

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inb4 it gets turned into a call to memcpy

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okay so lets try testing this

gentle peak Jan 3, 2025, 8:38 PM

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that's what -fno-builtin/-ffreestanding is for

calm latch Jan 3, 2025, 8:38 PM

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calm latch This is what a dumb memcpy compiles to with clang

Like I'm still convinced that what compiles give you is already good enough

loud ice Jan 3, 2025, 8:38 PM

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okay lets try writing tests

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but good ones this time

calm latch Jan 3, 2025, 8:39 PM

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calm latch I wonder what happens if I give it restrict

It shaved a lot of instructions lol

loud ice Jan 3, 2025, 8:39 PM

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baseline           | mean 115812.91666666667 +- 1033.0985163355087
good memcpy        | mean 157890.83333333334 +- 1977.378657942172
+rust memset       | mean 147968.41666666666 +- 1287.0687489231607
good memcpy/memcmp | mean 161383.16666666666 +- 2146.584592338015
+rust memmove      | mean 159985.08333333334 +- 1673.8996305597188
+rust strlen       | mean 160433.58333333334 +- 1264.8421854959556

gentle peak Jan 3, 2025, 8:40 PM

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i should add a system to proxima that detects at runtime if there's only one cpu and if so switches out some functions for cheaper versions

calm latch Jan 3, 2025, 8:40 PM

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calm latch It shaved a lot of instructions lol

📎 naive_memcpy.txt

gentle peak Jan 3, 2025, 8:40 PM

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for example turning spin_lock_noirq into ret or lock cmpxchg into cmpxchg

loud ice Jan 3, 2025, 8:40 PM

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you should just build two kernels

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one with smp and one without

gentle peak Jan 3, 2025, 8:41 PM

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well yeah but then to be fair to all the smp kernels i'd have to test with the smp version

loud ice Jan 3, 2025, 8:41 PM

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you can test on both

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have one NOSMP and one SMP result

gentle peak Jan 3, 2025, 8:41 PM

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true but that's ugly

calm latch Jan 3, 2025, 8:42 PM

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What happens if I add AVX to pmOS...

loud ice Jan 3, 2025, 8:42 PM

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lol

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okay

loud ice Jan 3, 2025, 8:44 PM

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loud ice ``` baseline | mean 115812.91666666667 +- 1033.0985163355087 good memc...

here are the results

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baseline is already with sso fwiw

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rust memset, memmove and strlen shit

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and memcpy and memcmp good

loud ice Jan 3, 2025, 8:45 PM

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loud ice ``` baseline | mean 115812.91666666667 +- 1033.0985163355087 good memc...

without sso its mean 158841.0 +- 1305.8822066072166

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so its a slight hit

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my dedicated 32 byte slab fastpath was also a big improvement, without it i get mean 158387.5 +- 1826.162830652172

vast kestrel Jan 3, 2025, 8:46 PM

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I wonder if using lock elision will help the lock cmpexchg

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Like the HLE stuff

dense steppe Jan 3, 2025, 8:47 PM

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In the ACPI specification, there's this field called the "hardware signature". Is it possible to cheat the uACPI benchmark by somehow loading a pre-populated namespace if this value matches that of the pre-populated namespace's FADT->Hardware Signature?

fiery turtle Jan 3, 2025, 8:48 PM

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this signature is for resume from S4

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so that the os can distinguish between S4 resume and clean start up

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it doesnt help with namespace preservation

dense steppe Jan 3, 2025, 8:49 PM

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The only thing that determines the hardware signature is the ACPI tables.
this is useless for any uACPI benchmark cheating purposes

torpid ferry Jan 3, 2025, 8:49 PM

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vast kestrel I wonder if using lock elision will help the lock cmpexchg

disabled in ucode on most gens, and unsupported on like 10th gen and above iirc

vast kestrel Jan 3, 2025, 8:49 PM

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I think HLE is different to TSX

fiery turtle Jan 3, 2025, 8:49 PM

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the ram is reset during s4 sleep soo

torpid ferry Jan 3, 2025, 8:49 PM

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HLE is part of TSX i think

vast kestrel Jan 3, 2025, 8:49 PM

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Like it's part of TSX

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But the things with TSX was about RTM no?

calm latch Jan 3, 2025, 8:50 PM

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Quick question, if I have SSE and just do inline void save_sse() { asm volatile(" fxsave %0 " ::"m"(data)); } what do I do to support AVX?

loud ice Jan 3, 2025, 8:50 PM

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you have to use xsave i think?

gentle peak Jan 3, 2025, 8:50 PM

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avx needs xsave yeah

calm latch Jan 3, 2025, 8:50 PM

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But like is it always available?

vast kestrel Jan 3, 2025, 8:50 PM

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Not on CPUs without it

loud ice Jan 3, 2025, 8:51 PM

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i think theres an enable bit

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for all of avx that is

calm latch Jan 3, 2025, 8:51 PM

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Because now I support all x86_64 CPUs

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I don't pass any march

gentle peak Jan 3, 2025, 8:51 PM

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avx is usable if:

xsave is supported and enabled
avx is supported
xsave is configured to save/restore avx registers

calm latch Jan 3, 2025, 8:51 PM

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So like I do CPUID memes, and use XSAVE if it's supported and FXSAVE if not?

gentle peak Jan 3, 2025, 8:51 PM

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yeah

loud ice Jan 3, 2025, 8:52 PM

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loud ice ``` baseline | mean 115812.91666666667 +- 1033.0985163355087 good memc...

using clz in alloc is mean 157427.58333333334 +- 2856.8090871983513

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so i dont know what magic rust is doing

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but evidently its rather fast magic

gentle peak Jan 3, 2025, 8:52 PM

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calm latch So like I do CPUID memes, and use XSAVE if it's supported and FXSAVE if not?

https://github.com/proxima-os/proxima/blob/main/subprojects/hydrogen/kernel/src/cpu/xsave.c heres how i do it

loud ice Jan 3, 2025, 8:53 PM

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wtf memset on free worsened my perf

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these error bars are way too big

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maybe 32 samples would get me close enough

calm latch Jan 3, 2025, 8:55 PM

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Are there x86-64 CPUs which don't support GSBASE?

loud ice Jan 3, 2025, 8:56 PM

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but that makes testing too annoying

loud ice Jan 3, 2025, 8:56 PM

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calm latch Are there x86-64 CPUs which don't support GSBASE?

yes i think so

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but you dont really have to care

calm latch Jan 3, 2025, 8:56 PM

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bruh

loud ice Jan 3, 2025, 8:56 PM

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its hobby osdev

calm latch Jan 3, 2025, 8:56 PM

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that's no swapgs

loud ice Jan 3, 2025, 8:56 PM

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oh hmm

calm latch Jan 3, 2025, 8:56 PM

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what do you do in those situations

loud ice Jan 3, 2025, 8:56 PM

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hmm

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okay i dont know anymore

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oh

calm latch Jan 3, 2025, 8:57 PM

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according to some manual (idr if it's intel or amd) from my memory it's view into segment cache

loud ice Jan 3, 2025, 8:57 PM

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thats not how it works

calm latch Jan 3, 2025, 8:57 PM

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and you can't load segments of 64 bits

vast kestrel Jan 3, 2025, 8:57 PM

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Isn't swapgs architectural to x86-64?

loud ice Jan 3, 2025, 8:57 PM

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i think fsgsbase is for wrfsbase and wrgsbase

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swapgs and the MSRs are separate

vast kestrel Jan 3, 2025, 8:57 PM

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loud ice i think fsgsbase is for wrfsbase and wrgsbase

Yeah those are different

calm latch Jan 3, 2025, 8:57 PM

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oh, the instructions

loud ice Jan 3, 2025, 8:57 PM

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yes

gentle peak Jan 3, 2025, 8:57 PM

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calm latch that's no swapgs

fsgsbase != swapgs

calm latch Jan 3, 2025, 8:57 PM

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ok

gentle peak Jan 3, 2025, 8:57 PM

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swapgs is part of the base x86_64 isa

calm latch Jan 3, 2025, 8:57 PM

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i don't use it

vast kestrel Jan 3, 2025, 8:57 PM

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The msrs and swapgs are architectural

calm latch Jan 3, 2025, 8:58 PM

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i just use msrs

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yeah

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false panic

gentle peak Jan 3, 2025, 8:58 PM

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fsgsbase is the faster way to read/write the GS_BASE and FS_BASE msrs

calm latch Jan 3, 2025, 8:58 PM

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how much faster? Thonk

gentle peak Jan 3, 2025, 8:58 PM

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don't know

calm latch Jan 3, 2025, 8:58 PM

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like is it even worth extra if statement faster?

gentle peak Jan 3, 2025, 8:59 PM

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probably considering they exist

calm latch Jan 3, 2025, 8:59 PM

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I think it's for manipulating them from userspace

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mostly

frank canopy Jan 3, 2025, 8:59 PM

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yeah if you could only enable them for kernelmode id use them

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but i just use MSRs since i dont want to allow userspace messing with fsgsbase

gentle peak Jan 3, 2025, 8:59 PM

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yeah same

calm latch Jan 3, 2025, 8:59 PM

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why not?

gentle peak Jan 3, 2025, 8:59 PM

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makes the paranoid irq entry points a pain

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if you don't enable fsgsbase you can just read the msr and swap if it's a kernel mode address

frank canopy Jan 3, 2025, 9:00 PM

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because fs and gs base is how threadlocals and stuff work in userspace

gentle peak Jan 3, 2025, 9:00 PM

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if you enable fsgsbase userspace can set it to any canonical address they want

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including kernel ones

calm latch Jan 3, 2025, 9:00 PM

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Thonk

gentle peak Jan 3, 2025, 9:00 PM

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so now whether a paranoid irq entrypoint uses valid gs is controllable by userspace

calm latch Jan 3, 2025, 9:00 PM

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just don't be paranoid trl

gentle peak Jan 3, 2025, 9:00 PM

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bit hard for NMIs and MCEs

calm latch Jan 3, 2025, 9:01 PM

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also as someone suggested just store it on top of the NMI's stack

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like one above what gets loaded from tss

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ists*

gentle peak Jan 3, 2025, 9:01 PM

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as in, the IST? that'd work yeah

calm latch Jan 3, 2025, 9:03 PM

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wow sse is bad

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or not

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so CPU tells you the size of xsave stuff?

gentle peak Jan 3, 2025, 9:04 PM

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yeah

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the cpu tells you the features you can enable

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conveniently guaranteed to be in the same format as the register for the features you want to enable

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then once you've set up that register it tells you the size of the context for the features you've enabled

calm latch Jan 3, 2025, 9:05 PM

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no but like it's future compatibility (?)

gentle peak Jan 3, 2025, 9:05 PM

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yes

calm latch Jan 3, 2025, 9:05 PM

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So I just add a few LoC and have AVX

gentle peak Jan 3, 2025, 9:06 PM

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if you unconditionally enable all features with xsave you'll be able to support all future extensions (as long as they don't supersede xsave)

calm latch Jan 3, 2025, 9:12 PM

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xsavec/xsaves?

gentle peak Jan 3, 2025, 9:17 PM

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i personally don't use them

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don't remember why

vast kestrel Jan 3, 2025, 9:18 PM

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I sure do love the offtopic convos that always appear in here

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uACPI thread > any other channel

calm latch Jan 3, 2025, 9:20 PM

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i think it's just a lot of smart people hanging out in progress-report channels

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also AVX is totally related to uACPI

dire owl Jan 3, 2025, 9:24 PM

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loud ice <@535830483863470110> you are the maths expert, how do you calculate a % chance ...

depends on the distribution
but since the numbers are big, it's probably close to a normal distribution

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but already just looking at the numbers I can see it's not statistically significant

loud ice Jan 3, 2025, 9:25 PM

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wonderful

dire owl Jan 3, 2025, 9:25 PM

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a relevant measure would be the difference dvidied by the root mean squared of the errors

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if it is bigger than 3, one typically considers that significant

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this is like

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definitely smaller than 1

loud ice Jan 3, 2025, 9:25 PM

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the value after the +- is std / sqrt(n)

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n=12

dire owl Jan 3, 2025, 9:25 PM

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so consistent with the hypothesis that it makes no difference

dire owl Jan 3, 2025, 9:26 PM

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loud ice the value after the +- is std / sqrt(n)

makes sense

loud ice Jan 3, 2025, 9:26 PM

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oh also * 1.96

calm latch Jan 3, 2025, 10:04 PM

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gentle peak https://github.com/proxima-os/proxima/blob/main/subprojects/hydrogen/kernel/src/...

Shouldn't like 41 be ECX?

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gentle peak Jan 3, 2025, 10:05 PM

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EBX = everything that's enabled
ECX = everything that the cpu supports

calm latch Jan 3, 2025, 10:05 PM

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When I initialize my kernel, ebx is 576 and ecx is 2432

gentle peak Jan 3, 2025, 10:05 PM

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in this case they should be the same

calm latch Jan 3, 2025, 10:05 PM

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maybe I do it in a different order

gentle peak Jan 3, 2025, 10:05 PM

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you need to set up xcr0 before getting the size

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if you do that you should be good

calm latch Jan 3, 2025, 10:06 PM

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or use ecx

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yeah

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not your bug

gentle peak Jan 3, 2025, 10:07 PM

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ecx should always be big enough yeah but it might be too big if you choose to disable certain features

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so you might have some wasted space if you use ecx

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shouldn't matter that much though

fiery turtle Jan 3, 2025, 10:09 PM

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@gentle peak btw why do u manually add uacpi's sources if it exposes them via a meson.build?

gentle peak Jan 3, 2025, 10:09 PM

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you can't have recursive subprojects in meson

fiery turtle Jan 3, 2025, 10:09 PM

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u can have a wrap no?

gentle peak Jan 3, 2025, 10:09 PM

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and i didn't want uacpi to be a sibling of hydrogen because it's not really a separate thing

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uhh

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i've never used wraps

calm latch Jan 3, 2025, 10:10 PM

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I almost have AVX but it pagefaults doing xrstor (%rcx) nooo

fiery turtle Jan 3, 2025, 10:10 PM

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anyway im not good at meson so idk what that means

dusky glade Jan 3, 2025, 10:10 PM

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hi

gentle peak Jan 3, 2025, 10:10 PM

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fiery turtle anyway im not good at meson so idk what that means

basically if you have meson.build subprojects/ a/ meson.build subprojects/ b/ and subprojects/a/meson.build does subproject('b') it'll try to look at subprojects/b instead of subprojects/a/subprojects/b

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this is an intentional design choice

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i don't like it personally but whatever

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oh wait nevermind i lied apparently the meson documentation is just wrong

calm latch Jan 3, 2025, 10:12 PM

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calm latch I almost have AVX but it pagefaults doing `xrstor (%rcx)` <:nooo:750466870993223...

struct SSE_Data {
    klib::unique_ptr<u8[]> data = nullptr;
    ...
};

void SSE_Data::restore_sse()
{
    switch (sse_ctx_style) {
    case SSECtxStyle::FXSAVE:
        asm volatile("fxrstorq (%0)" : : "r"(data.get()));
        break;
    case SSECtxStyle::XSAVE:
    case SSECtxStyle::XSAVEOPT:
        asm volatile("xrstor (%0)" : : "r"(data.get()), "a"(0xFFFFFFFF), "d"(0xFFFFFFFF));
        break;
    default:
        assert(false);
    }
}

Does this look ok?

mortal yoke Jan 3, 2025, 10:12 PM

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you want to use xrstorq too

calm latch Jan 3, 2025, 10:13 PM

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It's passing rcx

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in assembly

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;     switch (sse_ctx_style) {
ffffffff8000672c: 74 0f                    je    0xffffffff8000673d <sse_exception_manager+0x3d>
;         asm("xrstorq (%0)" : : "r"(data.get()), "a"(0xFFFFFFFF), "d"(0xFFFFFFFF));
ffffffff8000672e: b8 ff ff ff ff           movl    $0xffffffff, %eax       # imm = 0xFFFFFFFF
ffffffff80006733: ba ff ff ff ff           movl    $0xffffffff, %edx       # imm = 0xFFFFFFFF
ffffffff80006738: 0f ae 29                 xrstor    (%rcx)

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I think I'm going to finally make kernel print %cr2 on pagefaults galaxybrain

mortal yoke Jan 3, 2025, 10:15 PM

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mortal yoke you want to use xrstorq too

(to keep the legacy state in the same format)

calm latch Jan 3, 2025, 10:16 PM

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huh

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so it's not what I thought

mortal yoke Jan 3, 2025, 10:16 PM

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xrstor uses a different format for the x87 state than xrstorq

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the same way as fxrstor and fxrstorq are different

calm latch Jan 3, 2025, 10:17 PM

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Wait a second

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It's not a pagefault

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It's #GP

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This means that my cr4 is garbage

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or misaligned pointer

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nope

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rcx: 0xFFFF80000001B020

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cr4: 40620

gentle peak Jan 3, 2025, 10:22 PM

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yeah you didn't set osxsave

calm latch Jan 3, 2025, 10:24 PM

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Isn't 1 << 18 == 0x40000?

gentle peak Jan 3, 2025, 10:25 PM

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oh that's in hex

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is the xsave area initialized?

calm latch Jan 3, 2025, 10:25 PM

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I memset it to 0

gentle peak Jan 3, 2025, 10:26 PM

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oh wait

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it's an alignment issue

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xsave requires 64-byte alignment

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yours is 32-byte aligned

calm latch Jan 3, 2025, 10:26 PM

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bruh

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I don't have alligned malloc

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I think at least

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Maybe I do

mortal yoke Jan 3, 2025, 10:27 PM

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just overallocate it in pages lol

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its not that much memory wasted anyway

calm latch Jan 3, 2025, 10:28 PM

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calm latch Maybe I do

I do indeed have it trl

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(I use dlmalloc as kernel heap galaxybrain )

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(it's like 1/3 of my kernel in terms of LoC)

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Ok I think I have AVX

gentle peak Jan 3, 2025, 10:38 PM

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one way to check is qemu's info registers, if AVX is usable the output will be formatted like this

calm latch Jan 3, 2025, 10:38 PM

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I'm compiling for -march=znver3

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I think it's faster on my laptop...

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chad

📎 message.txt

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;         *((char *)dest++) = *((char *)src++);
  24acd0: c5 fc 10 04 3e               vmovups(%rsi,%rdi), %ymm0
  24acd5: c5 fc 10 4c 3e 20            vmovups0x20(%rsi,%rdi), %ymm1
  24acdb: c5 fc 10 54 3e 40            vmovups0x40(%rsi,%rdi), %ymm2
  24ace1: c5 fc 10 5c 3e 60            vmovups0x60(%rsi,%rdi), %ymm3
  24ace7: c5 fc 11 04 38               vmovups%ymm0, (%rax,%rdi)
  24acec: c5 fc 11 4c 38 20            vmovups%ymm1, 0x20(%rax,%rdi)
  24acf2: c5 fc 11 54 38 40            vmovups%ymm2, 0x40(%rax,%rdi)
  24acf8: c5 fc 11 5c 38 60            vmovups%ymm3, 0x60(%rax,%rdi)

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Same as phd memcpy

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📎 pmOS.iso

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I think zen 3 is weaker than latest intel so...

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can someone with fast intel test it? 🙏

gentle peak Jan 3, 2025, 10:44 PM

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i'm also on zen 3 so shouldn't be too different from what you got but on my pc it's 1.2M/s

calm latch Jan 3, 2025, 10:45 PM

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I get this on 5900X

mortal yoke Jan 3, 2025, 10:45 PM

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calm latch can someone with fast intel test it? 🙏

what is the avg lol

gentle peak Jan 3, 2025, 10:45 PM

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that's what you get when it's zero nanoseconds

calm latch Jan 3, 2025, 10:45 PM

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Can you give it deadline tsc?

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qemu-system-x86_64 -serial stdio -m 512M -cpu max,+hypervisor,+invtsc,+tsc-deadline -M q35 -accel kvm -cdrom limine/pmOS.iso -smp 1

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invariant*

mortal yoke Jan 3, 2025, 10:46 PM

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ah now it looks realistic

calm latch Jan 3, 2025, 10:46 PM

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I don't have kvm clock sadmeme

calm latch Jan 3, 2025, 10:47 PM

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mortal yoke ah now it looks realistic

Which CPU is that?

mortal yoke Jan 3, 2025, 10:47 PM

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i5 13600k

median crest Jan 3, 2025, 10:47 PM

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calm latch I don't have kvm clock <:sadmeme:659848285510565907>

its piss easy to implement

calm latch Jan 3, 2025, 10:47 PM

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Not if your clocks stuff is a mess

median crest Jan 3, 2025, 10:47 PM

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you cannot mess kvm clock up

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it is literally a monotonic nanosecond clock for free

gentle peak Jan 3, 2025, 10:48 PM

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proxima's clocks stuff needs to be reworked too because right now it cannot cope with a time source that changes frequency

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or with any non-tsc time source for that matter

calm latch Jan 3, 2025, 10:48 PM

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which time sources are those?

gentle peak Jan 3, 2025, 10:48 PM

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kvmclock

calm latch Jan 3, 2025, 10:48 PM

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I mean those that change frequency

gentle peak Jan 3, 2025, 10:48 PM

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yeah, kvmclock

#

let me rephrase that a bit
proxima currently uses TSC ticks as its internal time unit in a bunch of places, and it cannot cope if the TSC changes frequency

calm latch Jan 3, 2025, 10:49 PM

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My kernel can only calibrate with PIC and only uses LAPIC for scheduling and if there's not invariant TSC, it's also using lapic for monotonic time

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With 20Hz interrupts or so

gentle peak Jan 3, 2025, 10:50 PM

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kvmclock gives you a mapping from tsc->ns that automatically changes if tsc freq changes

mortal yoke Jan 3, 2025, 10:50 PM

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why would it change tho

gentle peak Jan 3, 2025, 10:50 PM

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vm migration to another cpu that has a different tsc frequency

median crest Jan 3, 2025, 10:50 PM

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vm migration

gentle peak Jan 3, 2025, 10:51 PM

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calm latch My kernel can only calibrate with PIC and only uses LAPIC for scheduling and if ...

proxima just assumes that tsc is invariant, if the bit isn't set it prints a warning but it'll still act as if it is

calm latch Jan 3, 2025, 10:52 PM

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mortal yoke ah now it looks realistic

I think AVX didn't change anything

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I'm suspecting it's issue with locks meme

calm latch Jan 3, 2025, 10:54 PM

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gentle peak vm migration to another cpu that has a different tsc frequency

How do you even detect that it happens?

gentle peak Jan 3, 2025, 10:55 PM

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basically how kvmclock works is you give it a physical address to a structure that holds the conversion info

calm latch Jan 3, 2025, 10:55 PM

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You write to msr and it updates that

gentle peak Jan 3, 2025, 10:55 PM

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nope it auto updates

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before the vm gets migrated a flag in that conversion info gets set that basically says 'hey this conversion info is invalid'

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when the vm has been migrated it changes the conversion info and clears the flag

calm latch Jan 3, 2025, 10:56 PM

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but it also gives you time in nanoseconds

median crest Jan 3, 2025, 10:56 PM

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https://github.com/Mathewnd/Astral/blob/rewrite/kernel-src/arch/x86-64/kvmclock.c

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its unreadable astral code but it should give you an idea

calm latch Jan 3, 2025, 10:57 PM

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looks like average C to me

gentle peak Jan 3, 2025, 10:57 PM

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calm latch but it also gives you time in nanoseconds

are we looking at the same docs?

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this is the one i'm looking at

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when it starts updating flags is changed to indicate that

calm latch Jan 3, 2025, 10:58 PM

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I'm telling from memory

gentle peak Jan 3, 2025, 10:58 PM

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it changes tsc_to_system_mul and tsc_shift and then clears the bit in flags

calm latch Jan 3, 2025, 10:58 PM

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The MSR doc said that this structure gets updates when you write it

gentle peak Jan 3, 2025, 10:58 PM

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it gets updated on the initial write and every time it needs to be changed afterwards

calm latch Jan 3, 2025, 10:59 PM

#

gentle peak Jan 3, 2025, 10:59 PM

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oh it changes version actually

gentle peak Jan 3, 2025, 10:59 PM

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calm latch

yeah that's a different msr

median crest Jan 3, 2025, 10:59 PM

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different msr yeah

gentle peak Jan 3, 2025, 10:59 PM

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i'm not sure what the purpose is of that one

calm latch Jan 3, 2025, 10:59 PM

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gentle peak this is the one i'm looking at

I mean this makes sense

median crest Jan 3, 2025, 11:00 PM

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gentle peak i'm not sure what the purpose is of that one

I think its for getting the time of day from the host

calm latch Jan 3, 2025, 11:00 PM

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calm latch

But it's unrealistic to be updating this all the time

gentle peak Jan 3, 2025, 11:00 PM

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yeah that one doesnt auto update

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or well it can if the hypervisor impl feels like it

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but its not guaranteed to

vast kestrel Jan 3, 2025, 11:03 PM

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does the acpidumps repo have the qemu tables by any chance?

dusky glade Jan 3, 2025, 11:03 PM

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i am in ur walls by chance

vast kestrel Jan 3, 2025, 11:04 PM

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I sure do not hope so given they are made of reinforced concrete

dusky glade Jan 3, 2025, 11:04 PM

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i am crawling out of them

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muhehe

calm latch Jan 3, 2025, 11:07 PM

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calm latch ```x86asm ; *((char *)dest++) = *((char *)src++); 24acd0: c5 fc 10 04 ...

most same compilers wont unroll this because of code size
@left orbit

left orbit Jan 3, 2025, 11:08 PM

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well this is vectorized

calm latch Jan 3, 2025, 11:08 PM

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I think I've used the wrong term

left orbit Jan 3, 2025, 11:08 PM

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i'd say that's a slightly different case

gentle peak Jan 3, 2025, 11:08 PM

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median crest <https://github.com/Mathewnd/Astral/blob/rewrite/kernel-src/arch/x86-64/kvmclock...

btw do you know if the tsc deadline register gets auto corrected when the tsc frequency changes?

left orbit Jan 3, 2025, 11:08 PM

#

you probably wouldn't get an unrolled loop with -mgeneral-regs-only

calm latch Jan 3, 2025, 11:09 PM

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You do

#

;         ((char *)to)[i] = ((const char *)from)[i];
ffffffff8003d3e0: 44 0f b6 0c 3e           movzbl    (%rsi,%rdi), %r9d
ffffffff8003d3e5: 44 88 0c 38              movb    %r9b, (%rax,%rdi)
ffffffff8003d3e9: 44 0f b6 4c 3e 01        movzbl    0x1(%rsi,%rdi), %r9d
ffffffff8003d3ef: 44 88 4c 38 01           movb    %r9b, 0x1(%rax,%rdi)
ffffffff8003d3f4: 44 0f b6 4c 3e 02        movzbl    0x2(%rsi,%rdi), %r9d
ffffffff8003d3fa: 44 88 4c 38 02           movb    %r9b, 0x2(%rax,%rdi)
ffffffff8003d3ff: 44 0f b6 4c 3e 03        movzbl    0x3(%rsi,%rdi), %r9d
ffffffff8003d405: 44 88 4c 38 03           movb    %r9b, 0x3(%rax,%rdi)
ffffffff8003d40a: 44 0f b6 4c 3e 04        movzbl    0x4(%rsi,%rdi), %r9d
ffffffff8003d410: 44 88 4c 38 04           movb    %r9b, 0x4(%rax,%rdi)
ffffffff8003d415: 44 0f b6 4c 3e 05        movzbl    0x5(%rsi,%rdi), %r9d
ffffffff8003d41b: 44 88 4c 38 05           movb    %r9b, 0x5(%rax,%rdi)
ffffffff8003d420: 44 0f b6 4c 3e 06        movzbl    0x6(%rsi,%rdi), %r9d
ffffffff8003d426: 44 88 4c 38 06           movb    %r9b, 0x6(%rax,%rdi)
ffffffff8003d42b: 44 0f b6 4c 3e 07        movzbl    0x7(%rsi,%rdi), %r9d
ffffffff8003d431: 44 88 4c 38 07           movb    %r9b, 0x7(%rax,%rdi)
ffffffff8003d436: 44 0f b6 4c 3e 08        movzbl    0x8(%rsi,%rdi), %r9d
ffffffff8003d43c: 44 88 4c 38 08           movb    %r9b, 0x8(%rax,%rdi)
ffffffff8003d441: 44 0f b6 4c 3e 09        movzbl    0x9(%rsi,%rdi), %r9d
ffffffff8003d447: 44 88 4c 38 09           movb    %r9b, 0x9(%rax,%rdi)
ffffffff8003d44c: 44 0f b6 4c 3e 0a        movzbl    0xa(%rsi,%rdi), %r9d
ffffffff8003d452: 44 88 4c 38 0a           movb    %r9b, 0xa(%rax,%rdi)
ffffffff8003d457: 44 0f b6 4c 3e 0b        movzbl    0xb(%rsi,%rdi), %r9d
ffffffff8003d45d: 44 88 4c 38 0b           movb    %r9b, 0xb(%rax,%rdi)
ffffffff8003d462: 44 0f b6 4c 3e 0c        movzbl    0xc(%rsi,%rdi), %r9d
ffffffff8003d468: 44 88 4c 38 0c           movb    %r9b, 0xc(%rax,%rdi)
ffffffff8003d46d: 44 0f b6 4c 3e 0d        movzbl    0xd(%rsi,%rdi), %r9d
ffffffff8003d473: 44 88 4c 38 0d           movb    %r9b, 0xd(%rax,%rdi)
ffffffff8003d478: 44 0f b6 4c 3e 0e        movzbl    0xe(%rsi,%rdi), %r9d
ffffffff8003d47e: 44 88 4c 38 0e           movb    %r9b, 0xe(%rax,%rdi)
ffffffff8003d483: 44 0f b6 4c 3e 0f        movzbl    0xf(%rsi,%rdi), %r9d
ffffffff8003d489: 44 88 4c 38 0f           movb    %r9b, 0xf(%rax,%rdi)

left orbit Jan 3, 2025, 11:10 PM

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oh god what in the fuck is that

calm latch Jan 3, 2025, 11:10 PM

#

clang

gentle peak Jan 3, 2025, 11:10 PM

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llvm tends not to care too much about code size

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dont know about gcc

median crest Jan 3, 2025, 11:11 PM

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gentle peak btw do you know if the tsc deadline register gets auto corrected when the tsc fr...

probably not, since the kvmclock part acts on top of the tsc

calm latch Jan 3, 2025, 11:11 PM

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I'm gonna add restrict

left orbit Jan 3, 2025, 11:11 PM

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calm latch ```x86asm ; ((char *)to)[i] = ((const char *)from)[i]; ffffffff8003d3e0:...

what compiler flags did you use?

gentle peak Jan 3, 2025, 11:11 PM

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median crest probably not, since the kvmclock part acts on top of the tsc

fuck

#

well its not too bad actually my code can handle a 'spurious' tsc deadline trigger

#

im mostly worried about events being late if the tsc frequency decreases

calm latch Jan 3, 2025, 11:14 PM

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calm latch ```x86asm ; ((char *)to)[i] = ((const char *)from)[i]; ffffffff8003d3e0:...

But it's copying 1 byte at a time

#

I.e. doing what it was told

#

And not using misaligned movq

calm latch Jan 3, 2025, 11:15 PM

#

gentle peak im mostly worried about events being late if the tsc frequency decreases

what's the problem with that?

#

Unless you're realtime

#

In which case why are you running in a VM

gentle peak Jan 3, 2025, 11:16 PM

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i don't think it'll have too many bad consequences but i don't like the concept

calm latch Jan 3, 2025, 11:16 PM

#

I would be more worried about events arriving early

gentle peak Jan 3, 2025, 11:17 PM

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oh no that's not a problem since i decided the best way to handle cancelling events on another cpu was to just let the interrupt fire and trigger none of the remaining events

calm latch Jan 3, 2025, 11:18 PM

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No but like let's say you're waiting on hardware to time out

#

And suddenly your clock runs 10x faster

#

idk if that's possible but still

#

yeah

gentle peak Jan 3, 2025, 11:18 PM

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the interrupt will arrive early, the timing code will notice that the earliest event has its threshold after the current time, so none of the events get triggered and the deadline gets reprogrammed

calm latch Jan 3, 2025, 11:19 PM

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You'd ask kvmclock for time

dense steppe Jan 3, 2025, 11:19 PM

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When an interrupt happens, you just look at kvmclock and ask "has this changed?"

calm latch Jan 3, 2025, 11:20 PM

#

No

#

You have a queue of events

#

A heap tabien

gentle peak Jan 3, 2025, 11:20 PM

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calm latch You'd ask kvmclock for time

if you're in a polling loop with timeout, the api you're using returns nanoseconds so there's no issue
if you're using the timing events subsystem, it'll notice that the interrupt arrived early and return without triggering any events

calm latch Jan 3, 2025, 11:21 PM

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calm latch You have a queue of events

When you get an interrupt, you look at the front of priority queue, however it's implemented, and if its time is smaller than system clock, you fire the event

gentle peak Jan 3, 2025, 11:21 PM

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its time wouldnt be smaller than the system clock though

#

because both times would be stored in nanoseconds

calm latch Jan 3, 2025, 11:22 PM

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Yeah that's what I'm saying, things arriving early is not a problem

gentle peak Jan 3, 2025, 11:22 PM

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oh i thought you were trying to say it is a problem

calm latch Jan 3, 2025, 11:22 PM

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I didn't think about that

calm latch Jan 3, 2025, 11:22 PM

#

gentle peak oh i thought you were trying to say it is a problem

I was initially

dense steppe Jan 3, 2025, 11:22 PM

#

Anyways a changing TSC frequency is not something that should normally happen. If one wants a migratable kernel, it is probably possible to get some sort of interrupt/event delivered before and after migration. It isn't worth it for me to worry about VM migration

calm latch Jan 3, 2025, 11:23 PM

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It's not up to the kernel to decide if it want's to be moved (?)

calm latch Jan 3, 2025, 11:23 PM

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dense steppe Anyways a changing TSC frequency is not something that should normally happen. I...

If you're asking these questions it's probably not

dense steppe Jan 3, 2025, 11:24 PM

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calm latch It's not up to the kernel to decide if it want's to be moved (?)

No. But there will always be weird things that the user can do, and we can decide what weird usecases to support or not. Do you have any use case right now for migration of your kernel?

calm latch Jan 3, 2025, 11:25 PM

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What

#

User can throw their PC out the window

#

And the kernel would also not be able to stop that

dense steppe Jan 3, 2025, 11:26 PM

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yeah the kernel certainly cannot do anything about that lol

calm latch Jan 3, 2025, 11:26 PM

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dense steppe No. But there will always be weird things that the user can do, and we can decid...

It's the hypervisor that does the migration

dense steppe Jan 3, 2025, 11:26 PM

#

yeah

#

but AFAIK that requires either of:

user interaction. you tell QEMU to migrate the kernel (or suspend execution I guess)
someone runs your kernel in a datacenter or something which auto-migrates.
until either of these happen, we don't have to care about migration

calm latch Jan 3, 2025, 11:28 PM

#

yeah

dense steppe Jan 3, 2025, 11:28 PM

#

when they do happen, support for it can be fixed

calm latch Jan 3, 2025, 11:29 PM

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but at that point the os would have enough functionality for user to be interested in running it in a datacenter

dense steppe Jan 3, 2025, 11:32 PM

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calm latch but at that point the os would have enough functionality for user to be interest...

it's a valid argument that it is often hard to retro-fit new functionality into something that was designed without it in mind.

slim panther Jan 4, 2025, 2:07 AM

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[ 0.005160] [ 0] acpi: successfully loaded 1 AML blob, 1711 ops in 0ms (avg 4032334/s) 4M cracked without SIMD

fiery turtle Jan 4, 2025, 9:42 AM

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slim panther `[ 0.005160] [ 0] acpi: successfully loaded 1 AML blob, 1711 ops in 0ms ...

LETSFUCKINGGOOOOOO

fiery turtle Jan 4, 2025, 12:28 PM

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slowly adding support for write-then-read fields to uACPI (IPMI, SMBus, GeneralPurposeIO, GenericSerialBus, etc)

#

i have to propagate this response all the way from field dispatch code, kinda annoying

#

@mortal yoke qacpi support for this crap when

mortal yoke Jan 4, 2025, 12:31 PM

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I wonder how hard would that be

#

well ig its not that hard but annoying yeah

fiery turtle Jan 4, 2025, 12:31 PM

#

yeah its annoying af

mortal yoke Jan 4, 2025, 12:32 PM

#

does it always return a buffer or can it also return an integer?

fiery turtle Jan 4, 2025, 12:32 PM

#

also all fields work with u64 accesses atm, and this requires a buffer

fiery turtle Jan 4, 2025, 12:32 PM

#

mortal yoke does it always return a buffer or can it also return an integer?

only buffers

mortal yoke Jan 4, 2025, 12:32 PM

#

ah

fiery turtle Jan 4, 2025, 12:33 PM

#

technically u cant even store an int

#

well ACPICA errors out

#

i will support that because my code is generic enough

#

#

this is ACPICA

mortal yoke Jan 4, 2025, 12:34 PM

#

do you also pass the source as-is to the handler?

fiery turtle Jan 4, 2025, 12:35 PM

#

nah you will have to allocate a separate buffer and memcpy

#

and then that buffer is returned to the caller

#

so the source stays unmodified

#

so basically:

take src
allocate a buffer with the size required by protocol + field attribute specifier
memcpy src to buffer
pass buffer to address space handler
address space handler reads the buffer then memcpies the response into it
the buffer is returned back to AML from the store op

#

uacpi_status uacpi_dispatch_opregion_io(
    uacpi_namespace_node *region_node, uacpi_field_unit *field,
    uacpi_u32 offset, uacpi_region_op op, uacpi_u64 *in_out
)

My current field dispatch thing looks like this, i guess ill have to make this u64 a union of either u64 or buffer depending on field type

mortal yoke Jan 4, 2025, 12:42 PM

#

yeah idk if there are any other good options

#

ig Ill implement this in qacpi too, maybe also some kind of table api finally so I can implement most of the remaining ops lol

fiery turtle Jan 4, 2025, 12:43 PM

#

its really annoying how they shoved completely different functionality into the classic field op

#

just make a separate op or something

#

because this breaks like all abstractions

#

u cant even have generic trace_field_io

#

because the write is actually both a write and a read and its actually done on a buffer and not a u64

fiery turtle Jan 4, 2025, 12:44 PM

#

mortal yoke ig Ill implement this in qacpi too, maybe also some kind of table api finally so...

lol yeah

mortal yoke Jan 4, 2025, 12:45 PM

#

also other thing that I should do is breaking the huge 1k line switch to separate functions but that's a huge pain

fiery turtle Jan 4, 2025, 12:45 PM

#

Load will be useful as soon as u start using capability detection

#

because it loads extra aml code when u do that

fiery turtle Jan 4, 2025, 12:46 PM

#

mortal yoke also other thing that I should do is breaking the huge 1k line switch to separat...

iirc the only bad thing about it is it uses a lot of stack in debug mode?

#

Well as far as Load/LoadTable i have so many tests for that with probably 100% coverage of those ops so u cant screw it up

mortal yoke Jan 4, 2025, 12:47 PM

#

fiery turtle iirc the only bad thing about it is it uses a lot of stack in debug mode?

pretty much yeah, its not really that urgent but its slightly annoying that you have to basically compile the interpreter file with O2 even in debug mode unless you have a huge stack

fiery turtle Jan 4, 2025, 12:47 PM

#

Btw if u want NT compat u pretty much must implement Load/LoadTable as fake function calls

#

because mutex state and stuff is preserved across the load boundaries

#

not that its hard tbh

#

idk why acpica didnt do it

#

acpica full on allocates an entirely new interpreter state from scratch and goes into recursion

mortal yoke Jan 4, 2025, 12:52 PM

#

what about stuff like Local0, are they also separate for the load or are they the global ones (or local to the method where the load is called?)

fiery turtle Jan 4, 2025, 12:52 PM

#

its an entirely fresh method, so locals are fresh as well

#

table loads are like anonymous methods with a scope of \ by default

#

and well the fact that named objects are preserved

mortal yoke Jan 4, 2025, 12:53 PM

#

ah that's actually nice, so basically the only thing you have to make sure is that the nodes created inside that method don't get destroyed at the end

#

yeah

fiery turtle Jan 4, 2025, 12:53 PM

#

and one more catch

#

u gotta make sure to discard anything that it may try to Return

#

so that its not magically returned by Load etc

mortal yoke Jan 4, 2025, 12:54 PM

#

should be easy enough, I just mark the method's op frame as not needing a result and the return value is not pushed

fiery turtle Jan 4, 2025, 12:54 PM

#

ah

mortal yoke Jan 4, 2025, 12:55 PM

#

that's what I already do if you call a method that returns something and discard its result

fiery turtle Jan 4, 2025, 12:55 PM

#

i see

#

btw limited recursion depth and while timeouts when

mortal yoke Jan 4, 2025, 1:00 PM

#

really the only recursion is with the refcounted things, ig I could convert that to queue-based unref

fiery turtle Jan 4, 2025, 1:00 PM

#

no i mean like

#

AML call stack depth

mortal yoke Jan 4, 2025, 1:01 PM

#

ah lol

fiery turtle Jan 4, 2025, 1:01 PM

#

// Name: Infinite recursion eventually ends
// Expect: int => 0

DefinitionBlock ("", "DSDT", 2, "uTEST", "TESTTABL", 0xF0F0F0F0)
{
    Name (MAIN, 0xDEADBEEF)
    Name (ITER, 0)

    Method (HANG) {
        ITER++
        HANG()
    }

    HANG()
    Printf("Recursed %o times before stopping", ToDecimalString(ITER))

    If (ITER > 64) {
        MAIN = 0
    } Else {
        Debug = "Recursion depth was too small"
    }
}

#

i want u to pass this test

mortal yoke Jan 4, 2025, 1:01 PM

#

well it wouldn't be hard, I'd just have to check the amount of method frames in call

fiery turtle Jan 4, 2025, 1:01 PM

#

this also tests the fact that method aborts dont abort the entire table load

mortal yoke Jan 4, 2025, 1:01 PM

#

is that a new test?

fiery turtle Jan 4, 2025, 1:02 PM

#

its pretty old

mortal yoke Jan 4, 2025, 1:06 PM

#

maybe I added like 7 month old tests when I added them 2 months ago lol

fiery turtle Jan 4, 2025, 1:07 PM

#

bruh

winter orbit Jan 4, 2025, 4:43 PM

#

I’ll repost this here now since I’m working on making it presentable now, I’m like 40% done

#

https://youtube.com/shorts/gUEzkglsXn4?si=JzJa7G1GWEHMV-6r

YouTube

The_DarkFire_

ReactOS ACPI / uACPI windows driver wakes up windows 10 for the fir...

▶ Play video

north holly Jan 4, 2025, 4:43 PM

#

holy shit

winter orbit Jan 4, 2025, 4:43 PM

#

There’s some weirdness here since windows just takes in the raw ACPI tables and redoes some stuff in Po for some reason

#

But I’ll explain it later it’ll (probably) make sense

#

trl

north holly Jan 4, 2025, 4:44 PM

#

now what score does it get trl

winter orbit Jan 4, 2025, 4:44 PM

#

very bad atm I got a lot of clean up to do

#

Linux is faster

left orbit Jan 4, 2025, 4:44 PM

#

holy shit what?

winter orbit Jan 4, 2025, 4:45 PM

#

yeah I think that’s my fault though

left orbit Jan 4, 2025, 4:45 PM

#

no no like

#

how???

winter orbit Jan 4, 2025, 4:45 PM

#

So I’ll get a final score when I finish rewrite

left orbit Jan 4, 2025, 4:45 PM

#

how did u get windows to do that with uacpi

#

is my question

#

doesn't windows have it's own aml interpreter and all

winter orbit Jan 4, 2025, 4:46 PM

#

Windows reimplements a lot of its sleep logic in Po

jaunty fox Jan 4, 2025, 4:46 PM

#

po, one of the great rivers of europe

winter orbit Jan 4, 2025, 4:46 PM

#

left orbit doesn't windows have it's own aml interpreter and all

yes

#

It has 3

north holly Jan 4, 2025, 4:46 PM

#

jaunty fox po, one of the great rivers of europe

po, the dragon warrior

winter orbit Jan 4, 2025, 4:46 PM

#

ACPI.sys is one of the main ones

#

Which is now uACPI

left orbit Jan 4, 2025, 4:46 PM

#

can you use uacpi for the actual aml parsing+interpreting

#

oh damn

winter orbit Jan 4, 2025, 4:46 PM

#

yeah

left orbit Jan 4, 2025, 4:46 PM

#

that is so cool

#

good job!

north holly Jan 4, 2025, 4:47 PM

#

now when make fast angr

winter orbit Jan 4, 2025, 4:47 PM

#

I’m trying it’s very ugly hacks atm

#

I had to reverse 80 interfaces

#

It was a pain

north holly Jan 4, 2025, 4:47 PM

#

winter orbit Windows reimplements a lot of its sleep logic in Po

does that mean you won't be able to shutdown/S3 suspend?

jaunty fox Jan 4, 2025, 4:47 PM

#

was react os previously using the ACPICA?

winter orbit Jan 4, 2025, 4:47 PM

#

Correct

winter orbit Jan 4, 2025, 4:47 PM

#

north holly does that mean you won't be able to shutdown/S3 suspend?

Correct for now

#

We have a PR to fix this

jaunty fox Jan 4, 2025, 4:48 PM

#

infy says they refuse to be windows compatible in acpica, so this should be more fitting

winter orbit Jan 4, 2025, 4:48 PM

#

https://github.com/reactos/reactos/pull/5719

GitHub

[NTOSKRNL] Implement the power manager by GeoB99 · Pull Request #57...

ReactOS lacks on any fundamental power management mechanisms in the kernel. We do not have power policies support, no power action functions, battery support is inexistent, we do not implement hibe...

winter orbit Jan 4, 2025, 4:48 PM

#

jaunty fox infy says they refuse to be windows compatible in acpica, so this should be more...

This is far more fitting

#

I tried to do this with ACPICA too at least to show some behavior comarisions

#

Nothing

#

It can’t even get close

north holly Jan 4, 2025, 4:49 PM

#

hey if reactos needs a reference for S3 suspend

#

obos has done it

#

trl

#

(obos shilling complete)

winter orbit Jan 4, 2025, 4:49 PM

#

I’ve already looked at obos

north holly Jan 4, 2025, 4:49 PM

#

who dat

#

oh

winter orbit Jan 4, 2025, 4:50 PM

#

Like I work in bios dev so I know how window suspend works

#

But examples helped

left orbit Jan 4, 2025, 4:50 PM

#

@winter orbit kind of an off topic question, but do you know
a) can windows run on platforms without acpi
b) can you patch hal.sys to add support for different interrupt controllers
it was on my to-do list for a long time but i wanted to look at how to get windows up an running on apple sillicon without doing some weird gic emulation but instead just replace hal with one that supports apple's interrupt controller (which is the big issue with windows iirc)

#

and by windows i mean modern windows, like latest windows 11 or something

winter orbit Jan 4, 2025, 4:51 PM

#

A) no

left orbit Jan 4, 2025, 4:51 PM

#

ah

winter orbit Jan 4, 2025, 4:51 PM

#

B) Hal is gone in win10 22+

left orbit Jan 4, 2025, 4:51 PM

#

so i do need to fake some acpi tables for it

#

damn what?

winter orbit Jan 4, 2025, 4:51 PM

#

you need to implement some real ACPI tables

#

And also

#

Making a interrupt controller for windows is now almost impossible

#

Allegedly there’s some new way but we haven’t started learning yet

jaunty fox Jan 4, 2025, 4:52 PM

#

winter orbit B) Hal is gone in win10 22+

is it gone altogether? i heard it was merely compiled into one binary with the kenrel

winter orbit Jan 4, 2025, 4:52 PM

#

Gic Supoort is now injected into NTOSKRNL as a lib

winter orbit Jan 4, 2025, 4:52 PM

#

jaunty fox is it gone altogether? i heard it was merely compiled into one binary with the k...

it’s just libraries now

#

All inside ntoskrnl

jaunty fox Jan 4, 2025, 4:52 PM

#

good for optimisation this way

left orbit Jan 4, 2025, 4:52 PM

#

would patching ntoskrnl technically work?

winter orbit Jan 4, 2025, 4:52 PM

#

Not going to lie to you, no

left orbit Jan 4, 2025, 4:53 PM

#

damn

#

sad

winter orbit Jan 4, 2025, 4:53 PM

#

There might be some new kmdf thing windows allows

left orbit Jan 4, 2025, 4:53 PM

#

hypervisor + gic emulation is the only reasonable way then

winter orbit Jan 4, 2025, 4:53 PM

#

To our knowledge yes

left orbit Jan 4, 2025, 4:53 PM

#

winter orbit There might be some new kmdf thing windows allows

i don't think loading drivers that early would be allowed

winter orbit Jan 4, 2025, 4:53 PM

#

there used to be a system for using other controllers

winter orbit Jan 4, 2025, 4:53 PM

#

left orbit i don't think loading drivers *that* early would be allowed

Oh it is

left orbit Jan 4, 2025, 4:53 PM

#

like before any interrupt controller is set up?

winter orbit Jan 4, 2025, 4:54 PM

#

yup

left orbit Jan 4, 2025, 4:54 PM

#

damn okay

winter orbit Jan 4, 2025, 4:54 PM

#

But figuring it what secret system windows made isn’t optimal yet

#

we don’t know of anything that replaced 3rd party Hal extensions

#

Which is how you’d do this before windows 10 23+

#

so yes there’s some old version of windows 10 you could port

#

But for win11 you’d need to reverse the early boot stuff

#

And see if there’s a way

left orbit Jan 4, 2025, 4:56 PM

#

what's kinda confusing is that hal.dll still has a bunch of exports related to interrupts on my windows 11 system (24h2, 26100.2605)

#

are they just not used anymore or

winter orbit Jan 4, 2025, 4:56 PM

#

file up some decompilafion and look at what those functions do :3

#

They’re there for driver compatibility

left orbit Jan 4, 2025, 4:56 PM

#

oh they are all forwarded to ntoskrnl

#

im dumb

#

i was wondering why the file was so small

winter orbit Jan 4, 2025, 4:57 PM

#

drivers imported from Hal for a decade

left orbit Jan 4, 2025, 4:57 PM

#

now that explains it

winter orbit Jan 4, 2025, 4:57 PM

#

yeah sorry they very much screwed over people when removing Hal extensions

left orbit Jan 4, 2025, 4:58 PM

#

i'll get an aarch64 ntoskrnl later and take a look, maybe i can figure out some hacky way to get that thing in there

fiery turtle Jan 4, 2025, 4:58 PM

#

winter orbit https://youtube.com/shorts/gUEzkglsXn4?si=JzJa7G1GWEHMV-6r

holy shit LETSFUCKINGGOOOOOO

left orbit Jan 4, 2025, 4:58 PM

#

i dont even want a proper way, anything would work at this point

winter orbit Jan 4, 2025, 4:58 PM

#

yeah because GIC emulation makes me angry

north holly Jan 4, 2025, 4:58 PM

#

another day, another infy W

#

and another nyaux bug

#

now I need to go deal with fork

winter orbit Jan 4, 2025, 4:59 PM

#

Infy first person to make better ACPI than windows confirmed

left orbit Jan 4, 2025, 5:00 PM

#

winter orbit yeah because GIC emulation makes me angry

yeah i don't like the idea of virtualizing windows because ntoskrnl is stupid

fiery turtle Jan 4, 2025, 5:00 PM

#

winter orbit It has 3

wdym, like actually 3 separate interpreters?

winter orbit Jan 4, 2025, 5:01 PM

#

Only ACPI.sys is a full on interpreter

#

But there’s two other spots that do stuff with raw ACPI tables.

#

Sleep is implemented in windows by checking stuff in Po, Hal, and ACPI.sys

#

I’ll try to document what does what but uACPI does massive amount of work here
And it booting at all is wild

#

Since win10 only uses modern APIC etc etc

fiery turtle Jan 4, 2025, 5:03 PM

#

yeah insane work

#

well done

north holly Jan 4, 2025, 5:04 PM

#

how many ops/s does it get

winter orbit Jan 4, 2025, 5:04 PM

#

40% done with rewrite/clean up so I’ll post it after

north holly Jan 4, 2025, 5:04 PM

#

currently

winter orbit Jan 4, 2025, 5:04 PM

#

Uhh let me grab

fiery turtle Jan 4, 2025, 5:04 PM

#

winter orbit 40% done with rewrite/clean up so I’ll post it after

nice, im also nearing 1.0

north holly Jan 4, 2025, 5:04 PM

#

fiery turtle nice, im also nearing 1.0

will 2.0 be entire ABI break with uAPI?

fiery turtle Jan 4, 2025, 5:04 PM

#

but grass touching is taking my time

left orbit Jan 4, 2025, 5:04 PM

#

uacpi+windows before uacpi+linux is crazy

fiery turtle Jan 4, 2025, 5:04 PM

#

north holly will 2.0 be entire ABI break with uAPI?

uapi will always be optional

winter orbit Jan 4, 2025, 5:05 PM

#

1.1M

#

On this boot

winter orbit Jan 4, 2025, 5:05 PM

#

north holly will 2.0 be entire ABI break with uAPI?

There we go

#

KEKW

fiery turtle Jan 4, 2025, 5:05 PM

#

OBOS faster than NT confirmed

north holly Jan 4, 2025, 5:05 PM

#

hehehe

winter orbit Jan 4, 2025, 5:05 PM

#

yeah it’s slow atm

#

I screwed up the locks I think

north holly Jan 4, 2025, 5:05 PM

#

is this on qemu q35?

#

+kvm

#

because that's what that was done on

winter orbit Jan 4, 2025, 5:06 PM

#

yeah

north holly Jan 4, 2025, 5:06 PM

#

obos faster than NT trl

winter orbit Jan 4, 2025, 5:06 PM

#

Confirmed

fiery turtle Jan 4, 2025, 5:06 PM

#

surely trl

winter orbit Jan 4, 2025, 5:06 PM

#

galaxybrain

#

But NT has smooth wake up on hardware

#

meme

north holly Jan 4, 2025, 5:07 PM

#

with uACPI?

#

didn't think so trl

winter orbit Jan 4, 2025, 5:08 PM

#

as long as I ignore the debug log it’s great

#

chad

fiery turtle Jan 4, 2025, 5:09 PM

#

winter orbit But NT has smooth wake up on hardware

does nt suspend work with uacpi or is that a stub still

winter orbit Jan 4, 2025, 5:10 PM

#

stub

north holly Jan 4, 2025, 5:10 PM

#

ok new server nickname

fiery turtle Jan 4, 2025, 5:11 PM

#

winter orbit stub

ah

north holly Jan 4, 2025, 5:11 PM

#

see, obos even has better suspend support than NT with uACPI trl

#

obos superiority confirmed.

winter orbit Jan 4, 2025, 5:12 PM

#

Do you want me to spend today fixing that trl

north holly Jan 4, 2025, 5:12 PM

#

suspend is pain

winter orbit Jan 4, 2025, 5:13 PM

#

Windows does it weird

#

I don’t understand it yet

north holly Jan 4, 2025, 5:13 PM

#

#1141057599584878645 message

winter orbit Jan 4, 2025, 5:13 PM

#

Then there’s modern standby

fiery turtle Jan 4, 2025, 5:13 PM

#

well obos cant restore the fb on wake sooo

#

its easy to beat

north holly Jan 4, 2025, 5:14 PM

#

fiery turtle well obos cant restore the fb on wake sooo

yet™️

#

waiting for uDRM

#

@slim panther

winter orbit Jan 4, 2025, 5:14 PM

#

where’s uWDDM

#

drm is awful

north holly Jan 4, 2025, 5:14 PM

#

where's uWu

dusky glade Jan 4, 2025, 5:14 PM

#

winter orbit drm is awful

😡

dusky glade Jan 4, 2025, 5:14 PM

#

winter orbit where’s uWDDM

when uNT

slim panther Jan 4, 2025, 5:14 PM

#

north holly waiting for uDRM

depresse

dusky glade Jan 4, 2025, 5:14 PM

#

someone make uNT

winter orbit Jan 4, 2025, 5:15 PM

#

reactos trl

dusky glade Jan 4, 2025, 5:15 PM

#

north holly waiting for uDRM

same

dusky glade Jan 4, 2025, 5:15 PM

#

winter orbit reactos<:trl:829316641191886888>

nooo

#

port uWDDM to nyaux

#

trl

winter orbit Jan 4, 2025, 5:15 PM

#

Thanks to uACPI I’ve been able to process my WDDM reimplementation

north holly Jan 4, 2025, 5:15 PM

#

what if I just homebrew all my GPU drivers

#

surely it won't be too hard (not)

winter orbit Jan 4, 2025, 5:15 PM

#

so I can load stuff for my RTX 4060 now

#

only display resizing but hey

dusky glade Jan 4, 2025, 5:15 PM

#

winter orbit so I can load stuff for my RTX 4060 now

port to nyaux

winter orbit Jan 4, 2025, 5:15 PM

#

That’s funny

dusky glade Jan 4, 2025, 5:15 PM

#

trl trl

dusky glade Jan 4, 2025, 5:16 PM

#

north holly surely it won't be too hard (not)

do u like pain

winter orbit Jan 4, 2025, 5:16 PM

#

Actually my WDDM implementation will be MIT

slim panther Jan 4, 2025, 5:16 PM

#

north holly what if I just homebrew all my GPU drivers

https://tenor.com/view/clueless-aware-twitch-forsen-emote-gif-25354609

Tenor

dusky glade Jan 4, 2025, 5:16 PM

#

are u a masochist

north holly Jan 4, 2025, 5:16 PM

#

dusky glade do u like pain

yes

winter orbit Jan 4, 2025, 5:16 PM

#

Anyone here will be free to steal it

north holly Jan 4, 2025, 5:16 PM

#

north holly what if I just homebrew all my GPU drivers

and I'll make sure to only use obos apis

#

to make it as hard as possible to port

dusky glade Jan 4, 2025, 5:16 PM

#

winter orbit Anyone here will be free to steal it

u can steal the wddm impl and throw it in nyaux and u do all of the porting work

#

trl trl trl

north holly Jan 4, 2025, 5:16 PM

#

but I'll also make it public domain trl

dusky glade Jan 4, 2025, 5:16 PM

#

winter orbit Jan 4, 2025, 5:16 PM

#

Remember someone here made a storport Imlp

#

WDDM is doable

north holly Jan 4, 2025, 5:17 PM

#

north holly but I'll also make it public domain <:trl:829316641191886888>

but no one will be able to understand the code

winter orbit Jan 4, 2025, 5:17 PM

#

chad

north holly Jan 4, 2025, 5:17 PM

#

winter orbit Remember someone here made a storport Imlp

@jaunty fox iirc had a storport port

#

or implementation

#

whatever it's called

winter orbit Jan 4, 2025, 5:17 PM

#

He’s getting WDDM

mortal yoke Jan 4, 2025, 5:17 PM

#

the drivers are funny tho, like you need the shared info page so unless you are actually trying to be windows compatible it might be a little weird

dusky glade Jan 4, 2025, 5:17 PM

#

shared info page mentioned

mortal yoke Jan 4, 2025, 5:17 PM

#

well ig its its not that bad as long as you just don't have anything else at that address like I think linux has something in there

dusky glade Jan 4, 2025, 5:17 PM

#

going back to sleep now

north holly Jan 4, 2025, 5:17 PM

#

now I really gotta go fix fork

dusky glade Jan 4, 2025, 5:17 PM

#

nooo

north holly Jan 4, 2025, 5:18 PM

#

dusky glade going back to sleep now

no you won't

dusky glade Jan 4, 2025, 5:18 PM

#

north holly no you won't

yes i will

#

trl

north holly Jan 4, 2025, 5:18 PM

#

you complain about sleep schedule

#

you continue to sleep at 5 pm

dusky glade Jan 4, 2025, 5:18 PM

#

b-b-b--b-but

#

im sleepy

mortal yoke Jan 4, 2025, 5:18 PM

#

the way to fix it is to not sleep in the middle of a day

dusky glade Jan 4, 2025, 5:18 PM

#

nooo

north holly Jan 4, 2025, 5:18 PM

#

north holly you continue to sleep at 5 pm

dusky glade Jan 4, 2025, 5:19 PM

#

ugh fine ill stay awake

north holly Jan 4, 2025, 5:19 PM

#

can't wait until nyaux gets fork and he spends 7 weeks debugging it

fiery turtle Jan 4, 2025, 5:20 PM

#

winter orbit 1.1M

did u override the naive uacpi mem* functions to use nt's ones tho?

winter orbit Jan 4, 2025, 5:20 PM

#

fiery turtle did u override the naive uacpi mem* functions to use nt's ones tho?

oof

#

no

north holly Jan 4, 2025, 5:20 PM

#

damn it

dusky glade Jan 4, 2025, 5:20 PM

#

north holly can't wait until nyaux gets fork and he spends 7 weeks debugging it

bru

north holly Jan 4, 2025, 5:20 PM

#

sadmeme

dusky glade Jan 4, 2025, 5:20 PM

#

winter orbit <:oof:401357910476718090>

give nt memcpy

#

trl

mortal yoke Jan 4, 2025, 5:20 PM

#

north holly can't wait until nyaux gets fork and he spends 7 weeks debugging it

I tried to start to implement frk yesterday too but then I just stopped after I realized I need to clone handles 💀

winter orbit Jan 4, 2025, 5:20 PM

#

I could import memcpy from windows 10 ntoskrnl

#

unleash chaos

north holly Jan 4, 2025, 5:21 PM

#

time to dive in to Mm_ForkContext

#

https://cdn.discordapp.com/emojis/816178972672131083.gif?size=64

dusky glade Jan 4, 2025, 5:21 PM

#

winter orbit unleash chaos

this women needs to give me nt memcpy 😡

winter orbit Jan 4, 2025, 5:21 PM

#

who will win

Hobbies OSes or the trillion dollar cooperation who hasn’t given a crap about its os in a decade

dusky glade Jan 4, 2025, 5:21 PM

#

winter orbit who will win Hobbies OSes or the trillion dollar cooperation who hasn’t given a...

who will when

gentle peak Jan 4, 2025, 5:21 PM

#

fiery turtle did u override the naive uacpi mem* functions to use nt's ones tho?

luckily using uacpi's builtin ones is a free performance boost trl

fiery turtle Jan 4, 2025, 5:22 PM

#

only with lto

#

trl

north holly Jan 4, 2025, 5:22 PM

#

infy wish me luck

#

I am going to debug fork

#

https://cdn.discordapp.com/emojis/816178972672131083.gif?size=64

fiery turtle Jan 4, 2025, 5:22 PM

#

gl

dusky glade Jan 4, 2025, 5:22 PM

#

infy wish me luck, i am going to watch shitty minecraft video

#

trl

fiery turtle Jan 4, 2025, 5:23 PM

#

gl

mortal yoke Jan 4, 2025, 5:23 PM

#

also I implemented timeouts + callstack depth checks in qacpi, changed op regions to actually map memory/io instead of implicitly needing the os to do it and now I am trying to debug Load lol

fiery turtle Jan 4, 2025, 5:23 PM

#

mortal yoke also I implemented timeouts + callstack depth checks in qacpi, changed op region...

nice!

#

do tests pass?

mortal yoke Jan 4, 2025, 5:23 PM

#

the timeout/recursion related yes

fiery turtle Jan 4, 2025, 5:23 PM

#

nice

mortal yoke Jan 4, 2025, 5:24 PM

#

the loads don't because idk, there are some weird things with it including leaks

jaunty fox Jan 4, 2025, 5:24 PM

#

mortal yoke well ig its its not that bad as long as you just don't have anything else at tha...

what's linux got there?

#

it may well do have something

fiery turtle Jan 4, 2025, 5:25 PM

#

mortal yoke the loads don't because idk, there are some weird things with it including leaks

F

mortal yoke Jan 4, 2025, 5:26 PM

#

jaunty fox what's linux got there?

kasan shadow memory, ig that doesn't really matter if kasan is disabled

calm latch Jan 4, 2025, 5:31 PM

#

north holly can't wait until nyaux gets fork and he spends 7 weeks debugging it

Even my fork is half-broken on RISC-V

#

One one of two cloned threads works trl

thorny orbit Jan 4, 2025, 5:55 PM

#

winter orbit who will win Hobbies OSes or the trillion dollar cooperation who hasn’t given a...

bill gay will lose

frank canopy Jan 4, 2025, 6:01 PM

#

winter orbit But there’s two other spots that do stuff with raw ACPI tables.

to what extent could that just be replaced by doing uacpi_table_find_by_signature etc? now im curious

winter orbit Jan 4, 2025, 6:01 PM

#

yes

#

but that requires me patching a binary

#

since ACPI tables are linked in loaderblock

frank canopy Jan 4, 2025, 6:02 PM

#

ah ok yeah

thorny orbit Jan 4, 2025, 6:53 PM

#

if i find bgrt table with uacpi on bios systems, if result will be null ?

#

oh nvm

fiery turtle Jan 4, 2025, 6:56 PM

#

its unrelated to uacpi, depends on your firmware

#

if a table is not present on the system uacpi will return STATUS_NOT_FOUND

thorny orbit Jan 4, 2025, 6:57 PM

#

fiery turtle if a table is not present on the system uacpi will return STATUS_NOT_FOUND

yes i mean this

thorny orbit Jan 4, 2025, 7:31 PM

#

fiery turtle its unrelated to uacpi, depends on your firmware

uacpi_status ret = uacpi_table_find_by_signature("BGRT",&bgrt_pointer);

why it returns status not found on uefi systems ? (6)

mortal yoke Jan 4, 2025, 7:31 PM

#

maybe there is just no BGRT on that system?

fiery turtle Jan 4, 2025, 7:31 PM

#

show logs

thorny orbit Jan 4, 2025, 7:33 PM

#

mortal yoke maybe there is just no BGRT on that system?

in initialization it shows bgrt table

thorny orbit Jan 4, 2025, 7:33 PM

#

fiery turtle show logs

only list of tables from initialisation

#

in this list bgrt is exists

fiery turtle Jan 4, 2025, 7:34 PM

#

any other logs?

thorny orbit Jan 4, 2025, 7:35 PM

#

❌

fiery turtle Jan 4, 2025, 7:35 PM

#

gonna go out on a limb and say its a skill issue on your part

#

barely any information besides "it no work"

#

show code or logs

thorny orbit Jan 4, 2025, 7:37 PM

#

fiery turtle show code or logs

rn_image_picker_lib_temp_07bddd7e-7596-4955-a390-91178addb677.jpg

fiery turtle Jan 4, 2025, 7:37 PM

#

show code

thorny orbit Jan 4, 2025, 7:38 PM

#

wait

fiery turtle Jan 4, 2025, 7:39 PM

#

also any chance your memcmp is fucked?

thorny orbit Jan 4, 2025, 7:41 PM

#

fiery turtle also any chance your memcmp is fucked?

i have disabled scheduling

#

    earlyAcpiInit(); // uacpi_initialize(0);
    printf("Early ACPI Initializied\n");
    uacpi_table bgrt_pointer;
    uacpi_status ret = uacpi_table_find_by_signature("BGRT",&bgrt_pointer);
    if(ret != UACPI_STATUS_OK) {
        printf("BGRT Table doenst present by your firmware (%d)\n",ret);
    } else {
        bgrt_table* bgrt = (bgrt_table*)bgrt_pointer.virt_addr;
        printf("0x%p\n",bgrt->image_address);
    }

thorny orbit Jan 4, 2025, 7:41 PM

#

thorny orbit i have disabled scheduling

so i dont think what memcmp can be pooped

fiery turtle Jan 4, 2025, 7:41 PM

#

i mean a github page or something

#

this is not enough to say anything lol

thorny orbit Jan 4, 2025, 7:41 PM

#

okay sir i'll commit

#

nwo

fiery turtle Jan 4, 2025, 7:41 PM

#

thorny orbit i have disabled scheduling

how is memcmp related to scheduling ☠️

thorny orbit Jan 4, 2025, 7:42 PM

#

fiery turtle how is memcmp related to scheduling ☠️

my scheduling is pooped and have incorrect context switching

#

also isnt uacpi have own memcmp

fiery turtle Jan 4, 2025, 7:42 PM

#

if u didnt override it, yes

thorny orbit Jan 4, 2025, 7:46 PM

#

fiery turtle if u didnt override it, yes

what i need to send to you

#

https://github.com/sys-q/quackOS/tree/main/src/source/kernel

GitHub

quackOS/src/source/kernel at main · sys-q/quackOS

x86_64 OS. Contribute to sys-q/quackOS development by creating an account on GitHub.

fiery turtle Jan 4, 2025, 7:48 PM

#

you literally copied the entire uacpi source? 💀

#

which commit is it from at least

thorny orbit Jan 4, 2025, 7:48 PM

#

fiery turtle you literally copied the entire uacpi source? 💀

why not

fiery turtle Jan 4, 2025, 7:49 PM

#

git submodule

thorny orbit Jan 4, 2025, 7:49 PM

#

fiery turtle git submodule

i am know only git add git commit git push and git init

fiery turtle Jan 4, 2025, 7:50 PM

#

void earlyAcpiInit() {
    early = 1;
    uacpi_initialize(0);
}

U dont check for errors here

thorny orbit Jan 4, 2025, 7:51 PM

#

fiery turtle ``` void earlyAcpiInit() { early = 1; uacpi_initialize(0); } ``` U dont ...

okay i think i need to check

fiery turtle Jan 4, 2025, 7:52 PM

#

void *uacpi_kernel_map(uacpi_phys_addr addr, uacpi_size len) {
    uint64_t aligned_phys = ALIGNPAGEDOWN(addr);
    uint64_t aligned_virt = (uint64_t)phys2Virt(addr);
    for(uint64_t i = aligned_phys;i < aligned_phys + len;i+= PAGE_SIZE) {
        pagingMap(phys2Virt(pagingGetKernel()),i,(uint64_t)phys2Virt(i),PTE_PRESENT | PTE_WRITABLE);
    }
    return (void*)aligned_virt;
}

#

this is wrong

thorny orbit Jan 4, 2025, 7:52 PM

#

fiery turtle ```c void *uacpi_kernel_map(uacpi_phys_addr addr, uacpi_size len) { uint64_t...

i changed it

#

in code

#

i know

#

i dont know why git dont overwrited it

fiery turtle Jan 4, 2025, 7:53 PM

#

what did u change it to

thorny orbit Jan 4, 2025, 7:53 PM

#

fiery turtle what did u change it to

void *uacpi_kernel_map(uacpi_phys_addr addr, uacpi_size len) {
    uint64_t aligned_phys = ALIGNPAGEDOWN(addr);
    for(uint64_t i = aligned_phys;i < aligned_phys + len;i+= PAGE_SIZE) {
        pagingMap(phys2Virt(pagingGetKernel()),i,(uint64_t)phys2Virt(i),PTE_PRESENT | PTE_WRITABLE);
    }
    return (void*)phys2Virt(addr);
}

fiery turtle Jan 4, 2025, 7:54 PM

#

what does phys2virt do

thorny orbit Jan 4, 2025, 7:54 PM

#

phys + hhdm

#

and returns pointer to uint64_t*

fiery turtle Jan 4, 2025, 7:55 PM

#

did u forget to ctrl+s?

north holly Jan 4, 2025, 7:55 PM

#

alt+f4

thorny orbit Jan 4, 2025, 7:56 PM

#

fiery turtle did u forget to ctrl+s?

uacpi initializition doesnt return errors

fiery turtle Jan 4, 2025, 7:57 PM

#

im afraid its your allocator bug

#

// its most lazy alloc in the world
void* easy_uacpi_alloc(uint64_t size) {
    if(!ptr) {
        ptr = (uint64_t)pmmVBigAlloc(2048 * 2);
    }
    ptr += size;
    return (void*)ptr;
}

also wtf

#

4096 bytes is not enough

thorny orbit Jan 4, 2025, 7:58 PM

#

fiery turtle 4096 bytes is not enough

its pages

fiery turtle Jan 4, 2025, 7:58 PM

#

this returns misaligned addresses

thorny orbit Jan 4, 2025, 7:58 PM

#

you dont saw upper message ???

thorny orbit Jan 4, 2025, 7:59 PM

#

fiery turtle this returns misaligned addresses

wdym

fiery turtle Jan 4, 2025, 7:59 PM

#

u cant just ptr += size

#

u have to align the size up to at least 16

#

or 8

thorny orbit Jan 4, 2025, 7:59 PM

#

ok

fiery turtle Jan 4, 2025, 7:59 PM

#

anyway as a quick fix for u

#

https://github.com/sys-q/quackOS/blob/main/src/include/uacpi/platform/config.h#L122

GitHub

quackOS/src/include/uacpi/platform/config.h at main · sys-q/quackOS

x86_64 OS. Contribute to sys-q/quackOS development by creating an account on GitHub.

#

u can change this to like 128

#

then it wont use your buggy allocator for table storage

thorny orbit Jan 4, 2025, 8:02 PM

#

fiery turtle then it wont use your buggy allocator for table storage

// its most lazy alloc in the world
void* easy_uacpi_alloc(uint64_t size) {
    if(!ptr) {
        ptr = (uint64_t)pmmVBigAlloc(2048 * 2);
    }
    uint64_t align_size;
    align_size = (size + 7) / 8 * 8;
    ptr += align_size;
    return (void*)ptr - align_size;
}

now it aligned

fiery turtle Jan 4, 2025, 8:03 PM

#

uhh

#

i guess

thorny orbit Jan 4, 2025, 8:04 PM

#

fiery turtle i guess

uhmm maybe i need to find where it cant find table

#

and MAYBE i am shit itself

fiery turtle Jan 4, 2025, 8:04 PM

#

i literally told u how to fix it

thorny orbit Jan 4, 2025, 8:05 PM

#

fiery turtle i literally told u how to fix it

ok

fiery turtle Jan 4, 2025, 8:05 PM

#

avoid goose allocator at all costs

thorny orbit Jan 4, 2025, 8:05 PM

#

my allocator is best in the world

fiery turtle Jan 4, 2025, 8:05 PM

#

also for just tables u can use uacpi_setup_early_table_access

thorny orbit Jan 4, 2025, 8:06 PM

#

i'll go to slep because it 11 pm for me

fiery turtle Jan 4, 2025, 8:07 PM

#

gn

mortal yoke Jan 4, 2025, 8:17 PM

#

I am starting to hate Load 💀 like I don't understand how some namespace nodes sometimes randomly get removed from the root node's children when I don't ever remove anything from there and in some of the other tests I get use after free because some frame after the load frame somehow uses a buffer allocated specifically for the load frame where the table is copied to (that gets freed when the load frame is destroyed)

fiery turtle Jan 4, 2025, 8:24 PM

#

lmfao 💀

#

obos curse reached qacpi

north holly Jan 4, 2025, 8:24 PM

#

I swear every time someone fixes their obos curse

#

it pops up somewhere else

#

3:08 PM
9 minutes later: memory corruption somewhere else

calm latch Jan 4, 2025, 8:34 PM

#

It's not fixed, it's sent to obos

mortal yoke Jan 4, 2025, 8:34 PM

#

oh right I can't just free the aml like that when the load exits 💀 then all the methods that it added are full of garbage

fiery turtle Jan 4, 2025, 8:36 PM

#

u should append the tables to the table list yeah

#

and also give the os the ability to override or deny this Load

fiery turtle Jan 5, 2025, 6:59 PM

#

what is ACPICA maintainer cooking LULW

jaunty fox Jan 5, 2025, 6:59 PM

#

fiery turtle what is ACPICA maintainer cooking <:LULW:543420553021882371>

he was going for a nice walk along the road to damascus

#

then all of a sudden, he found himself in love with the device tree instead

#

he has repented of acpi

fiery turtle Jan 5, 2025, 7:00 PM

#

lmao

calm latch Jan 5, 2025, 7:08 PM

#

was he released from the corvette thing?

#

or does ACPICA have different maintainer now?

fiery turtle Jan 5, 2025, 7:08 PM

#

yes he was released

#

he merged my pr not so long ago

hallow marten Jan 5, 2025, 7:14 PM

#

calm latch was he released from the corvette thing?

The what

vagrant hull Jan 5, 2025, 7:18 PM

#

hallow marten The what

he smashed up a corvette and was arrested for it lol

hallow marten Jan 5, 2025, 7:18 PM

#

lmao

fiery turtle Jan 5, 2025, 7:19 PM

#

yeah there was a reddit article about it

#

at first i didnt even believe it was him when fadanoid posted it

#

like what are the odds

vagrant hull Jan 5, 2025, 7:20 PM

#

infy when are you gonna smash a corvette?

fiery turtle Jan 5, 2025, 7:21 PM

#

when I buy one

calm latch Jan 5, 2025, 7:21 PM

#

I would imagine those are close to non-existent outside of US

fiery turtle Jan 5, 2025, 7:22 PM

#

then never ig sad

calm latch Jan 5, 2025, 7:22 PM

#

fiery turtle when I buy one

also smashing your own car is probably boring

fiery turtle Jan 5, 2025, 7:23 PM

#

worked for mr beast views farming

calm latch Jan 5, 2025, 7:24 PM

#

where's the fun in not being chased by the law enforcement

kind mantle Jan 5, 2025, 7:46 PM

#

fiery turtle what is ACPICA maintainer cooking <:LULW:543420553021882371>

RISC-V and/or ARM

#

Going from the virgin x86_64 acpica to the chad RISC-V chad

fiery turtle Jan 5, 2025, 7:57 PM

#

most properly BIOS-patched AML blob

#

#

it's approximately 660k lines of Noops

thorny orbit Jan 5, 2025, 8:00 PM

#

fiery turtle most properly BIOS-patched AML blob

noob

leaden fox Jan 5, 2025, 8:03 PM

#

fiery turtle it's approximately 660k lines of Noops

you sure that ain't just padding to exactly fit ROM size?

fiery turtle Jan 5, 2025, 8:13 PM

#

leaden fox you sure that ain't just padding to exactly fit ROM size?

idk but the table length is 0x00113489

fiery turtle Jan 5, 2025, 9:32 PM

#

fun fact, this is the hardest (in terms of mental capacity needed to understand whats going on) function in the entire uACPI code base:

static void bit_copy(struct bit_span *dst, struct bit_span *src)
{
    uacpi_u8 src_shift, dst_shift, bits = 0;
    uacpi_u16 dst_mask;
    uacpi_u8 *dst_ptr, *src_ptr;
    uacpi_u64 dst_count, src_count;

    dst_ptr = dst->data + (dst->index / 8);
    src_ptr = src->data + (src->index / 8);

    dst_count = dst->length;
    dst_shift = dst->index & 7;

    src_count = src->length;
    src_shift = src->index & 7;

    while (dst_count)
    {
        bits = 0;

        if (src_count) {
            bits = *src_ptr >> src_shift;

            if (src_shift && src_count > (uacpi_u32)(8 - src_shift))
                bits |= *(src_ptr + 1) << (8 - src_shift);

            if (src_count < 8) {
                bits &= (1 << src_count) - 1;
                src_count = 0;
            } else {
                src_count -= 8;
                src_ptr++;
            }
        }

        dst_mask = (dst_count < 8 ? (1 << dst_count) - 1 : 0xFF) << dst_shift;
        *dst_ptr = (*dst_ptr & ~dst_mask) | ((bits << dst_shift) & dst_mask);

        if (dst_shift && dst_count > (uacpi_u32)(8 - dst_shift)) {
            dst_mask >>= 8;
            *(dst_ptr + 1) &= ~dst_mask;
            *(dst_ptr + 1) |= (bits >> (8 - dst_shift)) & dst_mask;
        }

        dst_count = dst_count > 8 ? dst_count - 8 : 0;
        ++dst_ptr;
    }
}

#

And I didn't write it either, it was contributed by a member from the cherno server

#

It's used for accessing misaligned fields

mortal yoke Jan 5, 2025, 9:37 PM

#

fiery turtle fun fact, this is the hardest (in terms of mental capacity needed to understand ...

that's indeed interesting lol

north holly Jan 5, 2025, 9:37 PM

#

Isn't that the shit you did in GAS reads

#

And writes

#

Because I almost had a stroke reading that

fiery turtle Jan 5, 2025, 9:37 PM

#

its not used for GAS but for actual AML fields

fiery turtle Jan 5, 2025, 9:37 PM

#

mortal yoke that's indeed interesting lol

do u have something similar in qacpi?

north holly Jan 5, 2025, 9:37 PM

#

fiery turtle And I didn't write it either, it was contributed by a member from the cherno ser...

Who was it

fiery turtle Jan 5, 2025, 9:38 PM

#

north holly Who was it

mortal yoke Jan 5, 2025, 9:38 PM

#

fiery turtle do u have something similar in qacpi?

well there is this for buffer fields but the normal field reading code is mostly just some aligning and memcpys https://github.com/Qwinci/qacpi/blob/main/src/interpreter.cpp#L4445

north holly Jan 5, 2025, 9:38 PM

#

fiery turtle

Ah so the tdb guy

fiery turtle Jan 5, 2025, 9:39 PM

#

tdb yeah

fiery turtle Jan 5, 2025, 9:39 PM

#

mortal yoke well there is this for buffer fields but the normal field reading code is mostly...

yeah i guess this is basically that probably

#

do u pass the ACPICA buffer field tests?

mortal yoke Jan 5, 2025, 9:40 PM

#

I don't think I have tried, unless they are the generated buffer tests that you also have?

fiery turtle Jan 5, 2025, 9:40 PM

#

nah i built them manually from the acpica repo

#

📎 bfield.aml

#

and try this as well

📎 arithmetic.aml

mortal yoke Jan 5, 2025, 9:41 PM

#

are you supposed to invoke some specific method in that too?

fiery turtle Jan 5, 2025, 9:41 PM

#

MAIN

mortal yoke Jan 5, 2025, 9:42 PM

#

ah so its the same

fiery turtle Jan 5, 2025, 9:42 PM

#

yeah

#

i even submitted a patch to fix NT compatibility in these tests

#

so they work perfectly in uacpi

#

❯ /mnt/d/uacpi/tests/runner/build-linux-64bits/test-runner bfield.aml --expect int 0
[uACPI][INFO] RSDP 0x00007FFDD7ACF830 00000024 v02 (uOEMID)
[uACPI][INFO] XSDT 0x0000604000001090 0000002C v02 (Intel  uTESTTBL)
[uACPI][INFO] DSDT 0x000062B000000200 000068A8 v02 (Intel  Many    )
[uACPI][INFO] FACP 0x00006120000004C0 00000114 v06 (uOEMID uTESTTBL)
[uACPI][INFO] FACS 0x0000606000000320 00000040
[uACPI][INFO] SSDT 0x0000000000000000 00000055 v01 (uTEST  RUNRIDTB)
[uACPI][TRACE] load of 'DSDT' (OEM ID 'Intel ' OEM Table ID 'Many    ')
[uACPI][TRACE] load of 'SSDT' (OEM ID 'uTEST ' OEM Table ID 'RUNRIDTB')
[uACPI][TRACE] [AML DEBUG] String => "TestRunner ID SSDT loaded!"
[uACPI][INFO] successfully loaded 2 AML blobs, 1395 ops in 12ms (avg 108953/s)
[uACPI][TRACE] initialized GPE block _GPE[0->128], 0 AML handlers (IRQ 0)
[uACPI][TRACE] initialized GPE block _GPE[128->256], 0 AML handlers (IRQ 0)
[uACPI][TRACE] fixed event 0 enabled successfully
[uACPI][TRACE] activated all 'EmbeddedControl' opregions controlled by '\   ', 0 _REG() calls (0 errors)
got a GPE
[uACPI][TRACE] activated all 'PCI_Config' opregions controlled by '\   ', 0 _REG() calls (0 errors)
[uACPI][INFO] namespace initialization done in 0ms: 0 devices, 0 thermal zones
[uACPI][TRACE] _STA calls: 0 (0 errors), _INI calls: 0 (0 errors)
[uACPI][TRACE] read from [\STRT.HDR_] (1 bytes) TableData[0x000062B000000208] = 0x2
[uACPI][TRACE] [AML DEBUG] String => "64-bit mode"
[uACPI][TRACE] [AML DEBUG] String => "Release of parent ACPICA code 0x1"
[uACPI][TRACE] [AML DEBUG] String => "Release of ASLTS test suite  0x16"
[uACPI][TRACE] [AML DEBUG] String => "Settings of ASLTS test suite 0x5"
[uACPI][TRACE] [AML DEBUG] String => "TEST (functional), Buffer Field"
[uACPI][TRACE] [AML DEBUG] String => "m211 test started"
[uACPI][TRACE] [AML DEBUG] String => "TEST: m211, Create 1-Bit Buffer Field:"
[uACPI][TRACE] [AML DEBUG] String => ":CTST:functional:bfield:m211:PASS:"
[uACPI][TRACE] [AML DEBUG] String => "m213 test started"
[uACPI][TRACE] [AML DEBUG] String => "TEST: m213, Create 8-Bit Buffer Field:"
[uACPI][TRACE] [AML DEBUG] String => ":CTST:functional:bfield:m213:PASS:"
[uACPI][TRACE] [AML DEBUG] String => "m215 test started"
[uACPI][TRACE] [AML DEBUG] String => "TEST: m215, Create 16-Bit Buffer Field:"
[uACPI][TRACE] [AML DEBUG] String => ":CTST:functional:bfield:m215:PASS:"
[uACPI][TRACE] [AML DEBUG] String => "m217 test started"
[uACPI][TRACE] [AML DEBUG] String => "TEST: m217, Create 32-Bit Buffer Field:"
[uACPI][TRACE] [AML DEBUG] String => ":CTST:functional:bfield:m217:PASS:"
[uACPI][TRACE] [AML DEBUG] String => "m219 test started"
[uACPI][TRACE] [AML DEBUG] String => "TEST: m219, Create 64-Bit Buffer Field:"
[uACPI][TRACE] [AML DEBUG] String => ":CTST:functional:bfield:m219:PASS:"
[uACPI][TRACE] [AML DEBUG] String => "m21d test started"
[uACPI][TRACE] [AML DEBUG] String => "TEST: m21d, Create Arbitrary Length Buffer Field:"
[uACPI][TRACE] [AML DEBUG] String => ":CTST:functional:bfield:m21d:PASS:"
[uACPI][TRACE] [AML DEBUG] String => "Run time (in seconds): 0x1"
[uACPI][TRACE] [AML DEBUG] String => "The total number of exceptions handled: 0x0"
[uACPI][TRACE] [AML DEBUG] String => "========= ROOT METHODS SUMMARY (max 600):"
[uACPI][TRACE] [AML DEBUG] String => ":STST:functional:bfield:m211:PASS:"
[uACPI][TRACE] [AML DEBUG] String => ":STST:functional:bfield:m213:PASS:"
[uACPI][TRACE] [AML DEBUG] String => ":STST:functional:bfield:m215:PASS:"
[uACPI][TRACE] [AML DEBUG] String => ":STST:functional:bfield:m217:PASS:"
[uACPI][TRACE] [AML DEBUG] String => ":STST:functional:bfield:m219:PASS:"
[uACPI][TRACE] [AML DEBUG] String => ":STST:functional:bfield:m21d:PASS:"
[uACPI][TRACE] [AML DEBUG] String => "========= END."
[uACPI][TRACE] [AML DEBUG] String => "TEST ACPICA: 64-bit : PASS"
[uACPI][TRACE] fixed event 0 disabled successfully

This is what I get

north holly Jan 5, 2025, 9:45 PM

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fiery turtle i even submitted a patch to fix NT compatibility in these tests

For a second I thought you said you sent a patch to NT

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Lol

fiery turtle Jan 5, 2025, 9:46 PM

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nah it was this lol: https://github.com/acpica/acpica/pull/923

GitHub

tests/common: use CopyObject instead of Store for NRMT by d-tatiani...

NRMT is initialized as "", which is a zero-length string. Trying to Store a longer string to it works on ACPICA, however, is incompatible with other implementations like Acpi.sys,...

hollow elm Jan 5, 2025, 9:46 PM

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fiery turtle fun fact, this is the hardest (in terms of mental capacity needed to understand ...

lai has https://github.com/managarm/lai/blob/master/core/opregion.c#L441-L468

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and a similar function for writes just below

north holly Jan 5, 2025, 9:47 PM

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LAI doesn't exist anymore

mortal yoke Jan 5, 2025, 9:47 PM

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fiery turtle ``` ❯ /mnt/d/uacpi/tests/runner/build-linux-64bits/test-runner bfield.aml --expe...

qacpi warning: Ignoring DataRegion
qacpi error: Operation Region HDR_ doesn't exist
aml debug: TEST (functional), Buffer Field
aml debug: m211 test started
aml debug: TEST: m211, Create 1-Bit Buffer Field:
aml debug: :CTST:functional:bfield:m211:PASS:
aml debug: m213 test started
aml debug: TEST: m213, Create 8-Bit Buffer Field:
aml debug: :CTST:functional:bfield:m213:PASS:
aml debug: m215 test started
aml debug: TEST: m215, Create 16-Bit Buffer Field:
aml debug: :CTST:functional:bfield:m215:PASS:
aml debug: Run time (in seconds): 0x677afd72
aml debug: The total number of exceptions handled: 0x
aml debug: ========= ROOT METHODS SUMMARY (max 600):
aml debug: :STST:functional:bfield:m211:PASS:
aml debug: :STST:functional:bfield:m213:PASS:
aml debug: :STST:functional:bfield:m215:PASS:
aml debug: ========= END.
aml debug: TEST ACPICA: 32-bit : PASS
``` ![troll](https://cdn.discordapp.com/emojis/796858892985434152.webp?size=128 "troll") I should implement dataregion

north holly Jan 5, 2025, 9:47 PM

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north holly LAI doesn't exist anymore

trl

fiery turtle Jan 5, 2025, 9:47 PM

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mortal yoke ``` qacpi warning: Ignoring DataRegion qacpi error: Operation Region HDR_ doesn'...

wait why do u only get 3 tests

fiery turtle Jan 5, 2025, 9:48 PM

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hollow elm lai has <https://github.com/managarm/lai/blob/master/core/opregion.c#L441-L468>

iirc LAI doesnt support e.g. 512 bit fields

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right?

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that u must read in multiple accesses

hollow elm Jan 5, 2025, 9:48 PM

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fiery turtle iirc LAI doesnt support e.g. 512 bit fields

fields that require multiple mmio/pio/pci config space reads should work

fiery turtle Jan 5, 2025, 9:49 PM

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i have lai built actually i can try running it against this test

hollow elm Jan 5, 2025, 9:49 PM

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there was an issue with Preserve writes where it would perform extra reads but other than that i think this works

hollow elm Jan 5, 2025, 9:49 PM

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hollow elm there was an issue with Preserve writes where it would perform extra reads but o...

and for that i have a pr open and i asked a person who reported an issue to test it and i got ghosted sadmeme

fiery turtle Jan 5, 2025, 9:50 PM

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❯ ~/lai_tools/build/laiexec bfield.aml
unexpected opcode in lai_exec_run(), sequence 5B 88 48 44
[1]    19578 IOT instruction (core dumped)  ~/lai_tools/build/laiexec bfield.aml

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idk

fiery turtle Jan 5, 2025, 9:51 PM

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hollow elm and for that i have a pr open and i asked a person who reported an issue to test...

wait u did? was that me?

hollow elm Jan 5, 2025, 9:51 PM

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no some other person reported a hang on real hw iirc

left orbit Jan 5, 2025, 9:51 PM

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wtf is an iot instruction

mortal yoke Jan 5, 2025, 9:51 PM

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fiery turtle wait why do u only get 3 tests

maybe the data region being unimplemented somehow causes that? also the run time isn't correct

hollow elm Jan 5, 2025, 9:51 PM

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fiery turtle wait u did? was that me?

https://github.com/managarm/lai/issues/138

fiery turtle Jan 5, 2025, 9:51 PM

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hmm lemme comment that out

mortal yoke Jan 5, 2025, 9:51 PM

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left orbit wtf is an iot instruction

abort()

fiery turtle Jan 5, 2025, 9:52 PM

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hollow elm <https://github.com/managarm/lai/issues/138>

ah that

hollow elm Jan 5, 2025, 9:53 PM

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you made the issue and i made a pr fixing it and i asked the person who made a second issue to see if the pr fixes it

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and they ghosted me

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so the issue remains unfixed :^)

#uACPI - a portable and easy-to-integrate ACPI implementation