OBOS (not vibecoded) | Operating System Development | Page 24

flint idol Nov 1, 2024, 2:30 PM

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that's a big part of D state API implemented

real pecan Nov 1, 2024, 2:33 PM

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Nice

flint idol Nov 1, 2024, 2:49 PM

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// Enable all power resources set by _PRW.
uacpi_namespace_node* pwr_resource = nullptr;
for (size_t i = 2; i < (pkg.count - 2); i++)
{
    uacpi_data_view path = {};
    uacpi_object_get_string(pkg.objects[i], &path);
    pwr_resource = uacpi_namespace_node_resolve_from_aml_namepath(dev, path.const_text);
    uacpi_status ustatus = uacpi_eval(pwr_resource, "_ON", nullptr, nullptr);
    if (uacpi_unlikely_error(ustatus))
    {
        if (ustatus != UACPI_STATUS_NOT_FOUND)
            OBOS_Warning("%s: Could not enable power resource for wake. Status: %d\nNote: Skipping...\n");
        continue;
    }
    
}```

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hopefully I used uacpi_eval right there

real pecan Nov 1, 2024, 3:17 PM

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flint idol ```c // Enable all power resources set by _PRW. uacpi_namespace_node* pwr_resour...

- uacpi_data_view path = {};
- uacpi_object_get_string(pkg.objects[i], &path);
- pwr_resource = uacpi_namespace_node_resolve_from_aml_namepath(dev, path.const_text);
+uacpi_object_resolve_as_aml_namepath(pkg.objects[i], &pwr_resource);

flint idol Nov 1, 2024, 3:17 PM

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ty

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I think scope should be the namespace root

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or just nullptr

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to assume root

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OBOS_DeviceMakeWakeCapable is 153 lines

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including some helpers to evaluate DSW/PSW

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and to enable/disable power resources in _PRW

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I still must implement OBOS_DeviceSetDState and OBOS_DeviceHasDState for this to be completed.

real pecan Nov 1, 2024, 3:25 PM

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flint idol I think scope should be the namespace root

wdym

flint idol Nov 1, 2024, 3:25 PM

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uacpi_object_resolve_as_aml_namepath takes scope

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as the second argument

real pecan Nov 1, 2024, 3:25 PM

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yes

flint idol Nov 1, 2024, 3:25 PM

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https://pastebin.com/25PPSFPz
marker in case I need to refer back to this code

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I'm deleting it tho

real pecan Nov 1, 2024, 3:26 PM

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the scope is the parent device you're resolving against

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this is so that if the resource is just 4 letters it recurses upwards correctly

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and finds the node

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otherwise it would fail

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sometimes its an absolute path in which case it doesnt matter

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but sometimes just 4 letters

flint idol Nov 1, 2024, 3:26 PM

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static void enable_pwr(uacpi_namespace_node* dev, uacpi_object_array *pkg, bool on)
{
    uacpi_namespace_node* pwr_resource = nullptr;
    for (size_t i = 2; i < pkg->count; i++)
    {
        uacpi_object_resolve_as_aml_namepath(pkg->objects[i], dev, &pwr_resource);
        uacpi_status ustatus = uacpi_eval(pwr_resource, on ? "_ON" : "_OFF", nullptr, nullptr);
        if (uacpi_unlikely_error(ustatus))
        {
            if (ustatus != UACPI_STATUS_NOT_FOUND)
                OBOS_Warning("%s: Could not %s power resource for wake. Status: %d\nNote: Skipping...\n", __func__, on ? "enable" : "disable", ustatus);
            continue;
        }
    }
}```

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this is what it is now

real pecan Nov 1, 2024, 3:27 PM

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ye

flint idol Nov 1, 2024, 3:27 PM

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uacpi_object_array pkg2 = {};
uacpi_object_get_package(pkg->objects[0], &pkg2);
uacpi_object_resolve_as_aml_namepath(pkg2.objects[0], nullptr, &gpe_dev);
uacpi_object_get_integer(pkg2.objects[1], &gpe_idx);```
also this code

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for the wake gpe stuff

real pecan Nov 1, 2024, 3:27 PM

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no error checking at all but ok

real pecan Nov 1, 2024, 3:28 PM

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flint idol ```c static void enable_pwr(uacpi_namespace_node* dev, uacpi_object_array *pkg, ...

same here btw

flint idol Nov 1, 2024, 3:28 PM

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who needed error checking

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it probably™️ exists

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and I don't wanna error check for stuff like fetching integers

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or packages

white mulch Nov 1, 2024, 3:29 PM

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assert(... == UACPI_STATUS_OK)

flint idol Nov 1, 2024, 3:29 PM

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flint idol ```c uacpi_object_array pkg2 = {}; uacpi_object_get_package(pkg->objects[0], &pk...

here I already know that pkg->objects[0] is a package

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333 lines of pure power management

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how fun

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I think this file for D state management will probably end up being 500-600 lines

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unconviniently

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if a D state doesn't exist for a device as power resources (_PRn) or as _PSn, I should still disable the power resources for lower D states, right?

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To put a device into the ACPI power state Dx (where x is a number between 0 and 3 inclusive) the kernel is supposed to (1) enable the power resources required by the device in this state using their _ON control methods and (2) execute the _PSx control method defined for the device. In addition to that, if the device is going to be put into a low-power state (D1-D3) and is supposed to generate wakeup signals from that state, the _DSW (or _PSW, replaced with _DSW by ACPI 3.0) control method defined for it has to be executed before _PSx. Power resources that are not required by the device in the target power state and are not required any more by any other device should be disabled (by executing their _OFF control methods). If the current power state of the device is D3, it can only be put into D0 this way.

white mulch Nov 1, 2024, 3:41 PM

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oh yeah the power resources can be shared

flint idol Nov 1, 2024, 3:41 PM

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fuck acpi

white mulch Nov 1, 2024, 3:42 PM

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maybe you could just not turn any power resources off

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though ofc it would likely result in more power usage

real pecan Nov 1, 2024, 3:44 PM

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whats the point of suspend then LULW

flint idol Nov 1, 2024, 3:44 PM

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const char prn_path[] = { '_', 'P', 'R', '0' + state };
uacpi_namespace_node* prn = uacpi_namespace_node_find(dev, prn_path);```
fnuy variable names

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(hint: o)

white mulch Nov 1, 2024, 3:48 PM

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real pecan whats the point of suspend then <:LULW:543420553021882371>

I wouldn't think that the devices use that much power even if the power source is powered if they are in a sleep state

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would likely be what you get if you use the pcie mechanism to put the device to a sleep state too

flint idol Nov 1, 2024, 3:50 PM

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I hate acpi

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I now go eat

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and be back

real pecan Nov 1, 2024, 6:49 PM

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damn you eat a lot

flint idol Nov 1, 2024, 6:50 PM

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real pecan damn you eat a lot

no I went to do other stuff after eating

flint idol Nov 1, 2024, 7:17 PM

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ok

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time to go suffer

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and implement transitioning to D states

weak kestrel Nov 1, 2024, 7:17 PM

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you ate already?

flint idol Nov 1, 2024, 7:18 PM

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flint idol and implement transitioning to D states

with proper power resource shit

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how would I even know

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if a power resource is shared

real pecan Nov 1, 2024, 7:21 PM

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flint idol if a power resource is shared

make a struct and link every device using the power resource?

flint idol Nov 1, 2024, 7:21 PM

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and how do I find every device using the power resource

real pecan Nov 1, 2024, 7:21 PM

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u run the prw right

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so u know the power resource

flint idol Nov 1, 2024, 7:21 PM

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yeah

real pecan Nov 1, 2024, 7:21 PM

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u accumulate them

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then u just have power resources with arrays of devices

flint idol Nov 1, 2024, 7:23 PM

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sounds boring af

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like

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really boring

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did I mention how that sounds boring

white mulch Nov 1, 2024, 7:26 PM

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real pecan then u just have power resources with arrays of devices

how do you know which ones to turn off tho, do you look at all device's power resources for D0 and then turn off the ones that the wake devices don't use?

flint idol Nov 1, 2024, 7:26 PM

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you can turn off all of them

real pecan Nov 1, 2024, 7:26 PM

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that i have no idea

flint idol Nov 1, 2024, 7:26 PM

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then reenable the ones wake use

white mulch Nov 1, 2024, 7:29 PM

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that sounds kinda sketchy, what if there are devices not in sleep state using them and then you just cut power to them KEKW

flint idol Nov 1, 2024, 7:29 PM

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refcount it

white mulch Nov 1, 2024, 7:29 PM

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well idk if it really matters, maybe it doesn't

flint idol Nov 1, 2024, 7:30 PM

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abstract power resources and ref it for each device using said resource

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the unref it when u wanna turn it off

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until ref becomes zero

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where you actually turn it off

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by evaluating _OFF

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also keep a list of referencing devices

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because why not

white mulch Nov 1, 2024, 7:32 PM

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I guess that works, and you probably want to discover all devices from the acpi namespace and get the power resources of them because if you only get them for the ones you have a driver for it might be bad

flint idol Nov 1, 2024, 7:33 PM

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or just never turn off power resources because you are lazy

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although now I should theorerically be able to wake from sleep

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because I set up stuff properly

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except for D states

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which I need to do

real pecan Nov 1, 2024, 7:34 PM

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do u restore bars now

flint idol Nov 1, 2024, 7:34 PM

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I just said wake from sleep

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not wake from sleep and continue normal operation

white mulch Nov 1, 2024, 7:35 PM

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when you have implemented the bar restore then let me know if it actually properly worked KEKW

flint idol Nov 1, 2024, 7:35 PM

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kk

thick jolt Nov 1, 2024, 9:34 PM

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congrats on 34 stars

flint idol Nov 1, 2024, 10:06 PM

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ty

thick jolt Nov 1, 2024, 10:15 PM

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np !!!

flint idol Nov 2, 2024, 12:29 AM

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if you prefer sanity, do not

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@real pecan apparently linux doesn't support PCI PM (the thing you do to put PCI devices into D states)

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PCI bus power management, however, is not supported by the Linux kernel at the time of this writing and therefore it is not covered by this document.

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https://docs.kernel.org/power/pci.html

thick jolt Nov 2, 2024, 12:38 AM

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flint idol if you prefer sanity, do not

fair

flint idol Nov 2, 2024, 12:38 AM

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and if you do decide to despite my warning

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you'll probably want to wait until I finish my implementation so you can have a reference that isn't linux

thick jolt Nov 2, 2024, 12:38 AM

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i see

flint idol Nov 2, 2024, 12:39 AM

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I am the first hobby kernel with suspend

thick jolt Nov 2, 2024, 12:39 AM

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!!

flint idol Nov 2, 2024, 12:39 AM

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fr

thick jolt Nov 2, 2024, 12:39 AM

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frfr

flint idol Nov 2, 2024, 12:43 AM

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In some platforms, certain power resources may be shared between devices and processors, requiring both to be in specific idle states before they can be turned off. Direct OSPM control of such resources is not possible while the OS is running because the processors depend on the resources being enabled whilst they are running. It is only when processors go idle that it may be possible to turn off these shared resources. For a given resource of this type this is only possible if, in addition to the processors being idle, any other devices that depend on the resource are in a state that allows powering it down. In these cases, the platform can manage the power resource as part of entry/exit from a Low Power Idle (LPI) state and OSPM can guide the decision on whether or not to turn off the resources with its LPI state request. In those cases the power resource _ON/_OFF/_STA methods are completely redundant.

Passive power resources, which are just like traditional power resources except they do not include _ON, _OFF, or _STA, are introduced to support this case. Omission of these methods reduces overhead by avoiding redundant evaluations and saves the platform from having to supply (working) methods which it does not need. Since OSPM cannot manage passive power resources directly via _ON/_OFF, passive power resources must be listed as a dependency of at least one LPI state where the platform will manipulate them. The dependencies between LPI states and power resources are described in the _RDI object. See _RDI (Resource Dependencies for Idle) for additional details.

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just found this

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if I understood right

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it actually tells me the power resource dependencies

flint idol Nov 2, 2024, 1:09 AM

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marker

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I'm going to redesign my entire PCI interface

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luckily PCI is only used twice in all of OBOS

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the AHCI driver

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and PnP

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so first I guess I'll have a struct pci_resource

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enum pci_resource_type
{
    PCI_RESOURCE_BAR,
    PCI_RESOURCE_MSI_CAP,
    PCI_RESOURCE_MSIX_CAP,
    PCI_RESOURCE_CMD_REGISTER, // only ever one of these
};
struct pci_bar
{
    uint8_t idx;
    uintptr_t phys;
    size_t size;
    bool bar32; // true: 32-bit bar, false: 64-bit bar
    uint8_t flags;
};
struct pci_resource
{
    union {
        struct pci_bar *bar;
        uint16_t cmd_register;
        // msi(-x) stuff
    };
    pci_resource_type type;
    size_t refs;
};```

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as well as a struct pci_device

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which contains the HID of the pci device (class, subclass, and prog if in a more unified format)

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vendor id

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device id

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the location

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and all the pci resources

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all PCI devices will be cached in memory

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I will also be supporting PCIe

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I will have some helpers to update resources

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and stuff

flint idol Nov 2, 2024, 1:20 AM

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flint idol I will have some helpers to update resources

e.g., I change a BAR resource

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I can call something like Drv_UpdateResource(device, the_bar_we_just_updated);

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to tell the PCI bus I modified the BAR

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on top of that it can also restore PCI resources after wake

flint idol Nov 2, 2024, 1:22 AM

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flint idol the location

also the command register

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which will also be a resource

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union pci_hid
{
    struct
    {
        uint8_t classCode;
        uint8_t subClass;
        uint8_t progIf;
        uint8_t revId;
        uint16_t vendorId;
        uint16_t deviceId;
    } OBOS_PACK indiv;
    uint64_t id;
};
struct pci_device
{
   union pci_hid hid;
   struct pci_resource* resources;
   size_t nResources;
};

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there will also be pci_node

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which can be a pci_device

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or a pci bus bridge (TODO: what is that?)

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hold up

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when am I supposed to be calling uacpi_finalize_gpe_initialization

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omg

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I never call uacpi_finalize_gpe_initialization

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and apparently I need to

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please don't let that be the problem on real hw

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well please do let it be the problem

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but if it is then that'd be embarrassing

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Didn't fix anything

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Yeah so I did look at some debug logs

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That I added

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It only confirmed that the D state needed doesn't exist on my pc

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I'll set uacpi to trace

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after spending way too much time looking for the function that sets the uacpi log level

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I will now reboot and see what uacpi is actually doing

real pecan Nov 2, 2024, 9:28 AM

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flint idol I never call `uacpi_finalize_gpe_initialization`

lol

real pecan Nov 2, 2024, 9:28 AM

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flint idol <@353593948523986945> apparently linux doesn't support PCI PM (the thing you do ...

i doubt this tbh, might be outdated information

flint idol Nov 2, 2024, 12:53 PM

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Got some logs on real hw

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It still doesn't wake my kernel though

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trace isn't enough logging

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time to use DEBUG

real pecan Nov 2, 2024, 1:00 PM

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lol

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maybe add your own logs to know where it hangs at least

flint idol Nov 2, 2024, 1:00 PM

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It doesn't hang

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It never wakes up

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Same bug I was debugging two or three days ago

flint idol Nov 2, 2024, 1:01 PM

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flint idol

Right after this it appears to have suspended

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But smashing the keyboard to wake me does nothing

real pecan Nov 2, 2024, 1:02 PM

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ohh

flint idol Nov 2, 2024, 1:02 PM

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Clicking the power button makes it reboot

real pecan Nov 2, 2024, 1:02 PM

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lol

flint idol Nov 2, 2024, 1:02 PM

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Debug is too much logs

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So I'm gonna make it only do debug logs

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When evaluating PSW

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inb4 it never evaluated PSW

real pecan Nov 2, 2024, 1:03 PM

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u do do setup_for_wake and stuff right?

flint idol Nov 2, 2024, 1:03 PM

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Yup

flint idol Nov 2, 2024, 1:04 PM

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real pecan u do do setup_for_wake and stuff right?

https://pastebin.com/yXx4dcwy

Pastebin

Pastebin.com is the number one paste tool since 2002. Pastebin is a website where you can store text online for a set period of time.

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if you were wondering how I actually setup a device for wake the code's in here

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OBOS_DeviceMakeWakeCapable

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at line 166

real pecan Nov 2, 2024, 1:05 PM

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gpe_dev is not the device

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gpe dev is nullptr in your case

flint idol Nov 2, 2024, 1:05 PM

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yes

real pecan Nov 2, 2024, 1:05 PM

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yes what

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just pass in nullptr

flint idol Nov 2, 2024, 1:05 PM

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if it exists

real pecan Nov 2, 2024, 1:05 PM

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no no

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ur just doing it wrong

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its always \_GPE

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its not the power resource

flint idol Nov 2, 2024, 1:06 PM

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I think you may have misunderstood my code

real pecan Nov 2, 2024, 1:06 PM

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maybe

flint idol Nov 2, 2024, 1:06 PM

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if the first element of _PRW

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is a package

real pecan Nov 2, 2024, 1:07 PM

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oh yeah nvm

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probably

flint idol Nov 2, 2024, 1:07 PM

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the first element is a reference to the GPE device

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and the 2nd element is the gpe index

real pecan Nov 2, 2024, 1:07 PM

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did u try printf'ing what it finds?

flint idol Nov 2, 2024, 1:07 PM

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nope

real pecan Nov 2, 2024, 1:07 PM

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should probably

flint idol Nov 2, 2024, 1:13 PM

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added some more logs

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Other than the fact that the gpe index is 0xd each time.e

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It looks fine

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PSW is evaluated

real pecan Nov 2, 2024, 1:16 PM

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flint idol Other than the fact that the gpe index is 0xd each time.e

thats probably fine

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just shared gpe

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what does psw say

flint idol Nov 2, 2024, 1:16 PM

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Well it is only enabling USB controller sleep capability

flint idol Nov 2, 2024, 1:17 PM

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real pecan what does psw say

It succeeded

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It sets some field to Ones

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And returns

real pecan Nov 2, 2024, 1:18 PM

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makes sense

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maybe d2 is wrong

flint idol Nov 2, 2024, 1:18 PM

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according to the acpi spec it should be right...

real pecan Nov 2, 2024, 1:18 PM

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yea..

flint idol Nov 2, 2024, 1:19 PM

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well the deepest sleep state supported in S3

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is D2

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so apparently the D state I should enter is D2

real pecan Nov 2, 2024, 1:19 PM

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also like

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does fb never shutdown when u suspend?

flint idol Nov 2, 2024, 1:20 PM

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it does

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and the light on my power button indicating suspend

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is on

real pecan Nov 2, 2024, 1:20 PM

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interesting

flint idol Nov 2, 2024, 1:22 PM

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one behaviour that might be wrong

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is not enabling a device for wake

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if _S3D and _S3W don't exist

real pecan Nov 2, 2024, 1:23 PM

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btw

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    args.objects[0] = uacpi_object_create_integer(enableWake);
    args.objects[1] = uacpi_object_create_integer(target_slp);
    args.objects[2] = uacpi_object_create_integer(target_d_state == DSTATE_INVALID ? 0 : target_d_state);
    uacpi_object_ref(args.objects[0]);
    uacpi_object_ref(args.objects[1]);
    uacpi_object_ref(args.objects[2]);

flint idol Nov 2, 2024, 1:23 PM

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double reference I assume

real pecan Nov 2, 2024, 1:23 PM

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did u assume that initially created objects have a refcount of 0?

flint idol Nov 2, 2024, 1:23 PM

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yup

real pecan Nov 2, 2024, 1:23 PM

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lol

flint idol Nov 2, 2024, 1:24 PM

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I'll just fix that rn

real pecan Nov 2, 2024, 1:24 PM

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flint idol is not enabling a device for wake

maybe, id lean heavily for linux code or like bsd code

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to see what it does

flint idol Nov 2, 2024, 1:24 PM

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I'll look in a bit

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I changed that behaviour temporarily to see if it changes anything

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I keep accidentally clicking sleep instead of restart

real pecan Nov 2, 2024, 1:25 PM

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lol

flint idol Nov 2, 2024, 1:25 PM

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when tryna reboot into obos

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Weirdly when I unplug a usb

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Then replug it in

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It seems to initialize

real pecan Nov 2, 2024, 1:27 PM

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strange that its rebooting on power button press

flint idol Nov 2, 2024, 1:28 PM

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Yeah

real pecan Nov 2, 2024, 1:28 PM

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flint idol It seems to initialize

wdym

flint idol Nov 2, 2024, 1:28 PM

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Like it has a light

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That flashes

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When it's plugged in

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To a computer

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Which means that the ehci controller is alive

real pecan Nov 2, 2024, 1:29 PM

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ah and no wake?

flint idol Nov 2, 2024, 1:29 PM

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No wale

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*wake

real pecan Nov 2, 2024, 1:29 PM

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interesting

flint idol Nov 2, 2024, 1:31 PM

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Hold on

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When it's shutdown

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The USB still flashes

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So it might be that ehci really is dead?

real pecan Nov 2, 2024, 1:32 PM

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maybe its just continuous power delivery

flint idol Nov 2, 2024, 1:32 PM

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Maybe

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The EHCI controller has no power resources

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Both controllers

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And the XHCI controller

real pecan Nov 2, 2024, 1:33 PM

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damn

flint idol Nov 2, 2024, 1:36 PM

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just found a mistake in the acpi spec

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for _S1D

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it says it returns

An Integer containing the shallowest D-state supported in state S2

real pecan Nov 2, 2024, 1:36 PM

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copy pasta

flint idol Nov 2, 2024, 1:37 PM

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what if instead of evaluating _SnD and _SnW

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I use the things in the uacpi namespace node info

real pecan Nov 2, 2024, 1:38 PM

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whats the diff

flint idol Nov 2, 2024, 1:38 PM

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idk

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I saw this

This value overrides an S-state to D-state mapping OSPM may ascertain from the device’s power resource declarations.

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and thought that maybe uacpi would have known a bit more

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and looked in other places for _SnD

real pecan Nov 2, 2024, 1:39 PM

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nah

flint idol Nov 2, 2024, 1:41 PM

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well it is an override

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so that doesn't matter

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time to look at linux src

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y'know what

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I'm gonna beat mc and be back

flint idol Nov 2, 2024, 2:11 PM

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just beat minecraft

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@real pecan I just realized that linux passes nothing to DSW

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with nothing meaning 0,0,0

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and nothing to PSW

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with nothing meaning it executes it without any arguments

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https://elixir.bootlin.com/linux/v6.11.5/source/drivers/acpi/scan.c#L1054

scan.c - drivers/acpi/scan.c - Linux source code v6....

Elixir Cross Referencer - source file of Linux (version v6.11.5). Browsed file: /drivers/acpi/scan.c

flint idol Nov 2, 2024, 2:23 PM

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flint idol with nothing meaning it executes it without any arguments

nvm

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it passes zero to it too

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https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/07_Power_and_Performance_Mgmt/device-power-management-objects.html#psw-power-state-wake

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which, according to the acpi spec, would disable the device's wake capabilities

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and from what I could reverse engineer from my dsdt

real pecan Nov 2, 2024, 2:27 PM

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huh

flint idol Nov 2, 2024, 2:28 PM

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ok I think I was looking in the wrong place

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https://elixir.bootlin.com/linux/v6.11.5/source/drivers/acpi/power.c#L737

power.c - drivers/acpi/power.c - Linux source code v...

Elixir Cross Referencer - source file of Linux (version v6.11.5). Browsed file: /drivers/acpi/power.c

real pecan Nov 2, 2024, 2:39 PM

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flint idol https://elixir.bootlin.com/linux/v6.11.5/source/drivers/acpi/power.c#L737

unrelated, but i like how they just create objects on the stack as method arguments

#

like if that method does a RefOf and then stores it somewhere this will be a UAF

#

thats why i dont even offer such api

flint idol Nov 2, 2024, 2:41 PM

#

wait

#

I just realized I had a bug with GPEs previously

#

where I would get infinite GPEs

#

so I kept them masked

#

I wonder if that could have anything to do with this

real pecan Nov 2, 2024, 2:47 PM

#

lol

flint idol Nov 2, 2024, 2:55 PM

#

I still get infinite GPEs

#

But it doesn't hang the system anymore

#

Nvm

#

It hangs after a bit

real pecan Nov 2, 2024, 2:57 PM

#

u can mask that particular GPE

#

uacpi_mask_gpe(nullptr, Idx)

flint idol Nov 2, 2024, 2:57 PM

#

It gets an infinite stream of GOEs

#

*GPEs

#

or really

#

an infinite stream of GSI 9

#

/*
    oboskrnl/irq/irql.h

    Copyright (c) 2024 Omar Berrow
*/

#pragma once

// You mustn't include anything else, or everything will likely stop compiling.
#include <int.h>```
I love this comment in irql.h lol

real pecan Nov 2, 2024, 2:59 PM

#

well

#

gsi 9 can mean literally anything

flint idol Nov 2, 2024, 2:59 PM

#

in my case it's GPE

#

just noticed a bug

#

static void bootstrap_irq_handler(irq* i, interrupt_frame* frame, void* udata, irql oldIrql)
{
    OBOS_UNUSED(i);
    OBOS_UNUSED(frame);
    OBOS_UNUSED(oldIrql);
    uacpi_handle ctx = *((void**)udata);
    uacpi_interrupt_handler handler = (uacpi_interrupt_handler)((void**)udata)[1];
    handler(ctx);
}

#

uintptr_t *udata = OBOS_KernelAllocator->ZeroAllocate(OBOS_KernelAllocator, 1, sizeof(uintptr_t), nullptr);
    udata[0] = (uintptr_t)ctx;
    udata[1] = (uintptr_t)handler;
    irqHnd->handler = bootstrap_irq_handler;
    irqHnd->handlerUserdata = udata;```

#

nvm

#

I misread that

real pecan Nov 2, 2024, 3:01 PM

#

a gpe spam can happen if it expects the system to do something in response and u dont do it

flint idol Nov 2, 2024, 3:02 PM

#

mhm

#

and how do I know what that is?

real pecan Nov 2, 2024, 3:03 PM

#

u generally dont

#

proprietary drivers

flint idol Nov 2, 2024, 3:03 PM

#

bruh

real pecan Nov 2, 2024, 3:03 PM

#

but like

flint idol Nov 2, 2024, 3:03 PM

#

I suspect it might be a bug in my IOAPIC code

#

since it's TriggerModeLevelSensitive

#

and active low

#

iirc

real pecan Nov 2, 2024, 3:04 PM

#

only GPEs with an AML handler are enabled by default

#

does it tell u how many it has enabled

#

and also u do do setup_for_wake before finalize_initialization right?

flint idol Nov 2, 2024, 3:04 PM

#

yes

real pecan Nov 2, 2024, 3:05 PM

#

if u add a printf to uacpi we can see which aml handler it runs

#

and what that handler does

flint idol Nov 2, 2024, 3:05 PM

#

okie

#

where shall I put it?

#

just throw a function name at me

real pecan Nov 2, 2024, 3:05 PM

#

it already exists

#

enable trace

flint idol Nov 2, 2024, 3:05 PM

#

okie

real pecan Nov 2, 2024, 3:05 PM

#

async_run_gpe_handler

flint idol Nov 2, 2024, 3:06 PM

#

inb4 it never gets to uacpi

real pecan Nov 2, 2024, 3:07 PM

#

wouldnt be surprised

flint idol Nov 2, 2024, 3:09 PM

#

Ummm

#

It infinitely prints that it's in the bootstrap irq handler

#

But never prints any thing in uACPI

real pecan Nov 2, 2024, 3:09 PM

#

lol

#

u could add printfs to handle_sci

flint idol Nov 2, 2024, 3:10 PM

#

It initialized a gpe block

#

Then starts printing that forever

flint idol Nov 2, 2024, 3:10 PM

#

real pecan u could add printfs to `handle_sci`

Gtg for a bit

real pecan Nov 2, 2024, 3:11 PM

#

static uacpi_interrupt_ret handle_sci(uacpi_handle ctx)
{
    uacpi_interrupt_ret int_ret = UACPI_INTERRUPT_NOT_HANDLED;

    int_ret |= handle_fixed_events();
    int_ret |= handle_gpes(ctx);

    return int_ret;
}

#

this is the interrupt handler

flint idol Nov 2, 2024, 3:56 PM

#

@real pecan am I supposed to call uacpi_initialize_events

#

or does uacpi do it for me

#

#define UACPI_INTERRUPT_NOT_HANDLED 0
#define UACPI_INTERRUPT_HANDLED 1```

real pecan Nov 2, 2024, 4:00 PM

#

flint idol <@353593948523986945> am I supposed to call `uacpi_initialize_events`

its an internal function

flint idol Nov 2, 2024, 4:00 PM

#

ok

#

The GPE goes unhandled

#

It gets to handle_sci

real pecan Nov 2, 2024, 4:09 PM

#

maybe one of the regs in detect_gpes has a non-zero status

flint idol Nov 2, 2024, 4:11 PM

#

maybe I'm not even supposed to be getting an SCI in the first place

real pecan Nov 2, 2024, 4:12 PM

#

well u do get it so

#

u probably are

#

unless you're fucking something up

flint idol Nov 2, 2024, 4:12 PM

#

could be a bug with how I'm configuring the IOAPIC

#

I'm gonna take a look at the madt

real pecan Nov 2, 2024, 4:12 PM

#

yeah its a possibility

flint idol Nov 2, 2024, 4:13 PM

#

I found the interrupt source override for the SCI

real pecan Nov 2, 2024, 4:15 PM

#

yeah i think ur fucking it up

#

because uacpi has a warning for this

        uacpi_warn("GPE(%02X) fired but no handler, keeping disabled\n",
                   event->idx);

#

maybe tahts why wake also doesnt work

flint idol Nov 2, 2024, 4:16 PM

#

maybe

#

the SCI interrupt is overriden as active-high level-triggered

real pecan Nov 2, 2024, 4:19 PM

#

maybe its a bogus override or maybe ur not handling it correctly

flint idol Nov 2, 2024, 4:19 PM

#

found the bug

#

*a bug

real pecan Nov 2, 2024, 4:20 PM

#

what is it

flint idol Nov 2, 2024, 4:20 PM

#

bool res = false;
if (polarity == 0b1 || polarity == 0)
    res = true;
else if (polarity == 0b11)
    res = false;```

#

// polarity (0: active-high, 1: active-low)```

#

real pecan Nov 2, 2024, 4:20 PM

#

maybe use fucking enums

#

uacpi lliterally has them defined

flint idol Nov 2, 2024, 4:20 PM

#

I wrote this ages ago

#

this is likely copied from my third kernel

real pecan Nov 2, 2024, 4:21 PM

#

F

flint idol Nov 2, 2024, 4:23 PM

#

I fixed that

#

time to see if it fixes anything

#

It fixed the gpe bug

#

But not the wake bug

real pecan Nov 2, 2024, 4:23 PM

#

well thats one bug out of the way

flint idol Nov 2, 2024, 4:24 PM

#

Yea

#

Hold on

#

Nvm

#

ngl fuck acpi

#

I do all it tells me to make a device wake capable

#

and behold

#

it never wakes up

#

maybe I am triple faulting

#

not that I would know why, or how

#

It seems to triple fault in the smp trampoline

#

On wale

#

*wake

#

@real pecan this is big, wake works

#

But doesn't at the same time

white mulch Nov 2, 2024, 4:39 PM

#

from keyboard?

flint idol Nov 2, 2024, 4:39 PM

#

No from power buttom

#

*button

white mulch Nov 2, 2024, 4:40 PM

#

for usb I am pretty sure that you need to first setup the usb controller as it has its own port suspend stuff and it generates wake events for enabled ports

flint idol Nov 2, 2024, 4:40 PM

#

Idk what's happening though

#

Why it triple faults

#

Could be corrupted memory

#

It is confirmed to triple fault in the smp trampoline

#

And not somewhere else in the code

#

It triple faults after entering long mode

#

Which can mean two things:
Gdt is corrupted
Page table has the smp trampoline unmapped

#

but it probably is not the gdt

#

since otherwise the other smp trampoline code would be corrupted

#

but I explicitly map the smp trampoline

#

why can't I just have a real hw qemu log

#

    jmp 0x8:reload_cs_addr
.reload_cs:
reload_cs_addr: equ $-Arch_SMPTrampolineStart+trampoline_base
    mov ax, 0x10
    mov ss, ax
    mov ds, ax
    mov gs, ax
    mov fs, ax```

#

it triple faults somewhere here

real pecan Nov 2, 2024, 5:03 PM

#

flint idol <@353593948523986945> this is big, wake works

wait what did u change

flint idol Nov 2, 2024, 5:04 PM

#

If I knew I'd tell you

#

Maybe it always worked but triple faulted each time

#

As now I know it triples

flint idol Nov 2, 2024, 5:07 PM

#

flint idol ```x86asm jmp 0x8:reload_cs_addr .reload_cs: reload_cs_addr: equ $-Arch_SMPT...

It triple faults changing the code segment

#

it'd be funny if I were in protected mode

#

on entry of the smp trampoline

#

Wtf

#

Wtf

#

Wtf

#

I decided to assert that

#

Just in case

#

The assertion failed

real pecan Nov 2, 2024, 5:13 PM

#

how did u even asert it

flint idol Nov 2, 2024, 5:13 PM

#

Looked at cr0

#

If bit 0 is set

#

Jump to the reset vector

real pecan Nov 2, 2024, 5:13 PM

#

meh probably some skill issue

flint idol Nov 2, 2024, 5:13 PM

#

Otherwise continue

#

ok it might not be the case

#

as I had my infinite loop right after the place where it triple faults

flint idol Nov 2, 2024, 5:14 PM

#

flint idol Jump to the reset vector

    mov eax, cr0
    test eax, 0x1
    jz .down
    jmp 0xf000:0xfff0

.down:```

#

Thank God it wasn't the case

#

Otherwise I would be sending an angry email to acer

white mulch Nov 2, 2024, 5:17 PM

#

it is possible that you indeed boot in protected mode tho

flint idol Nov 2, 2024, 5:17 PM

#

Bit 0 of cr0 is off

#

Making me in real mode

#

When I try looking at the gdt

#

Before reloading the segments

#

It triple faults

#

Rather that

#

Or the assertion fails

#

mov eax, [gdt_addr+0x8+4]
    test eax, 0x00af9b00
    jz .down1
    jmp 0xf000:0xfff0

.down1:

    mov eax, [gdt_addr+0x10+4]
    test eax, 0x00cf9300
    jz .down2
    jmp 0xf000:0xfff0

.down2:
       db 0xeb, 0xfe```

#

the joy of debugging smp trampolines

real pecan Nov 2, 2024, 5:22 PM

#

well it works in qemu right?

flint idol Nov 2, 2024, 5:22 PM

#

yea

real pecan Nov 2, 2024, 5:22 PM

#

interesting

flint idol Nov 2, 2024, 5:22 PM

#

if it didn't then why would I be debugging it on real hw

real pecan Nov 2, 2024, 5:23 PM

#

mental insanity

flint idol Nov 2, 2024, 5:23 PM

#

meme

#

I fucking hate this shit

#

I am going insane

real pecan Nov 2, 2024, 5:35 PM

#

just make obos 16 bit so u dont have to switch

flint idol Nov 2, 2024, 5:37 PM

#

I make SURE that the gdt is intact RIGHT FUCKING BEFORE I reload the segment

#

and it still fucking triple faults

#

IS IT FDRESH SD
fds G

#

DSGURHEGURHED]

#

DFSGVHDFVGDHFKJGHDFS

#

e

#

e

#

e

#

e

quaint rivetBOT Nov 2, 2024, 5:38 PM

#

Anti-spam Message

Possible spam detected for user: oberrow. Please contact a moderator to be unmuted.

real pecan Nov 2, 2024, 5:39 PM

#

maybe the gdt is too high in memory

flint idol Nov 2, 2024, 5:39 PM

#

it's at 0x1008

#

which is mapped

real pecan Nov 2, 2024, 5:39 PM

#

u do respect real mode addressing and stuff right?

flint idol Nov 2, 2024, 5:40 PM

#

I'm in 16-bit long mode

real pecan Nov 2, 2024, 5:40 PM

#

maybe real hw puts u into non zero cs

flint idol Nov 2, 2024, 5:40 PM

#

or smth like that

#

if my trampoline is at 0x1000

#

wouldn't that mean that cs is zero

real pecan Nov 2, 2024, 5:40 PM

#

it can be represented as 0 cs yes

#

doesnt have to tho

flint idol Nov 2, 2024, 5:41 PM

#

I'll make sure it is then

real pecan Nov 2, 2024, 5:41 PM

#

reload cs to zero first thing yeah

flint idol Nov 2, 2024, 5:42 PM

#

real pecan reload cs to zero first thing yeah

Infy you genius

real pecan Nov 2, 2024, 5:43 PM

#

lmao

#

so i guess your suspend now works on real hw

flint idol Nov 2, 2024, 5:43 PM

#

Wait what the fuck lmao

#

mov cs, ax

#

Didn't crash

real pecan Nov 2, 2024, 5:44 PM

#

wtf

flint idol Nov 2, 2024, 5:56 PM

#

ok wtf

#

why

#

is it now

#

triple faulting

#

in QEMU

#

ashnjryr

#

AHHHHHHHHHH

#

BRO

#

WHY

#

IS THE TRAMPOLINE'S STACK MAPPED AS READ ONLY

#

nooo

#

ok fixed

#

@real pecan I might almost be able to wake on real hw

#

I mean it hangs somewhere

real pecan Nov 2, 2024, 6:06 PM

#

is it in c code at least

flint idol Nov 2, 2024, 6:09 PM

#

only god knows

#

78% chance that it is

#

anyway

#

time to push this code

#

then I will commence work on the new pci interface

real pecan Nov 2, 2024, 6:19 PM

#

flint idol I mean it hangs somewhere

did u figure it out

flint idol Nov 2, 2024, 6:19 PM

#

nope

#

it could be anything

#

and I don't

#

have the willpower to debug that

#

without printf

real pecan Nov 2, 2024, 6:21 PM

#

reinit fb bars

white mulch Nov 2, 2024, 6:28 PM

#

I doubt it's that easy tbh

real pecan Nov 2, 2024, 6:28 PM

#

wdym?

white mulch Nov 2, 2024, 6:28 PM

#

as in you'd just get the framebuffer back after restoring the bars without doing anything else

real pecan Nov 2, 2024, 6:28 PM

#

if u run _WAK and stuff u should

white mulch Nov 2, 2024, 6:30 PM

#

also regarding the bar restore I am not sure how do you actually get it to properly work, I tried it on the legacy chipset in qemu that uses port io for pci space and there the values persist after you write them but if you use q35 and mmio pci space then they just read back as zeros after you write to them

real pecan Nov 2, 2024, 6:30 PM

#

also might be because MTRRs also get reset

flint idol Nov 2, 2024, 6:30 PM

#

forgot those existed

white mulch Nov 2, 2024, 6:31 PM

#

that could be, though idk if qemu cares about that

real pecan Nov 2, 2024, 6:32 PM

#

on qemu it should be as easy as just writing to bar regs, so that must be some sort of skill issue on your part

#

(probably)

flint idol Nov 2, 2024, 6:35 PM

#

https://github.com/OBOS-dev/obos/commit/d47affee23000df85c0e43baaef681507ad2ff63

GitHub

Implement suspend (note: incomplete; does not restore some stuff) ·...

ACPI: Implement suspend.
ACPI: Implement device D states
ACPI: Register wake GPEs before finalization
ACPI: Make a function initializing uACPI (instead of depending on the arch)
Core: Make the sche...

#

only 1k additions meme

#

nothing too big

real pecan Nov 2, 2024, 6:36 PM

#

white mulch that could be, though idk if qemu cares about that

but cant u just add printfs or enable traces and see why they wont get enabled?

white mulch Nov 2, 2024, 6:36 PM

#

the bars?

flint idol Nov 2, 2024, 6:37 PM

#

-d trace:pci*

real pecan Nov 2, 2024, 6:37 PM

#

yeah

flint idol Nov 2, 2024, 6:37 PM

#

time to make the new pci interface

real pecan Nov 2, 2024, 6:37 PM

#

flint idol https://github.com/OBOS-dev/obos/commit/d47affee23000df85c0e43baaef681507ad2ff63

nice, u should really make a wiki article after

flint idol Nov 2, 2024, 6:38 PM

#

flint idol ```c union pci_hid { struct { uint8_t classCode; uint8_t...

marker

white mulch Nov 2, 2024, 6:38 PM

#

it only shows this (and no pci_cfg_write/pci_cfg_read that I get when initializing some devices) ```
bus reset
pci_update_mappings_del VGA 00:01.0 0,0xfd000000+0x1000000
pci_update_mappings_del VGA 00:01.0 2,0xfebd4000+0x1000
pci_update_mappings_del e1000e 00:02.0 0,0xfeb80000+0x20000
pci_update_mappings_del e1000e 00:02.0 1,0xfeba0000+0x20000
pci_update_mappings_del e1000e 00:02.0 2,0xc040+0x20
pci_update_mappings_del e1000e 00:02.0 3,0xfebd0000+0x4000
pci_update_mappings_del ich9-ahci 00:1f.2 4,0xc060+0x20
pci_update_mappings_del ich9-ahci 00:1f.2 5,0xfebd5000+0x1000
pci_update_mappings_del ICH9-SMB 00:1f.3 4,0x700+0x40
[kernel][smp]: resuming after wake from sleep
KERNEL PANIC: pci.cpp:49: (resume_from_suspend) assertion 'device->read(hdr0::BARS[i]) == device->raw_bars[i]' failed

flint idol Nov 2, 2024, 6:38 PM

#

real pecan nice, u should really make a wiki article after

yeah I will be doing that

real pecan Nov 2, 2024, 6:38 PM

#

white mulch it only shows this (and no pci_cfg_write/pci_cfg_read that I get when initializi...

ecam addres gets reset probably

white mulch Nov 2, 2024, 6:38 PM

#

how do you restore that lol

flint idol Nov 2, 2024, 6:38 PM

#

I just want to make sure that my suspend properly works on real hw (and doesn't hang somewhere arbitrary) before writing the article

real pecan Nov 2, 2024, 6:39 PM

#

white mulch how do you restore that lol

its a register in the chipset i think

white mulch Nov 2, 2024, 6:39 PM

#

bruh

flint idol Nov 2, 2024, 6:39 PM

#

bruh

real pecan Nov 2, 2024, 6:39 PM

#

but idk if thats the way to do it

flint idol Nov 2, 2024, 6:39 PM

#

anyway I'll be back in a bit

real pecan Nov 2, 2024, 7:10 PM

#

white mulch how do you restore that lol

found it

#

https://elixir.bootlin.com/qemu/v9.1.1/source/hw/pci-host/q35.c#L290

q35.c - hw/pci-host/q35.c - Qemu source code v9.1.1 ...

Elixir Cross Referencer - source file of Qemu (version v9.1.1). Browsed file: /hw/pci-host/q35.c

#

its this value https://elixir.bootlin.com/qemu/v9.1.1/source/include/hw/pci-host/q35.h#L110

q35.h - include/hw/pci-host/q35.h - Qemu source code...

Elixir Cross Referencer - source file of Qemu (version v9.1.1). Browsed file: /include/hw/pci-host/q35.h

#

in the MCH_HOST_BRIDGE_PCIEXBAR register

#

so basically u have to reinitialize the chipset yourself

flint idol Nov 2, 2024, 7:13 PM

#

real pecan so basically u have to reinitialize the chipset yourself

Wtf

real pecan Nov 2, 2024, 7:13 PM

#

its one write

white mulch Nov 2, 2024, 7:13 PM

#

that's kinda weird, there are like billion different chipsets

flint idol Nov 2, 2024, 7:13 PM

#

I would expect that to be handled by _WAK

real pecan Nov 2, 2024, 7:13 PM

#

static void mch_mmconfig_setup(u16 bdf)
{
    u64 addr = Q35_HOST_BRIDGE_PCIEXBAR_ADDR;
    u32 upper = addr >> 32;
    u32 lower = (addr & 0xffffffff) | Q35_HOST_BRIDGE_PCIEXBAREN;
    pci_config_writel(bdf, Q35_HOST_BRIDGE_PCIEXBAR, 0);
    pci_config_writel(bdf, Q35_HOST_BRIDGE_PCIEXBAR + 4, upper);
    pci_config_writel(bdf, Q35_HOST_BRIDGE_PCIEXBAR, lower);
    pci_enable_mmconfig(Q35_HOST_BRIDGE_PCIEXBAR_ADDR, "q35");
}

#

this is how SeaBIOS does it

#

basically just the address | 1

#

https://github.com/coreboot/seabios/blob/62a1429ec1ec67f14c039d97627a6a7ef70a983c/src/fw/pciinit.c#L480

GitHub

seabios/src/fw/pciinit.c at 62a1429ec1ec67f14c039d97627a6a7ef70a983...

mirror of seabios. Contribute to coreboot/seabios development by creating an account on GitHub.

flint idol Nov 2, 2024, 7:14 PM

#

real pecan basically just the address | 1

* 100000 different chipsets

real pecan Nov 2, 2024, 7:15 PM

#

maybe on real hw its handled via _WAK idk

white mulch Nov 2, 2024, 7:16 PM

#

it looks like linux only does it to a few host bridges so that might be the case

real pecan Nov 2, 2024, 7:17 PM

#

white mulch it looks like linux only does it to a few host bridges so that might be the case

did u find the q35 init code in linux?

flint idol Nov 2, 2024, 7:17 PM

#

How does it know that it should? Does it probe it by writing an address and making sure the same value is read back

#

And how does it know what chipsey

real pecan Nov 2, 2024, 7:17 PM

#

its literally a pci device at 00:00.0?

#

the host bridge is a pci device

#

the base

flint idol Nov 2, 2024, 7:18 PM

#

Now I'm just confused

real pecan Nov 2, 2024, 7:18 PM

#

type lspci

flint idol Nov 2, 2024, 7:18 PM

#

We need to reinitialize the chipset

real pecan Nov 2, 2024, 7:18 PM

#

your pci device 0 is the chipset

flint idol Nov 2, 2024, 7:18 PM

#

So we can use PCI

#

And then we find the chipset with pci

real pecan Nov 2, 2024, 7:19 PM

#

u can use the legacy io

#

ecam must be enabled separately

flint idol Nov 2, 2024, 7:19 PM

#

oh

white mulch Nov 2, 2024, 7:19 PM

#

real pecan did u find the q35 init code in linux?

or actually nvm I didn't it just reads the base from that kind of register

real pecan Nov 2, 2024, 7:22 PM

#

https://github.com/torvalds/linux/blob/11066801dd4b7c4d75fce65c812723a80c1481ae/arch/x86/pci/mmconfig-shared.c#L311

GitHub

linux/arch/x86/pci/mmconfig-shared.c at 11066801dd4b7c4d75fce65c812...

Linux kernel source tree. Contribute to torvalds/linux development by creating an account on GitHub.

#

supposedly its this

white mulch Nov 2, 2024, 7:22 PM

#

that's what I found yeah

real pecan Nov 2, 2024, 7:22 PM

#

but that doesnt have q35

white mulch Nov 2, 2024, 7:24 PM

#

I guess I can at least try if doing that to see if it changes anything regardless

real pecan Nov 2, 2024, 7:25 PM

#

yeah i mean we know it will

#

i saw what it does in reset in qemu

#

it disables it

#

i just dont understand how linux restores it

flint idol Nov 2, 2024, 7:26 PM

#

linux is just magic

#

it does some black magic to wake up from suspend

#

properly

#

it's the only way

white mulch Nov 2, 2024, 7:30 PM

#

real pecan it disables it

it looks like seabios should restore it tho https://github.com/coreboot/seabios/blob/master/src/fw/pciinit.c#L399

real pecan Nov 2, 2024, 7:30 PM

#

ohh interesting

white mulch Nov 2, 2024, 7:38 PM

#

looks like its still not properly enabled for some reason, the enable bit is not set and if I set it then it starts working

real pecan Nov 2, 2024, 7:39 PM

#

is this resume code even called?

real pecan Nov 2, 2024, 7:42 PM

#

white mulch looks like its still not properly enabled for some reason, the enable bit is not...

this is just the reset value btw, its just 0xB00000...

#

so seabios did not in fact restore it

white mulch Nov 2, 2024, 7:44 PM

#

I guess that branch where it does the enabling didn't get hit then, idk why tho

#

at least pci_resume is called in the only s3 resume path there is

real pecan Nov 2, 2024, 7:44 PM

#

thats so weird

#

u are booting with seabios and not ovmf right?

white mulch Nov 2, 2024, 7:45 PM

#

yes

real pecan Nov 2, 2024, 7:45 PM

#

oh i think its a bug in SeaBIOS

white mulch Nov 2, 2024, 7:45 PM

#

with ovmf it just works without doing anything

real pecan Nov 2, 2024, 7:45 PM

#

nvm no doesnt look like a bug

#

https://github.com/coreboot/seabios/commit/dce99e01b6bfc51175bdf32612fd4f2738e5c3c8

GitHub

fw/pci: add Q35 S3 support · coreboot/seabios@dce99e0

Following the i440fx example, save the LPC, SMBUS and PCIEXBAR bdfs
between OS sleeps and use them to re-configure the
corresponding registers.

Tested-by: Gal Hammer <[email protected]&...

#

this was added a very long time ago too

flint idol Nov 2, 2024, 7:54 PM

#

white mulch it looks like seabios should restore it tho https://github.com/coreboot/seabios/...

so do I need to restore it myself

#

or does seabios do it for me

white mulch Nov 2, 2024, 7:56 PM

#

well its supposed to do it but idk why doesn't it actually happen in practice

#

would have to add debug prints to seabios ig, idk if I feel like doing that rn

flint idol Nov 2, 2024, 7:57 PM

#

I can try

#

just tell me where

#

@white mulch SeaBios does indeed call mch_mmconfig_setup

white mulch Nov 2, 2024, 8:02 PM

#

hmm

flint idol Nov 2, 2024, 8:03 PM

#

PCIe: using q35 mmconfig at 0xb0000000```

#

and I also added a log before calling it

#

and it did indeed call that

white mulch Nov 2, 2024, 8:04 PM

#

could you make sure that mmconfig in src/hw/pci.c is zero at the start of that fn? because if its saved across the suspend then it would try to use the memory space to enable the ecam (which doesn't work for obvious reasons)

#

its a static so you'd have to make it a global or make some sort of accessor fn or smth ig

real pecan Nov 2, 2024, 8:05 PM

#

flint idol ``` PCIe: using q35 mmconfig at 0xb0000000```

well see if it gets there when restoring from suspend

flint idol Nov 2, 2024, 8:06 PM

#

it does

real pecan Nov 2, 2024, 8:06 PM

#

maybe qwinci's seabios is just some bugged old version

flint idol Nov 2, 2024, 8:06 PM

#

white mulch could you make sure that mmconfig in src/hw/pci.c is zero at the start of that f...

mmconfig=0xb0000000

real pecan Nov 2, 2024, 8:06 PM

#

send qwinci your seabios

white mulch Nov 2, 2024, 8:06 PM

#

flint idol `mmconfig=0xb0000000`

that probably explains it lol

real pecan Nov 2, 2024, 8:06 PM

#

flint idol `mmconfig=0xb0000000`

what is this

flint idol Nov 2, 2024, 8:06 PM

#

idk ask qwinci

real pecan Nov 2, 2024, 8:07 PM

#

no like

#

where did u get it

flint idol Nov 2, 2024, 8:07 PM

#

I dprintf'ed it

white mulch Nov 2, 2024, 8:07 PM

#

and that was after suspend?

real pecan Nov 2, 2024, 8:07 PM

#

show the goddamn diff

flint idol Nov 2, 2024, 8:07 PM

#

white mulch and that was after suspend?

after wake from suspend, yes

real pecan Nov 2, 2024, 8:07 PM

#

show git diff

flint idol Nov 2, 2024, 8:07 PM

#

diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index b3e359d7..dd0e35bc 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -396,6 +396,8 @@ void pci_resume(void)
     }
 
     if(MCHMmcfgBDF >= 0) {
+        extern u32 mmconfig;
+        dprintf(1, "mmconfig=0x%08x\n", mmconfig);
         mch_mmconfig_setup(MCHMmcfgBDF);
     }
 }
diff --git a/src/hw/pci.c b/src/hw/pci.c
index 8eda84b2..e556b9ea 100644
--- a/src/hw/pci.c
+++ b/src/hw/pci.c
@@ -14,7 +14,7 @@
 #define PORT_PCI_CMD           0x0cf8
 #define PORT_PCI_DATA          0x0cfc
 
-static u32 mmconfig;
+u32 mmconfig;
 
 static void *mmconfig_addr(u16 bdf, u32 addr)
 {```

real pecan Nov 2, 2024, 8:08 PM

#

nah thats fine

#

it doesnt explain anything

white mulch Nov 2, 2024, 8:08 PM

#

I am pretty sure that my theory is correct in that as its non-zero at that point it uses ecam to write to the base addr register ```c
void pci_config_writel(u16 bdf, u32 addr, u32 val)
{
if (!MODESEGMENT && mmconfig) {
writel(mmconfig_addr(bdf, addr), val);
} else {
pci_ioconfig_writel(bdf, addr, val);
}
}

real pecan Nov 2, 2024, 8:08 PM

#

ohh so it is a bug?

real pecan Nov 2, 2024, 8:09 PM

#

white mulch I am pretty sure that my theory is correct in that as its non-zero at that point...

@flint idol add printf to see which path it takes here

flint idol Nov 2, 2024, 8:09 PM

#

sure

flint idol Nov 2, 2024, 8:13 PM

#

real pecan <@841762704766140486> add printf to see which path it takes here

it used the first path

real pecan Nov 2, 2024, 8:13 PM

#

jesus christ

#

RetardoBIOS

flint idol Nov 2, 2024, 8:13 PM

#

theoretically the fix should just to reset mmconfig?

flint idol Nov 2, 2024, 8:13 PM

#

real pecan RetardoBIOS

fr

real pecan Nov 2, 2024, 8:13 PM

#

yeah reset mmconfig on reset

#

or rather

#

on suspend

flint idol Nov 2, 2024, 8:13 PM

#

or rather

#

on wake from suspend

#

since the bios doesn't really know that we're suspending

real pecan Nov 2, 2024, 8:13 PM

#

doesnt matter

flint idol Nov 2, 2024, 8:13 PM

#

only the aml code

real pecan Nov 2, 2024, 8:13 PM

#

wdym it doesnt know

flint idol Nov 2, 2024, 8:13 PM

#

well

#

how would the bios c code know

#

if it's in C

#

and we use AML to suspend

real pecan Nov 2, 2024, 8:14 PM

#

we use a write to an IO port

#

but yeah you're probably right, only qemu knows

flint idol Nov 2, 2024, 8:14 PM

#

at the beginning of pci_reset

#

I will set mmconfig to zero

#

send qwinci the bios image

real pecan Nov 2, 2024, 8:15 PM

#

u mean resume?

#

thats too early still

#

*too late

flint idol Nov 2, 2024, 8:15 PM

#

and see if it works for him

real pecan Nov 2, 2024, 8:15 PM

#

https://github.com/coreboot/seabios/blob/62a1429ec1ec67f14c039d97627a6a7ef70a983c/src/resume.c#L99

GitHub

seabios/src/resume.c at 62a1429ec1ec67f14c039d97627a6a7ef70a983c · ...

mirror of seabios. Contribute to coreboot/seabios development by creating an account on GitHub.

#

u should probably reset it here

flint idol Nov 2, 2024, 8:16 PM

#

mkay

real pecan Nov 2, 2024, 8:16 PM

#

fun fact

#

seabios knows its a resume from s3 by reading CMOS

flint idol Nov 2, 2024, 8:17 PM

#

cool

#

@white mulch

📎 bios.bin

#

try using this bios image

#

-bios /path/to/bios.bin

white mulch Nov 2, 2024, 8:26 PM

#

doesn't seem to fix the issue unfortunately

flint idol Nov 2, 2024, 8:26 PM

#

what else could it be thinkong

#

if you want seabios logs

#

add this

#

-chardev file,path=/dev/stdout,id=seabios -device isa-debugcon,iobase=0x402,chardev=seabios```

white mulch Nov 2, 2024, 8:33 PM

#

looks like the write to mmconfig doesn't persist for some reason

flint idol Nov 2, 2024, 8:34 PM

#

how?

white mulch Nov 2, 2024, 8:34 PM

#

idk

#

but printing it inside writel reveals that its non-zero again at the point where it writes the base

flint idol Nov 2, 2024, 8:34 PM

#

doing that somehow fixed my shutdown probably on seabios

flint idol Nov 2, 2024, 8:35 PM

#

white mulch but printing it inside writel reveals that its non-zero again at the point where...

ur qemu is haunted

real pecan Nov 2, 2024, 8:36 PM

#

white mulch but printing it inside writel reveals that its non-zero again at the point where...

printing what

white mulch Nov 2, 2024, 8:36 PM

#

mmconfig

real pecan Nov 2, 2024, 8:37 PM

#

like oberrow reset it incorrectly or something?

flint idol Nov 2, 2024, 8:37 PM

#

I set it to zero

#

using legacy i/o
using legacy i/o
using legacy i/o
mmconfig=0x00000000
using legacy i/o
using legacy i/o
using legacy i/o```

#

and when I print it somewhere

#

it's zero

white mulch Nov 2, 2024, 8:37 PM

#

does it work properly for you?

flint idol Nov 2, 2024, 8:37 PM

#

well I don't use PCIe

#

so I wouldn't know

#

but what I do know is that

#

shutdown now works after wake-from-suspend on seabios

flint idol Nov 2, 2024, 8:40 PM

#

flint idol ``` -chardev file,path=/dev/stdout,id=seabios -device isa-debugcon,iobase=0x402,...

can you add this to qemu?

white mulch Nov 2, 2024, 8:41 PM

#

it prints ```
using mmconfig
using mmconfig
using mmconfig
mmconfig=0xb0000000
using mmconfig
using mmconfig
using mmconfig
PCIe: using q35 mmconfig at 0xb0000000

flint idol Nov 2, 2024, 8:41 PM

#

wtf

#

for me it prints

#

using legacy i/o
using legacy i/o
using legacy i/o
mmconfig=0x00000000
using legacy i/o
using legacy i/o
using legacy i/o
PCIe: using q35 mmconfig at 0xb0000000```

#

maybe I sent you the wrong image

#

📎 bios.bin

white mulch Nov 2, 2024, 8:43 PM

#

still same thing nooo

flint idol Nov 2, 2024, 8:43 PM

#

wut

flint idol Nov 2, 2024, 8:44 PM

#

white mulch still same thing <:nooo:893467357148753920>

I added a log

#

📎 bios.bin

#

before it resets mmconfig

white mulch Nov 2, 2024, 8:44 PM

#

In 32bit resume
table(50434146)=0x7ffe20f4 (via rsdt)
resetting mmconfig
Found 1 cpu(s) max supported 1 cpu(s)
using mmconfig
using mmconfig
using mmconfig
mmconfig=0xb0000000
using mmconfig
using mmconfig
using mmconfig
PCIe: using q35 mmconfig at 0xb0000000

flint idol Nov 2, 2024, 8:44 PM

#

wut

#

it sets mmconfig to zero

white mulch Nov 2, 2024, 8:45 PM

#

yeah idk anymore

flint idol Nov 2, 2024, 8:45 PM

#

your qemu is cursed

#

what else do you pass to qemu?

white mulch Nov 2, 2024, 8:46 PM

#

qemu-system-x86_64 -boot d -cdrom /home/visa/Projects/crescent/cmake-build-debug-clang/image.iso -m 2G -M q35 -smp 1 -cpu qemu64,+umip,+smep,+smap -serial stdio -chardev file,path=/dev/stdout,id=seabios -device isa-debugcon,iobase=0x402,chardev=seabios -bios /home/visa/Downloads/bios.bin

real pecan Nov 2, 2024, 8:46 PM

#

maybe print it right after reset?

white mulch Nov 2, 2024, 8:46 PM

#

and qemu version is 9.1.0

flint idol Nov 2, 2024, 8:47 PM

#

real pecan maybe print it right after reset?

how would mmconfig = 0

#

fail

real pecan Nov 2, 2024, 8:47 PM

#

https://github.com/coreboot/seabios/blob/master/src/fw/shadow.c#L151

GitHub

seabios/src/fw/shadow.c at master · coreboot/seabios

mirror of seabios. Contribute to coreboot/seabios development by creating an account on GitHub.

flint idol Nov 2, 2024, 8:47 PM

#

real pecan Nov 2, 2024, 8:47 PM

#

probably has something to do with this

#

the bios is readonly at this point maybe

flint idol Nov 2, 2024, 8:47 PM

#

nope

#

make_bios_readonly is called

#

right before jumping to the wake vector

#

in FACS

real pecan Nov 2, 2024, 8:48 PM

#

yeah but

#

make_bios_writable

#

try calling that

flint idol Nov 2, 2024, 8:49 PM

#

I will once we confirm it's not just something else setting mmconfig

#

@white mulch

white mulch Nov 2, 2024, 8:50 PM

#

there is only one place where its written and its static to pci.c file (in the unmodified seabios)

#

and when it writes to it it prints the "using q35 mmconfig at"

flint idol Nov 2, 2024, 8:50 PM

#

can you try that image tho

real pecan Nov 2, 2024, 8:50 PM

#

oberrow do u have SMM disabled?

flint idol Nov 2, 2024, 8:51 PM

#

nope

white mulch Nov 2, 2024, 8:51 PM

#

flint idol can you try that image tho

what image?

flint idol Nov 2, 2024, 8:51 PM

#

📎 bios.bin

real pecan Nov 2, 2024, 8:51 PM

#

qwinci also doesnt have kvm

#

anyways looks like oberrows qemu doesnt enforce readonly bios

flint idol Nov 2, 2024, 8:51 PM

#

each time I use tcg I'm reminded of why I don't use tcg

white mulch Nov 2, 2024, 8:52 PM

#

table(50434146)=0x7ffe20f4 (via rsdt)
resetting mmconfig
mmconfig: 0x0
Found 1 cpu(s) max supported 1 cpu(s)
using mmconfig
using mmconfig
using mmconfig
mmconfig=0xb0000000
using mmconfig
using mmconfig
using mmconfig
PCIe: using q35 mmconfig at 0xb0000000

flint idol Nov 2, 2024, 8:52 PM

#

wth

real pecan Nov 2, 2024, 8:52 PM

#

lmao

flint idol Nov 2, 2024, 8:52 PM

#

for me, on tcg+no smm

#

it triple faults

#

in the bios

#

or rather

#

triple faults somewhere

#

I was just able to reproduce what qwinci had

#

but it makes no sense

#

how does being on tcg

#

correlate to mmconfig not being set to zero at some random point

white mulch Nov 2, 2024, 8:56 PM

#

maybe doing the make_bios_writable() like infy suggested before writing would fix it?

flint idol Nov 2, 2024, 8:56 PM

#

white mulch ``` table(50434146)=0x7ffe20f4 (via rsdt) resetting mmconfig mmconfig: 0x0 Found...

well it does say mmconfig is zero

white mulch Nov 2, 2024, 8:57 PM

#

what if the compiler optimized the load out or smth

real pecan Nov 2, 2024, 8:57 PM

#

^

flint idol Nov 2, 2024, 8:57 PM

#

or maybe cpu cache

real pecan Nov 2, 2024, 8:57 PM

#

its not a volatile variable

real pecan Nov 2, 2024, 8:57 PM

#

flint idol or maybe cpu cache

yup

flint idol Nov 2, 2024, 8:59 PM

#

I fucking hate tcg

flint idol Nov 2, 2024, 8:59 PM

#

white mulch what if the compiler optimized the load out or smth

it did this

#

@white mulch try this

📎 bios.bin

white mulch Nov 2, 2024, 9:03 PM

#

that works

real pecan Nov 2, 2024, 9:04 PM

#

yay i was right

#

we really need to submit the fix to SeaBIOS

flint idol Nov 2, 2024, 9:06 PM

#

yes

white mulch Nov 2, 2024, 9:06 PM

#

yeah would be nice

real pecan Nov 2, 2024, 9:06 PM

#

who's gonna do it?

flint idol Nov 2, 2024, 9:06 PM

#

I will

#

since I have the code

real pecan Nov 2, 2024, 9:06 PM

#

beware its a mailing list

#

but other than that its nice

flint idol Nov 2, 2024, 9:06 PM

#

scary

real pecan Nov 2, 2024, 9:06 PM

#

ive submitted a few fixes

flint idol Nov 2, 2024, 9:07 PM

#

I'll remove my dprintfs

#

make a patch

#

should I sign off my commit

flint idol Nov 2, 2024, 9:12 PM

#

real pecan ive submitted a few fixes

real pecan Nov 2, 2024, 9:12 PM

#

it was at least 2

flint idol Nov 2, 2024, 9:12 PM

#

which also happened to be a PCI fix

real pecan Nov 2, 2024, 9:13 PM

#

github is tripping

#

or maybe i am

flint idol Nov 2, 2024, 9:14 PM

#

real pecan or maybe i am

you are

#

git log only found you once

real pecan Nov 2, 2024, 9:14 PM

#

idk

flint idol Nov 2, 2024, 9:17 PM

#

anything I'm missing

#

#

?

#

@real pecan

#

I think I explained what I did well enough

#

also when uLife

real pecan Nov 2, 2024, 9:26 PM

#

flint idol

On wake it would attempt use the ECAM space to restore access to ECAM, which wouldn't work because ECAM is disabled after reset.

Maybe something like that?

flint idol Nov 2, 2024, 9:26 PM

#

that's better

#

(tbh I had no idea what I was doing in the first place)

#

((so I just tried saying what I think I did))

#

after subscribing to the seabios mailing list

#

I apparently need to send an email to [email protected]

#

to post on it

real pecan Nov 2, 2024, 9:35 PM

#

good debugging today

#

and congrats on seabios contribution too

#

team work

flint idol Nov 2, 2024, 9:35 PM

#

ye

#

this is my first time using a mailing list

#

do I just throw the patch file in there

#

or do I copy paste it into the body??

#

From 36720e74aac6822454262d019d3b2ba3f94248fa Mon Sep 17 00:00:00 2001
From: Omar Berrow [email protected]
Date: Sat, 2 Nov 2024 17:14:47 -0400
Subject: [PATCH] resume: reset mmconfig to zero

On wake it would attempt use the ECAM space to restore access to ECAM, which wouldn't work because ECAM is disabled after reset.

Signed-off-by: Omar Berrow [email protected]

src/hw/pci.c | 2 +-
src/resume.c | 9 +++++++++
2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/hw/pci.c b/src/hw/pci.c
index 8eda84b2..dfe4d92a 100644
--- a/src/hw/pci.c
+++ b/src/hw/pci.c
@@ -14,7 +14,7 @@
#define PORT_PCI_CMD 0x0cf8
#define PORT_PCI_DATA 0x0cfc

-static u32 mmconfig;
+volatile u32 mmconfig;

static void *mmconfig_addr(u16 bdf, u32 addr)
{
diff --git a/src/resume.c b/src/resume.c
index fb0b8a89..10b873c3 100644
--- a/src/resume.c
+++ b/src/resume.c
@@ -96,6 +96,15 @@ s3_resume(void)
return;
}

make_bios_writable();
// reset mmconfig to make sure that we don't use PCIe to
// resume PCIe
dprintf(1, "resetting mmconfig\n");
extern volatile u32 mmconfig;
mmconfig = 0;
dprintf(1, "mmconfig: 0x%x\n", mmconfig);
+// make_bios_readonly();
pic_setup();
smm_setup();
smp_resume();
--
2.45.2

#

wait

#

it has my subject

#

but then

real pecan Nov 2, 2024, 9:37 PM

#

flint idol do I just throw the patch file in there

no

#

git format-patch -1
git send-email 0001-<patch-name>.patch --to <[email protected]> --cc whatever

flint idol Nov 2, 2024, 9:38 PM

#

do I need the cc

#

probs not right

real pecan Nov 2, 2024, 9:38 PM

#

i dont remmeber what the seabios mailing list wants

#

usually there are maintainers u cc

flint idol Nov 2, 2024, 9:39 PM

#

real pecan ``` git format-patch -1 git send-email 0001-<patch-name>.patch --to <wahtever@wa...

git: 'send-email' is not a git command. See 'git --help'.

real pecan Nov 2, 2024, 9:40 PM

#

apt install git-send-email

flint idol Nov 2, 2024, 9:45 PM

#

ok I sent it using git send-email

#

but I don't see it on the mailing list

real pecan Nov 2, 2024, 9:48 PM

#

it refreshes every x minutes

flint idol Nov 2, 2024, 9:48 PM

#

okie

#

@real pecan it seems like someone already submitted a patch for that

#

https://mail.coreboot.org/hyperkitty/list/[email protected]/message/LN3YO2MG46WJA6YQYT5FBTKIFFZEKNSF/

#

two years ago

#

https://mail.coreboot.org/hyperkitty/list/[email protected]/thread/KGWLHJCIKTCTL3N2BW7VLLKVZU7TBTSW/#LN3YO2MG46WJA6YQYT5FBTKIFFZEKNSF

#

hold on

#

that's the full thread

real pecan Nov 2, 2024, 9:55 PM

#

well looks like it was abandoned so

white mulch Nov 2, 2024, 9:56 PM

#

now I guess the only kinda important remaining problem is getting the framebuffer to work

flint idol Nov 2, 2024, 9:56 PM

#

white mulch now I guess the only kinda important remaining problem is getting the framebuffe...

have you reset the BARs

white mulch Nov 2, 2024, 9:56 PM

#

as at least on my kernel it doesn't work after _WAK + restoring the bars

#

yeah

flint idol Nov 2, 2024, 9:57 PM

#

I'm going to implement that like

#

now

#

so I'll see what happens for me

white mulch Nov 2, 2024, 9:57 PM

#

could also be some kind of skill issue on my part, would be nice to see what you get yeah

real pecan Nov 2, 2024, 10:00 PM

#

white mulch could also be some kind of skill issue on my part, would be nice to see what you...

what does info pci say

#

could also be mtrr skill issue like i mentioned

white mulch Nov 2, 2024, 10:02 PM

#

looks like the bars are still shown as F's in there, yeah ig I can try to save/restore the mtrrs

flint idol Nov 2, 2024, 10:06 PM

#

wait

#

when I boot up the other CPUs

#

what are the MTTRs set to

#

thonk

real pecan Nov 2, 2024, 10:07 PM

#

depends

#

probably same value if your bios is good

#

but yeah all cpus must have the same mtrrs otherwise its ub

#

its your job to configure them

flint idol Nov 2, 2024, 10:11 PM

#

okay

real pecan Nov 2, 2024, 10:11 PM

#

u can just save whatever bsp has initialy

flint idol Nov 2, 2024, 10:11 PM

#

ye

#

that's what I was gonna do

white mulch Nov 2, 2024, 10:22 PM

#

didn't change anything regarding info pci or the fb

#

info pci also shows the same thing when not using ecam

real pecan Nov 2, 2024, 10:23 PM

#

wdym by not using ecam

white mulch Nov 2, 2024, 10:24 PM

#

as in writing the bars using port io (or using the default qemu machine)

real pecan Nov 2, 2024, 10:24 PM

#

not using ecam works, or the other way around?

white mulch Nov 2, 2024, 10:24 PM

#

neither of them changes what info pci shows

#

the bars do read as the same value that I write to them on both of them

real pecan Nov 2, 2024, 10:31 PM

#

do u write like the type info and stuff?

white mulch Nov 2, 2024, 10:32 PM

#

yes, though I probably shouldn't

#

I'd think that it wouldn't really matter tho as its the same value that was there before

#

also trace shows no pci update mappings stuff, it only shows pci_cfg_write

real pecan Nov 2, 2024, 10:36 PM

#

white mulch yes, though I probably shouldn't

i dont think u should

flint idol Nov 2, 2024, 10:36 PM

#

MTRRs are dumb

white mulch Nov 2, 2024, 10:37 PM

#

looks like it added the mappings after I enabled the mem + io spaces in the pci command

#

still no fb tho 💀

real pecan Nov 2, 2024, 10:38 PM

#

white mulch looks like it added the mappings after I enabled the mem + io spaces in the pci ...

ohhh

real pecan Nov 2, 2024, 10:38 PM

#

white mulch still no fb tho 💀

try writing 1 to the enable bit of bochsfb?

white mulch Nov 2, 2024, 10:38 PM

#

oh yeah maybe that stuff works now

real pecan Nov 2, 2024, 10:49 PM

#

white mulch oh yeah maybe that stuff works now

https://elixir.bootlin.com/linux/v6.11.6/source/drivers/gpu/drm/tiny/bochs.c#L620

bochs.c - drivers/gpu/drm/tiny/bochs.c - Linux sourc...

Elixir Cross Referencer - source file of Linux (version v6.11.6). Browsed file: /drivers/gpu/drm/tiny/bochs.c

#

looks like here it just calls into standard DRM resume

#

but it probably results in just calling this https://elixir.bootlin.com/linux/v6.11.6/source/drivers/gpu/drm/tiny/bochs.c#L320

bochs.c - drivers/gpu/drm/tiny/bochs.c - Linux sourc...

Elixir Cross Referencer - source file of Linux (version v6.11.6). Browsed file: /drivers/gpu/drm/tiny/bochs.c

flint idol Nov 2, 2024, 10:55 PM

#

I now restore MTRRs

#

while initializing APs

#

and on S3 wakeup

#

branch is starting to get a bit too big

real pecan Nov 2, 2024, 11:00 PM

#

how did u manage to make 8k changes lol

#

anyway we now know how to reinitialize everything on qemu

#

on real hw it might just work too

flint idol Nov 2, 2024, 11:01 PM

#

real pecan anyway we now know how to reinitialize everything on qemu

by the end of that that would be like another 1k changes

#

and then I wouldn't even be done with that branch yet

#

I still have more syscalls

#

Because apparently, I was doing that before

#

then I'm also going to implement futexes (should be simple, right?)

white mulch Nov 2, 2024, 11:03 PM

#

I figured out the fb problem (kinda), it looks like qemu doesn't refresh the window for some reason KEKW

#

when you resize the window a little then it refreshes

flint idol Nov 2, 2024, 11:03 PM

#

Current roadmap:

~~Design new PCI interface~~
~~Make sure suspend works properly~~
~~Implement futexes~~
~~Implement sync primitive syscalls (Not needed, so nevermind)~~
~~Implement VFS syscalls~~
~~Implement partition syscalls (like partition probing n'stuff)~~
~~Implement driver interface syscalls~~
Implement TTYs
mlibc

flint idol Nov 2, 2024, 11:03 PM

#

white mulch I figured out the fb problem (kinda), it looks like qemu doesn't refresh the win...

lol

real pecan Nov 2, 2024, 11:03 PM

#

white mulch when you resize the window a little then it refreshes

it probably would if u re-enable bochs properly

white mulch Nov 2, 2024, 11:04 PM

#

I did that

real pecan Nov 2, 2024, 11:04 PM

#

did u reconfigure the resolution regs?

white mulch Nov 2, 2024, 11:04 PM

#

yes

real pecan Nov 2, 2024, 11:04 PM

#

like same sequence as linux?

white mulch Nov 2, 2024, 11:04 PM

#

I saved everything on suspend and then restored them

real pecan Nov 2, 2024, 11:04 PM

#

disable, set res, enable

white mulch Nov 2, 2024, 11:04 PM

#

basically yeah though the regs between disable + enable are in a different order

#

it shouldn't matter tho

real pecan Nov 2, 2024, 11:04 PM

#

hm

flint idol Nov 2, 2024, 11:05 PM

#

obos has 31 syscalls rn

white mulch Nov 2, 2024, 11:05 PM

#

white mulch it shouldn't matter tho

ig I can try the exact same order to make sure

real pecan Nov 2, 2024, 11:06 PM

#

do u do blank/unblank stuff too?

flint idol Nov 2, 2024, 11:06 PM

#

flint idol Current roadmap: - ~~Design new PCI interface~~ - ~~Make sure suspend works prop...

and by the end of that

#

I should be using all the handle types obos has

real pecan Nov 2, 2024, 11:07 PM

#

handle types?

flint idol Nov 2, 2024, 11:07 PM

#

typedef enum handle_type
{
    // vfs/fd.h
    HANDLE_TYPE_FD,
    // irq/timer.h
    HANDLE_TYPE_TIMER,
    // vfs/dirent.h
    HANDLE_TYPE_DIRENT,
    // scheduler/thread.h
    HANDLE_TYPE_THREAD,
    // scheduler/process.h
    HANDLE_TYPE_PROCESS,
    // mm/context.h
    HANDLE_TYPE_VMM_CONTEXT,
    // locks/mutex.h
    HANDLE_TYPE_MUTEX,
    // locks/semaphore.h
    HANDLE_TYPE_SEMAPHORE,
    // locks/pushlock.h
    HANDLE_TYPE_PUSHLOCK,
    // locks/event.h
    HANDLE_TYPE_EVENT,
    // driver_interface/driverId.h
    HANDLE_TYPE_DRIVER_ID,
    // scheduler/thread_context_info.h
    HANDLE_TYPE_THREAD_CTX,

    LAST_VALID_HANDLE_TYPE,

    HANDLE_TYPE_ANY = 0xfd,
    HANDLE_TYPE_CURRENT = 0xfe,
    HANDLE_TYPE_INVALID = 0xff,
} handle_type;```

#

basically what a handle actually is

real pecan Nov 2, 2024, 11:07 PM

#

whats is the purpose of this

flint idol Nov 2, 2024, 11:07 PM

#

verification stuff

real pecan Nov 2, 2024, 11:08 PM

#

hm

flint idol Nov 2, 2024, 11:08 PM

#

like

// vmm syscall
if (handle_type(vmm_ctx) != HANDLE_TYPE_VMM_CONTEXT)
    return OBOS_STATUS_INVALID_ARGUMENT```

real pecan Nov 2, 2024, 11:09 PM

#

like if it gets corrupted or something?

flint idol Nov 2, 2024, 11:09 PM

#

yeah\

#

or if a user program tries to do fnuy stuff with handles (e.g., passes in a dirent handle to a futex function)

#

the handle type can also indicate whether the user wants to use the current object (if such thing exists)

#

like if it wanted to it can pass a special HANDLE_CURRENT value, which simply has a handle with the type HANDLE_TYPE_CURRENT (that needn't be created)

#

to Sys_ThreadBlock for example

#

so it blocks the current thread

#

https://github.com/OBOS-dev/obos/blob/userspace-work/src/oboskrnl/scheduler/sched_sys.c#L208

#

https://github.com/OBOS-dev/obos/blob/userspace-work/src/oboskrnl/scheduler/sched_sys.c#L179

real pecan Nov 2, 2024, 11:12 PM

#

really OBOS_ASSERT(thr);

#

just return error?

flint idol Nov 2, 2024, 11:12 PM

#

thr can never be nullptr

white mulch Nov 2, 2024, 11:12 PM

#

real pecan do u do blank/unblank stuff too?

that was it, I had to add the blank at the start before doing the bochs stuff and then unblank after

real pecan Nov 2, 2024, 11:12 PM

#

oh i thought it was a syscall

flint idol Nov 2, 2024, 11:12 PM

#

if the user passed an invalid handle

real pecan Nov 2, 2024, 11:12 PM

#

white mulch that was it, I had to add the blank at the start before doing the bochs stuff an...

nice

flint idol Nov 2, 2024, 11:12 PM

#

it would return OBOS_STATUS_INVALID_ARGUMENT

#

see
https://github.com/OBOS-dev/obos/blob/userspace-work/src/oboskrnl/scheduler/sched_sys.c#L179

GitHub

obos/src/oboskrnl/scheduler/sched_sys.c at userspace-work · OBOS-de...

I was bored... Contribute to OBOS-dev/obos development by creating an account on GitHub.

flint idol Nov 2, 2024, 11:13 PM

#

flint idol it would return `OBOS_STATUS_INVALID_ARGUMENT`

or NOT_FOUND

#

idr

#

it's OBOS_STATUS_INVALID_ARGUMENT

#

obos hit 36k loc recently

real pecan Nov 2, 2024, 11:44 PM

#

nice

vale nymph Nov 2, 2024, 11:49 PM

#

over 10k more than astral

flint idol Nov 2, 2024, 11:50 PM

#

just figured out that git send-email it not actually sending emails

#

so I tried using the gmail smtp server

5.7.8 Username and Password not accepted. For more information, go to```

#

for that

#

(my username and password are both right)

flint idol Nov 3, 2024, 12:22 AM

#

FUCK

#

I accidentally just sent a patch to seabios

#

that has no commit message

real pecan Nov 3, 2024, 12:26 AM

#

Lol

#

I got it

flint idol Nov 3, 2024, 12:26 AM

#

gmail is fucking stupid

#

idk why it won't just

#

let me use git send-email

#

like my brother

#

I put the correct password

#

and you say incorrect password

real pecan Nov 3, 2024, 12:27 AM

#

Well u need to configure it idk

#

Works for me

flint idol Nov 3, 2024, 12:27 AM

#

whatever

#

I'm just gonna use outlook or smth

real pecan Nov 3, 2024, 12:27 AM

#

flint idol and you say incorrect password

I had that happen

flint idol Nov 3, 2024, 12:27 AM

#

or never touch mailing lists again

real pecan Nov 3, 2024, 12:27 AM

#

U need to reboot the pc

#

It just stops working after N wrong attempts

thick jolt Nov 3, 2024, 6:11 AM

#

flint idol see https://github.com/OBOS-dev/obos/blob/userspace-work/src/oboskrnl/scheduler/...

my logo omg!!!

devout niche Nov 3, 2024, 6:19 AM

#

flint idol or never touch mailing lists again

they are a pain in the neck

#

no one is using PINE to handle their (ascii, 80-char-wide) emails anymore so getting the right thing done is harder

flint idol Nov 3, 2024, 11:03 AM

#

@white mulch so did writing to the BARs end up working with the patched seabios?

real pecan Nov 3, 2024, 11:07 AM

#

yes

#

after enabling memory and io access he was able to get the fb to work

#

well and re-initializing the bochs fb

flint idol Nov 3, 2024, 11:07 AM

#

oh ok

#

I'm going to do something and respond to the reply I got on the seabios mailing list

real pecan Nov 3, 2024, 11:08 AM

#

yeah i saw it

flint idol Nov 3, 2024, 11:49 AM

#

idk why, but compiling in release speeds my kernel up by like 2x

#

compared to no optimizations

#OBOS (not vibecoded)

Signed-off-by: Omar Berrow [email protected]