I just wanted to share this since I found the layout quite satisfying for the 4-byte memory level 🙂
#Nice Little 4 Byte Memory
rancid coyote
split fossil
It's surprising how many people have a problem to fit it, and you have a lot of space left, even with extra elements 😉
pearl nebula
Please remeber to mark level solutions as spoilers
rancid coyote
It's surprising how many people have a problem to fit it, and you have a lot of ...
Oooh now I need to figure out how to minimise it further 🙂
rancid coyote
@split fossil I've managed to shrink it a bit by ||using an adder to take care of some of the logic|| however, I can't help thinking that ||I don't need 8 switches||
split fossil
Yep, the ||switches|| are a good direction.
pallid python
<@447804761861914625> I've managed to shrink it a bit by ||using an adder to tak...
A good tip for optimizations is to think about if you’re providing functionality with gates that is built in by a different gate. 🤔 You May Not Need That. (You’re on a good lead.)
rancid coyote
A good tip for optimizations is to think about if you’re providing functionality...
Oh!!! Thank you 😊I think I may be able to use the ||1-bit decoder to select load/save, and possibly simplify the address selection logic|| I’ll see what I can do once I get home this evening 🙂
frozen root
Oh!!! Thank you 😊I think I may be able to use the ||1-bit decoder to select loa...
the general way to optimize that is to start at the outputs and work backwards to look where you get the data from
also worth remembering that when reading Z you get 
so there's no way to interpret Z as data
rancid coyote
I think I've managed to get it close to optimal - 12 placed components and a fair amount of empty space 🙂
pallid python
There is a more efficient 2-bit decoder that doesn’t need an adder.
frozen root
But uses the same amount of components
first of all, reconsider the way to detect and 
rancid coyote
first of all, reconsider the way to detect <:OFF:893938371737583638><:OFF:893938...
The most obvious solution for the 2 bit decoder I can think of uses 4 and gates and 2 not gates. AND and NOR seem like the most straightforward way to detect 11 and 00. The tricky part is 10 and 01
frozen root
The most obvious solution for the 2 bit decoder I can think of uses 4 and gates ...
Well, I mean, these are the right components for 11 and 00, but you can ||hook them up directly to inputs|| without any downsides
pallid python
But uses the same amount of components
Indeed, same number of components, but less gates. 
frozen root
and so, because the minimal is 4 gates, the other 2 should somehow depend on these 2 because no gate would give us the correct output on its own
rancid coyote
I'm completely lost here 😂
pallid python
Think about how sometimes a more complex expression (and double use of values) can simplify to a more simple expression, like ((a or b) or a) = a or b.
rancid coyote
Okay I think I'm getting somewhere, I'm working on a K-Map with 4 inputs (Load, Save, Address 1, Address 2) and 8 outputs (Memory 1 Read, Memory 1 Write, ... Memory 4 Write). I'm already seeing a lot of re-use in the boolean expressions being generated from it.
pallid python
This part can be done in four components. (And basic gates at that.) || But as mentioned, it’s builds simple expressions from more complex two-use-value expressions. ||
bold pendant
This is ||the same circuit in Instruction decoder, you may find it easier to focus on just this in that level||.
rancid coyote
I guess I've been || focusing on selecting the memory on the "input" side of things, but I could also focus on selecting the correct "output", or a combination of the two||
rancid coyote
This part can be done in four components. (And basic gates at that.) || But as m...
I don't know why I'm struggling with this so much. I can't see any possible way of doing this with four simple gates? (Assuming by gate you mean: AND/OR/NOT/NOR/XOR/XNOR, and not decoders, adders etc.)
Memory 1/2/3/4 = Q1/2/3/4
Address 1/2 = I1/2
Q1 = ~I1 AND ~I2 = ~(I1 OR I2) = ~(~I1 NAND ~I2) = I1 NOR I2
Q2 = ~I1 AND I2 = ~(I1 OR ~I2) = ~(~I1 NAND I2) = I1 NOR ~I2
Q3 = I1 AND ~I2 = ~(~I1 OR I2) = ~(I1 NAND ~I2) = ~I1 NOR I2
Q4 = I1 AND I2 = ~(~I1 OR ~I2) = ~(I1 NAND I2) = ~I1 NOR ~I2
I don't see any common terms that can be reused?
pearl nebula
You already know 2 of the 4 gates
solve the other two outputs you need using 1 gate each, only taking as input the original 2 inputs and the 2 gates you already know (No NOT)
rancid coyote
Ah okay - let me substitute that in. Thank you very much for your help by the way 🙂
I1 I2 Q1 Q4 | Q2 Q3
------------+------
0 0 0 0 | X X
0 0 0 1 | X X
0 0 1 0 | 0 0
0 0 1 1 | X X
0 1 0 0 | 1 0
0 1 0 1 | X X
0 1 1 0 | X X
0 1 1 1 | X X
1 0 0 0 | 0 1
1 0 0 1 | X X
1 0 1 0 | X X
1 0 1 1 | X X
1 1 0 0 | X X
1 1 0 1 | 0 0
1 1 1 0 | X X
1 1 1 1 | X X
Why the X's? Q2 and Q3 need to be defined for all possible inputs. Nevermind I think I get it.
rancid coyote
By definition, Q1 = ~I1 AND ~I2, so the first row isn't possible since I1, I2 and Q1 are all 0
bold pendant
Yeah, I was a bit slow there 🙂
rancid coyote
||```
Q2
I1I2\Q1Q4 00 01 11 10
00 X X X 0
01 1 X X X
11 X 0 X X
10 0 X X X
Q2 = ~I1 AND I2 = ~I1 AND ~Q1 = ~(I1 OR Q1) = I1 NOR Q1
Q3
I1I2\Q1Q4 00 01 11 10
00 X X X 0
01 0 X X X
11 X 0 X X
10 1 X X X
Q3 = I1 AND ~I2 = ~I2 AND ~Q1 = ~(I2 OR Q1) = I2 NOR Q1
Ahhh I think I see!
Let me add spoiler tags to this one
Ahh I got it! Thank you! Thank you! Thank you! 🙂
So this is interesting - it's not something the K-Map technique would pick up on
Are there more sophisticated techniques that can make use of these intermediate results?
I think I've got it now 🙂
This uses: || 4 logic gates, 4 switches, 4 memory modules||
unique otter