Atari Jaguar

[rotund portal]

Working on 3DO, DC, and PCB projects has wiped my mind.

[uncut atlas]

I thought it literally cant drive the bus if bgack is low

[rotund portal]

Recompiling, but with oRESET, xresetil etc. added.

Oh, I'll add BREQ as well.

And RNW

Gonna eat - I have a Succulent Chinese Meal waiting in the fridge.

[glad flame]

So with the Jaguar core, is there a certain file type I should be using with the bios and games? Like should I use .rom or .j64?

[serene widget]

That's an interesting question. It has various file formats like .j64, .jag, .bin, .rom, .abs, .cof, .prg, and whatever format the CD partition uses.

[uncut atlas]

The first three are just raw dumps

[still aurora]

chd for cd just like bigPemu

[uncut atlas]

That's what you should be using for bios

[still aurora]

and I would say whatever no Intro sets use for the Jag is best

[glad flame]

Also should the games folder be "Jaguar" or "AtariJaguar"?

[still aurora]

No Intro seems to be .j64

[sterile moss]

'Jaguar'

[glad flame]

So after a while of testing, I figured out what my problem was.

The Morph 4K I was using couldn't recognize the Atari Jaguar core using the DV1 mode, so I had to use the internal scaler on the MiSTer in order to get any picture.

Maybe I'll play around with the settings just to double check it's nothing on my end.

[still aurora]

Always step 1 is to remove evything from the display Chain so its pure HDMI out to a HDMI in on the TV with nothing inbetween

[glad flame]

I'm not using any switchers or strippers.

[still aurora]

but you were using a tink

sorry morph

[uncut atlas]

To be clear analog and consequently direct video are but supported by this core due to dual ram

[mental briar]

Is that why Sonic’s build is the least compatible one we’ve tried? Having dv enabled gums up the works?

[rotund portal]

AVP crash isn't very deterministic.

Usually by now (black screen), there would be almost no activity on SignalTap.

But this time, it looks like it continues running some code.

So I'd say it's just marginal timings causing the crash.

[tall gazelle]

I'm wondering if using the hdmi out to converter for my CRT Scart would affect anything ? Although sonics build does work.

[rotund portal]

And I have no idea how to go about using TimeQuest to help with that. lol

Some recommendations from TimeQuest.

Issue: Long Combinational Path

From: emu:emu|jaguar:jaguar_inst|_tom:tom_inst|_graphics:gpu_inst|_blit:blit_inst|_state:state_inst|_acontrol:acontrol_inst|srcshift_obuf[4]~DUPLICATE

To: emu:emu|jaguar:jaguar_inst|_tom:tom_inst|_dbus:dbus_inst|d5_obuf[51]

Recommendations...

Move 2 combinational nodes before the source and 0 after the destination for the path from emu:emu|jaguar:ja...buf[4]~DUPLICATE to emu:emu|jaguar:ja...inst|d5_obuf[51]

Clear as mud.

"Something, something, something, do the thing."

Maybe a barrel shifter thingy, for the blitter? No idea what I'm looking at with this core. lol

[glad flame]

Ah yes the classic "poke it with a stick and see what happens" approach.

[rotund portal]

Exactly.

Timing constraints stuff is hard.

[stoic jewel]

Is it possible to save progress in the game using the core?

[mental briar]

No 😦

[mental briar]

I don’t know enough about the analog side of direct video to help. I use it with my tink4k. But yeah, Sonic’s build seems to do direct video

[rotund portal]

I did the thing I said I wasn't going to do - trying some of the recommended things the Timing Optimizer suggested.

Because after the Chinese Meal, I'm slipping into a food coma anyway, so might as well leave it compiling.

Wow, it actually worked.

That was just by setting the various options the Timing Optization thingy suggested.

It added almost two minutes to the compile time, so it took 17 minutes, 21 seconds.

(but this is also with SignalTap enabled atm, so it will take a bit longer anyway.)

Not much point me posting the RBF right now, as no other fixes were done, vs Kitrinx' last version that could run AVP.

And this supposedly doesn't have Direct Video working yet either.

[glad flame]

Yeah take your time.

Glad this is being looked at. I want to enjoy some Jaguar Jank™️.

[rotund portal]

I do enjoy the Jank. Same as when Srg320 released his 32x core. 😛

I still had some fun playing some of the 32x games, believe it or not.

Just not Motocross, obviously. Nobody needs that in their life.

https://tenor.com/view/shrug-gif-25269231

[ashen spoke]

I love the 32X core and I will love the Jaguar core!

[rotund portal]

"Something, something, Jaguar, something, big_pixt"

// GPU_MEM.NET (380) - bigwr : an7
assign bigwr = gpu_addr[6:2]==5'b000_11 & gpuireg & gpu_memw;

[uncut atlas]

I'm not sure what they did

[rotund portal]

Signal goes from the gpu_mem block, to the blitter...

Then to both the "state" and "data" modules.

In the data module, it goes to both the srcshift and data_mux modules.

// DATA.NET (108) - src_shift : srcshift
_srcshift src_shift_inst
(
    .srcd_0 /* OUT */ (srcdlo[31:0]),
    .srcd_1 /* OUT */ (srcdhi[31:0]),
    .big_pix /* IN */ (big_pix),
    .srcd1lo /* IN */ (srcd1_0[31:0]),
    .srcd1hi /* IN */ (srcd1_1[31:0]),
    .srcd2lo /* IN */ (srcd2_0[31:0]),
    .srcd2hi /* IN */ (srcd2_1[31:0]),
    .srcshift /* IN */ (srcshift[5:0])
);

I think basically a ton of combo logic in there, where it swaps the data around on the bus.

[mental briar]

makes two of us. magic!

[rotund portal]

assign shift[6:0] = (big_pix) ? besh[6:0] : {1'b0,srcshift[5:0]};//0 and 3 are identical for big_pix

    case({big_pix,srcshift[5:3]})
        4'b0000        : oneb[127:64] = shsrc[127:64]; // 0
        4'b0001        : oneb[127:64] = shsrc[119:56]; // 1
        4'b0010        : oneb[127:64] = shsrc[111:48]; // 2
        4'b0011        : oneb[127:64] = shsrc[103:40]; // 3
        4'b0100        : oneb[127:64] = shsrc[95:32]; // 4
        4'b0101        : oneb[127:64] = shsrc[87:24]; // 5
        4'b0110        : oneb[127:64] = shsrc[79:16]; // 6
        4'b0111        : oneb[127:64] = shsrc[71:8]; // 7
        4'b1000        : oneb[127:64] = shsrc[127:64]; // 0 
        4'b1001        : oneb[127:64] = {shsrc[7:0],shsrc[127:72]}; // F
        4'b1010        : oneb[127:64] = {shsrc[15:0],shsrc[127:80]}; // E
        4'b1011        : oneb[127:64] = {shsrc[23:0],shsrc[127:88]}; // D
        4'b1100        : oneb[127:64] = {shsrc[31:0],shsrc[127:96]}; // C
        4'b1101        : oneb[127:64] = {shsrc[39:0],shsrc[127:104]}; // B
        4'b1110        : oneb[127:64] = {shsrc[47:0],shsrc[127:112]}; // A
        4'b1111        : oneb[127:64] = {shsrc[55:0],shsrc[127:120]}; // 9
    endcase

Trying not to post too many code snippets at once, but it helps me think.

Gonna try ditching big_pix there, and the lower half of the case statements.

Just to get a feel for how things might change the timings, 'cos I don't really know what I'm doing.

[verbal grail]

Hi Kitrinx. @lucid oak said the fix is simple and easy to merge into the project. Sonic are you able to explain how you got DV working?

[rotund portal]

`ifndef MISTER_DISABLE_YC
    assign {dv_data_osd, dv_hs_osd, dv_vs_osd, dv_cs_osd } = ~yc_en ? {vga_data_osd, vga_hs_osd, vga_vs_osd, vga_cs_osd } : {yc_o, yc_hs, yc_vs, yc_cs };
`else
    assign {dv_data_osd, dv_hs_osd, dv_vs_osd, dv_cs_osd } = {vga_data_osd, vga_hs_osd, vga_vs_osd, vga_cs_osd };
`endif

Most of the signals for DV seem to be hooked up, but I'm not sure about the remaining stuff?

The syncs go from the core -> sync_fix -> scanline gen -> osd -> erm, somewhere.

    cyclonev_clkselect hdmi_clk_sw
    ( 
        .clkselect({1'b1, ~vga_fb & direct_video}),
        .inclk({clk_vid, hdmi_clk_out, 2'b00}),
        .outclk(hdmi_tx_clk)
    );

[uncut atlas]

I think it's a framework thing

[rotund portal]

Then there's a clock switcher, to switch between the HDMI (ASCAL) pixel clock, or from DV.

Yeah, not sure. Never really looked into it.

I had a 50/50 chance of getting the big_pix thing right.

Of course... it's wrong.

So the screen goes black, after the Jag logo.

This obviously isn't the best way to try to debug things. lol

[barren escarp]

I hate to be that guy, but how do I install this core? I got the video fix version .rdf and put it in my '_Unstable' folder. When I boot it up, I just get a black screen & can't access the menu, forcing me to hard reset.

[subtle harbor]

Do you have the bios in the Jaguar games folder?

[sudden palm]

if you have dualsdram , jaguar folder with bios then you should see bios startup

[dusk slate]

Aww snap. My extra ram is out for early delivery today.

[dusk slate]

Make sure that you have a "Jaguar" folder in your "games" folder. And in that folder, put the bios (rename it to "boot.rom").

[mental briar]

Prepare yourself for C Y B E R M O R P H

[dusk slate]

I am not ready! ||Actually I am since I was playing it on the Atari 50th Anniversary collection the other day! ||

[glad flame]

Big day for people that want to be criticized by a floating green head for their poor flying skills.

[dusk slate]

Mooore! Hurt me mooooorre!

[mental briar]

That’s every day if you want it bad enough

All things are possible through hard work

[sudden palm]

https://tenor.com/view/metal-gear-solid-mgs-cyborg-ninja-fatalistic-make-me-feel-alive-again-gif-18137106

[dusk slate]

It arrived! I've officially joined the dual ram elite! I am no longer a single ram peasant!

Already installed it, and booted up the Jaguar core. And it works great! Incredible job on this one already!

[lucid oak]

yeah, no problem

[dusk slate]

Also thanks @fickle folio for the insanely fast shipping/delivery on that ram. Only placed that order like 3 days ago!

[lucid oak]

its just this piece of code

[keen zealot]

Pimp my MiSTer!

https://tenor.com/view/xzibit-its-xzibit-gif-13153028

[fossil lintel]

how does it feel to have a better setup than robby?

[mild karma]

think you forgot to paste/link the code

[lucid oak]

always @(posedge sys_clk)
begin
    if (~old_clk && clk) begin
        vblank <= ((vbbeq & ~vblank) | (~vbeeq & vblank)) & vresl;
        hblank <= ((hbbeq & ~hblank) | (~hbeeq & hblank)) & vresl;
        hs <= ((hseq & ~hs) | (~hpeq & hs));// & vresl;
        vvs <= ((vseq & ~vvs) | (~vpeq & vvs));// & vresl;
        hvs <= ((hvstart & ~hvs) | (~hvse & hvs)) & vresl;
        ves <= ((vebeq & ~ves) | (~veeeq & ves)) & vresl;
        hes <= ((hestart & ~hes) | (~heqe & hes)) & vresl;
    end
end
assign notvblank = ~vblank;
assign nothblank = ~hblank;
assign noths_obuf = ~hs;
assign notvvs = ~vvs;
assign nothvs = ~hvs;
assign notves = ~ves;
assign nothes = ~hes;

// VID.NET (290) - blank : nd2
assign blank = ~(notvblank & nothblank);

// VID.NET (305) - hvstart : an2
assign hvstart = hvsb & vvs;

assign vsync_out = vvs;
assign hsync_out = hs;

// VID.NET (309) - hestart : an2
assign hestart = hvsb & ves;

// VID.NET (311) - vsync : an2
assign vsl = nothvs & nothes;

// VID.NET (312) - csync : mx2
assign csync = hs & vvs;//(ves) ? vsl : noths_obuf;

in vid.v

i commented out vresl in both lines 759 and 760, it was messing up hs and vvs which seem to be vsync and hsync

and changed lines 780 and 781, vsync_out = vvs and hsync_out = hs

i messed with csync too in line 790 but i doesnt seem to do nothing

maybe it can be changed to the code that i commented out, don't know if its important

the other signals, like hvs, ves, hes, i don't really know whats the idea for them, as said, vvs and hs have the correct timing looking at the osciloscope

i also wonder whats the purpose of vresl, its a signal that goes low like every 1.08 seconds 🤔

hope we get new builds with dv enabled soon!

[fickle folio]

Thanks, buddy! Fulfillment time is something I strive to minimize.

[lucid oak]

gonna try to build kitrinx latest commit just for fun with dv, lets see how it goes

[tall gazelle]

i will be testing that.. 😀

[ashen spoke]

@uncut atlas I did this for you! Don’t screw it up!

[mental briar]

Look at those overlays.

[uncut atlas]

That's the chip netlist

We'll have to see if there's errors

[lucid oak]

the last kitrinx commit with dv enabled

[rotund portal]

sigh

All I can say is - this pretty much confirms the issues with some games like AVP (in certain builds) are due to marginal timing issues.

ie. Not an intrinsic "bug" in the logic itself.

The only thing I changed this time, was removing and adding a few more signals in SignalTap.

[tall gazelle]

Works on my consumer TV , scart , AVP doesn't work, sorry I'm not sure what other changes were made.

[rotund portal]

I take it back. My fault. lol

case({/*big_pix,*/srcshift[5:3]})

Forgot to re-enable that big_pix signal.

It looks like it controls the Endianess of how the blitter reads pixels/texels from RAM.

[mental briar]

Try avp

[tall gazelle]

i did, black screen, music plays

[lucid oak]

this happens here too

[tall gazelle]

i tried various roms, but all the same

[mental briar]

Whoever wins, we lose

[uncut atlas]

When I get home I'll take a look

[tall gazelle]

Doom works, on some cores it would load then crash on starting

[tropic rock]

Ignoring individual game compatibility, direct video works with soniccd changes (listed above) on top of Kitrinx's latest code?

I typed ignoring. I didnt want a meme pic....

[tall gazelle]

i would say yes, not thinking of compatibility

[rotund portal]

If anyone wants to try compiling the core, try some of the Settings in the Timing Optimization thingy.

It got AVP running for me.

It will show a caution symbol next to anything it thinks can help with timing.

I realize this isn't really dealing with the root issue of marginal timing (because that's hard), but it might help make each build a bit more stable?

Warning: The above might also make certain games worse. lol

[lucid oak]

lets try

[warm oasis]

I am sure I remember reading awhile back a comment from the dude who did the closed source Jag emulator who said the netlist out there (being used in this core) wasn't of the final chip and there are differences between it and what is in actual hardware. Have you Kitrinx or @tropic rock spoken to that guy about this, or anyone seen him post the details of the differences? Maybe there is a key in there to getting things running perfectly

[uncut atlas]

It is

It seems to be the Motorola design which was later

[tropic rock]

I suppose it is possible that it is some kind of weird version in between the earlier Toshiba chip and the motorolla one that was actually fabbed, but it is definitely later than the first produced in actual Jaguar consoles (not just prototypes)

[warm oasis]

Oh that's is interesting, so the netlist is of a later revision than used in the chip. I assumed it was earlier.

[tropic rock]

There was more than one version of the chips produced

[warm oasis]

May be worth asking that guy about the differences, he seemed to be happy to share info even if he can't open source his emulator

[tropic rock]

Early consumer versions use Toshiba chips. Late consoles use Motorolla chips. The netlists have changes made for the transition to Motorolla

[rotund portal]

Some (possibly) interesting reading for later.

https://atariage.com/Jaguar/faq/index.html?SystemID=JAGUAR

https://forums.atariage.com/topic/179442-early-jag-history/

British style dates, D/M/Y. lol

https://github.com/Torlus/JagNetlists/blob/master/netlists_org/tom/EXECON.NET#L3

[lyric pelican]

18/4/91

[rotund portal]

Torlus uploaded most of this stuff 12 YEARS ago now. 😮

If there was ever a demonstration of how few devs are working on improving cores, and/or how tricky it is to work on this specific core.

This one small comment in the README, is also what first got me interested in using Verilator...

- Frederic was (is) working on an Amiga core, and for this purpose designed 
the J68, a lightweight but full-featured 68000 core written in Verilog.
- He switched from VHDL to Verilog, and convinced me to do so, because of the
largest set of tools available, especially Verilator, which is amazing.

Blitter - November 22, 1990, basic design complete within 2 months

GPU - January 28, 1991, basic design complete within 2 months

Holy crap. 😮

[lucid oak]

didnt work for me

unfortunately

[rotund portal]

Weird. It could well be because I have SignalFarp enabled as well.

So yeah, just marginal timing in parts of the core still, so will take time to figure out.

When a core is like that, sometimes even changing the smallest register or signal can break a lot of stuff.

And I have very little idea of how to actually find the issues, aside from what TimeQuest recommends.

Even with the recommendations, I don't really understand what it's asking.

lol

Even in this last build, it has some glitches.

Cybermorph is very playable on this core now.

(I mean after the work GreyRogue, Kitrinx, and others have done. I haven't fixed anything yet. lol)

[uncut atlas]

That avp situation is weird

Turbo CPU fixes it

So it has to be bus coordination from something holding it too long

Making the CPU faster frees cycles to make up for it

[rotund portal]

Another place to look is the actual source code for Tom and Jerry, which has dates indicating when different systems were actually designed:

Blitter - November 22, 1990, basic design complete within 2 months
GPU - January 28, 1991, basic design complete within 2 months
Last major feature added May 16, 1991: Blitter collision detection

Small bug fixes added throughout 1991 and 1992.

Last bug fix added in October 1992: Fix a pipeline hazard in GPU.

Jerry - finished November 12, 1992

[ashen spoke]

Controller overlays - https://hoskinson-industries.myshopify.com/collections/frontpage

[hidden siren]

Huh, funny; written by the guy who also made the ARJ compressor, which I hadn't thought of in YEARS until I saw his name on this faq. Used to be a big compressor back in the dos days if memory serves me well

[dusk slate]

Sadly, I'm not able to get anything but sound on AvP either. Tried three different core builds, and also tried turbo mode. Just audio. Ah well, a bunch of other games look and play great already!

[mild karma]

did you try greyrogue’s second build from…the 13th I believe? AvP launches consistently for me with that build

[mental briar]

This is the one that loads AVP for me #test-builds message

[uncut atlas]

this behavior is weirdly consistent, but random from mister to mister

it's like semi-deterministic based on mister and very marginal. for some builds I get that behavior on mine, for others I dont

it has to be an extremely borderline critical path failure

[glad flame]

Reminds me of the SEGA Saturn core having a similar problem with Grandia.

Some people were experiencing glitched flickering geometry, while others didn't. It became a wild goose chase for a while to figure out why it was so inconsistent.

[warm oasis]

Do you think it is minor differences in the DE-10 Nanos or the ram chips boards in each?

[frosty pike]

Is this core considered active again?... Or just a nice surprise update....

Either way....awesome, but just wondering

[mild karma]

it’s been active at least for the past week or so

[mental briar]

It kinda depends on if Rogue, Kit, and Ash continue to find it interesting

[fallow salmon]

so if you want to play this do you need like a ten button pad? or do most games let you get away with less?

[mental briar]

I ran into a couple of games that needed more than 3 buttons. I'm not sure I hit anything that needed more than 6

But I also didn't spend a lot of time with every game

[fallow salmon]

oh cool so like, a saturn pad?

[mental briar]

yeah, that's exactly what I was using

keep in mind that on the jaguar pad, ABC is backwards (CBA) and they use B for most confirmations

[fallow salmon]

cheers

[dusk slate]

Yeah, that's one of the builds I tried.

[rotund portal]

https://www.youtube.com/watch?v=SAg99b4aewc

[spiral spoke]

I totally forgot there is an arcade system based on the jaguar https://en.m.wikipedia.org/wiki/Atari_CoJag.

[warm oasis]

I forgot about that too

The Atari CoJag is an arcade board released in 1995 by Atari Games (a then-subsidiary of Time Warner Interactive that licensed the console hardware) before Atari Corporation's reverse merger with JT Storage. It was based on the Atari Jaguar chipset. It features nearly identical hardware that doesn't differ from that of the console except for its system processor. The standard 13.825 MHz Motorola 68000 was replaced by either the 25 MHz Motorola 68020 or the 33 MHz MIPS R3000.The RAM for games (the Atari Jaguar features 2 megabytes of RAM whereas the Atari CoJag uses 4 megabytes for Area 51 and 6 megabytes for Maximum Force) and the 64-bit ROM bus (the Jaguar features the 32-bit one). The arcade board is composed from the chipset and hard drive with an HDD (1 gigabyte for Area 51 and 2 gigabytes for Maximum Force) that features a game (except in case of the leaked prototype games which only exist with ROMs), and a JAMMA wiring harness. Compact Flash-To-IDE boards could be used by modders instead of HDDs. Interestingly, unmodified boards also used as the main controller for kiddie rides by Carousel International, which are no longer manufactured: Speedster II, Skycopter II, and SpaceGuy (never released), but could have been previously spotted in Chuck E. Cheese pizza parlors (founded by Atari's co-founder Nolan Bushnell). All the rides were programmed by Mario Perdue, who wrote Breakout 2000.[1] Also, the CoJag supports 2 light guns instead of 1 supported by the Jaguar.

A few questions jump out from reading that:
Do we have a 68020 or R3000 core already?
Is it worth upping the available ram to 4 or 6 MB already? Could that potentially give a performance boost at no/low cost?
It says the Jaguar supports 1 lightgun... Does it? Or is that academic as nothing used it and it doesn't actually exist?

[sudden palm]

68020 - minimig , R3000 - psx

[warm oasis]

Nice

What would going from 32MB to 64MB ROM bus entail?

Also wondering, was the Co-jag hardware backwards compatible with Jaguar?

[still aurora]

COjag games are terrible

see them in Mame

I also think you are jumping the Gun. Get the Jag core working before attempting to modify it into co-Jag

[glad flame]

Plus there is still the issue of the Jaguar CD.

[uncut atlas]

68020 is in amiga, and the actual ram requirements arent different

the bus was still 64 bits wide, so the ram bandwidth doesnt change, and the sdram has plenty of space

[glad flame]

I believe the Jaguar CD is just a disc drive plopped onto the original hardware, similar to the PC Engine CD, so maybe it could be included.

I might be wrong on this.

[uncut atlas]

the ROM bus since it can't be shared with ram reads also doesnt change requirements

[uncut atlas]

iirc there was a proprietary asic in it

[warm oasis]

I think there is some chip in Jag CD we don't have, but it is mostly just a CD drive stuck on the top

The CD format was a bit weird though, not sure if that adds complexity

[still aurora]

Its all been done in BigPEmu

[glad flame]

Having the Jaguar CD would be nice, for the simple fact the original hardware is notoriously prone to breaking.

[still aurora]

and looks like a toilet seat

[warm oasis]

BigEmu is closed source so isn't useful as a reference

[warm oasis]

So if I am reading this right, we basically have all the extra parts to support these arcade games already, assuming the core becomes stable down the line, it would largely be wiring in parts already there?

[uncut atlas]

it's never that simple, but seems like it

it's not impossible anyway

[rain sierra]

Area 51 is easily one of the most notable light gun shooters. Might not be as technical as many other shooters, but if you ask a gaming normie to name a light gun game chances are Area 51 will be high on the responses.

[uncut atlas]

I think our 68020 isnt great

[warm oasis]

Yeah, never as straight forward as just wiring up, but that's promising if we have all the parts already

[uncut atlas]

bigpemu is closed source and therfore useless to everyone

[warm oasis]

Jag CD would be really nice to get one day if it were doable. Struggling to find accurate technical specs for it

[uncut atlas]

https://wiki.console5.com/wiki/Atari_Jaguar_CD

[warm oasis]

I am sure when I looked before it had some chip we didn't have

[uncut atlas]

we can barely make the original jaguar fit timings though

so I wouldn't hold your breath for it

[rain sierra]

But then we can never play Highlander! ☹️

[ashen spoke]

Jaguar CD possible or nah?

[warm oasis]

Would timings be less of an issue on a potential MiSTer 2 board, or would it have the same issues whatever board it was targeting?

[uncut atlas]

I don't think anything makes it impossible, per se

but the way the core is, it would require a LOT of optimization to make it work

[ashen spoke]

Please make an objective claim so we can complain to you for years to come if it doesn’t come true

I’m talking like at last three years, also well remind you in a passive aggressive way too

[rain sierra]

We need complaint fuel!

We’re running on complaint fumes !

[uncut atlas]

very well. The jaguar cd was bad.

[ashen spoke]

[warm oasis]

Hopefully you guys are able to keep optimising it, you seem to have made great grounds already. Does it seem like there are more areas that can be improved upon?

[uncut atlas]

it's really hard without changing the logic

the netlist adaptation has sooooo much combinational logic

[warm oasis]

Is it the double edged sword of using the netlist? Like, if someone were to do a ground up implementation of that chip then it would be much easier to optimise?

[glad flame]

I'm just kind of surprised the Atari Jaguar is this fussy.

[uncut atlas]

why? even the real ones are fussy with tons of hardware bugs

[warm oasis]

It does seem annoying that they open sourced it, but didn't seem to release all the documents etc.

[ashen spoke]

The Atari Jussy

Yeah ok I’m going to time myself out for that one lol

[thorny swift]

Ban this man

Because Jussy doesn’t sound like fussy. I’m just saying

[warm oasis]

Did you wire up the 4 player adaptor and the Jag link thing to the iO?

[rain sierra]

It really has some bizarre design decisions Doesn’t it?

Showing 0 signs of life without a cart.

Connecting video cables directly to plated pins on the main motherboard rather than a repairable/replaceable connector.

Apparently not connecting all the logic between Tom and Jerry (or just making it very complex) leaving developers to treat it like a Sega Genesis with more colors lol.

[glad flame]

I know that the Atari Jaguar was a jank machine, but I figured since we managed to get systems like the PS1, Saturn, and N64 working on the DE-10 Nano, I was optimistic that the Atari Jaguar wouldn't be too bad.

But apparently it is genuinely that bad.

[rain sierra]

It’s analogous to how shit it was to develop on the real hardware haha

[pure oracle]

Wrong channel 🙃

[uncut atlas]

put that in media please

[desert oar]

Problem is not the de10 or the fpga, problem is how the core is been written. I think it could be easier to rewrite the core or most parts of it. I understand it so, that too many things are combined together and that makes trouble to get timings right without braking other things

[frigid dock]

So is this core officially back in development now? This is exciting

[uncut atlas]

well, those cores well well made by extensive research by robert from the ground up. The jaguar core is made from a chunk of 10 year old java code being run on netlists found in a dumpster.

[warm oasis]

What would it take for someone to redo that chip we have the netlist for from the ground up? Is it a mad complex chip?

[uncut atlas]

oh this is fun http://mdgames.de/jag_eng.htm

someone please use that logo patch program to make a misterkun version of the bios

[desert oar]

The emulator guy need about 3 Month for the work. But I don’t know if You could compare this with fpga work.

[warm oasis]

Huh, so lightguns are a thing...

Probably a question for @plush salmon , but does this mean you could add SNAC support to use the SMS lightgun with the Jag core with the existing Sega snac board?

[small sail]

😲 the core is amazing. The live stream earlier was so much fun.
Thanks everyone involved in making the MiSTer project so freaking awesome.

[lucid oak]

out of curiosity, where is this netlist available, where did it came from?

[uncut atlas]

I don't really remember tbh

i've heard a few versions

[uncut atlas]

they are possible, for one baloon demo

nothing else afaik uses them, and I wouldnt say they are a "thing"

someone hacked an unofficial one to connect to the LP pin

for no particular purpose

[ashen spoke]

I bought 8 more controller overlays which means I own 15 now lol

@tall musk embed rfid reader into the Jaguar controller and rfids into controller overlays for the ultimate Jagsperience

It would be Jagtastic

[tall musk]

that... is not a bad idea.

Right up there with Blood Punch

[ashen spoke]

That’s awesome, once I get my dual ram back into my MiSTer I’ll Jag off to some Jaguar

[tall musk]

puntastic

@ashen spoke - Where are you getting overlays from? There weren't that many games that had them.

Most were just in the manual.

[ashen spoke]

I pinned it because I kept forgetting lol

Controller overlays - https://hoskinson-industries.myshopify.com/collections/frontpage

[tall musk]

oooo... transparent shells

[ashen spoke]

I also bought a new controller from this guy on eBay and it was definitely new and worked well - https://www.ebay.com/itm/296275725646

[ashen spoke]

Yeah for the carts? Was cool.

[tall musk]

That's a decent price these days

I have the two that came with my system. I'm the only owner ever so they're in great shape.

[ashen spoke]

Oh awesome! Didn’t know it came with two controllers.

[hot rune]

I can remember when Game/EB in the UK were selling new old stock Jags and games around 20 years ago.
They were cheap

[tall musk]

Yup. That's when I got mine.

Only one controller in the box, but the other was next to it for .99 cents 😄

Bought all the games I still have now at the same time.

[ashen spoke]

Damn that’s so cool!

[tall musk]

There you go using that word again.

Nobody has ever used "cool" to refer to anyone that bought a Jaguar

Aw... no Tempest 2k overlay. I was hoping he'd made one.

Maybe I should make one.

It's only the top row of buttons to change the view. And the standard pressing # and * at the same time to reset

[ashen spoke]

I think Jaguar is cool, genuinely

[tall musk]

I have a love for the jank.

Consoles like the Jaguar are the direct-to-vhs consoles. They were never destined for greatness, but that doesn't mean there isn't fun to be had.

[desert oar]

It is part of the history and Atari‘s last big thing.

[warm oasis]

I have said before, but I still bitterly regret not buying a Jag when Game in the UK was dumping them new for £30-40 a couple of decades ago

[hearty ether]

Thanks for the build. It doesn't seem to work for my tink4k. I am probably doing something wrong.

[mental briar]

I got mine under similar circumstances. Only it was a US shop. I regret not buying the dvd drive (or…ANY games)

[warm oasis]

Oh yeah, I bet there was a time you could get the CD drives for next to nothing. I hate to think what they go for now

[desert oar]

I regret more that I have not bought the 49 DM Dreamcasts at the clearance. So many 10 DM games too 😂

[warm oasis]

Has anyone been tracking down the various Jag homebrew out there? It would be great if everything was collected into a pack

I got my Dreamcast when I first joined eBay in the early-mid 2000s with a load of games and controllers for like £30

That was a great time to have a first job and some cash and be into gaming, I picked up all the previous gen systems I never had and games for next to nothing

[hot rune]

I say the same thing about the C64GS console when they were £20 especially with today's prices

[ashen spoke]

In a few months time we’ll all be playing cycle accurate Atari Jaguar on our MiSTers!

right we need a Jaguar emoji, I’ll get on that soon

[glad flame]

Spinning Jaguar cube

[ashen spoke]

I dunno what’s up with the top cube plane

oh it’s just a quarter rotation

[warm oasis]

It is really exciting to see this flurry of advances in the more obscure systems, Jaguar, CDi and Super Cassette Vision coming along leaps and bounds recently. 🙂

[hidden siren]

This question and kitrinx link to Matthias Domin page reminded me of another old atari hacker: 42Bastian Schick, (from my atari lynx software hacky days) - these two were a big driving force with providing compilers and libs etc. Turns out that Bastian is still doing fancy stuff with both lynx, and more relevant for this group - jaguar; he has a whole bunch of demo-scene style demos for it, source included;

Github here: https://github.com/42Bastian/JaguarDemos/tree/main
Youtube here: https://www.youtube.com/@monlynx/videos
and here's a link with a lot (4 pages or so) of scene demos, including his: https://www.pouet.net/prodlist.php?platform[0]=Atari+Jaguar

Might be fun for some 🙂

[mild karma]

I have a bunch, but I probably need to go seek out more. I’m sure I’ll dive into that soon

[hidden siren]

Have you been harvesting https://forums.atariage.com/topic/246639-atari-st-games-ported-to-the-jaguar/ ?

[mild karma]

@hidden siren yes, but I haven’t really checked them out yet

[spiral spoke]

there is a bunch of atari st ports and homebrews in the htgdb jaguar pack

[warm oasis]

It would be great if we could crowd source of a pack of all the homebrews and demos, be great for testing if nothing else, but should be some gems in there

[mild karma]

yep, I got most from there, but I’ve been looking in other places to supplement as well

[tall gazelle]

starwars is good, others missing sound.

[spiral spoke]

I have the time to test the core on my dual sdram setup and, except for the music of pinball fantasy, everything seems ok even avp. I never really try jaguar game (perhaps some on bigpemu), but the console has amiga/atari st vibes but with better performance.

And of course, thank you so much for those involved to make it happen!

[still aurora]

The Author seems to be a good chap though. I am sure he could provide technical help if asked. He has a Discord for his emu

[warm oasis]

Definitely seems like someone worth picking the brains of if there esoteric issues with the system

[midnight horizon]

Also if you want to ask questions. I would ask him sooner rather than later given his health

[warm oasis]

Does his emulator also support the co Jag arcade games?

[tall musk]

Good question, but no. Since there are officially only two and are well emulated in MAME, likely ultra low priority.

[warm oasis]

Good point, software emulation already exists

Are these out there and playable?

4 unreleased prototypes exist:

Fishin' Frenzy
Freeze
Vicious Circle
3 on 3 Basketball

[lucid oak]

i've got avp to boot on dv using what i supose to be the commit used to build this rbf (commit 709c09b)

still, cant get ingame

[mental briar]

I won’t pretend to know what is happening but I think grey is building several cores and then testing them. There seems to be variance in the builds even if they come from the same source?

[lucid oak]

probably, because even when i build it without modifications, the rbf generated is different from his

i'm just messing around lol, i also not really sure how to tackle this

[lucid oak]

commit 8acfe0f gets ingame

[mental briar]

With DV? Is that a build you posted?

[lucid oak]

direct video

i'm doing it to be able to use my crt lol

i'm not doing any optimization or anything besides that

[mental briar]

Nice. Is that build posted (I tried searching I swear)

[lucid oak]

no, just testing them

but can post it if you want

[rotund portal]

I forgot how annoying the clock setup on this core is, including the TLW signal.

[tall gazelle]

On CRT

[ashen spoke]

What’s the right build to pin, it’s hard to keep track lol

[mental briar]

If Sonic's runs AVP, has DV, and is incorporating the latest changes, then probably theirs

[tall gazelle]

The one above is a milestone..

[mental briar]

I haven't had a chance to test it but it looks promising

[jaunty canyon]

Is the jaguar code public

[sudden palm]

yes

https://github.com/greyrogue/Jaguar_MiSTer/tree/rework

check out “branches”

[ashen spoke]

Ok cool, just pinned it. Wasn’t sure if it was just a minor test or something.

[tall gazelle]

I think they're all for testing, and gradually getting better.

[ashen spoke]

It’s exciting times for sure!

[tall gazelle]

thanks for that.

[lucid oak]

yeah, the first one i posted two days ago is technically more advanced, is based on the changes kitrinx had done, this lastest one i posted is, at least by the time frame, based on the first build greyrogue posted on test builds, so, theres a lot they've done that is not on this one

but, it is the only one i've got avp working, so, maybe for the direct video crew, for now this is the avp build

and for the people that doesnt use direct video, the newest ones from kitrinx and greyrogue should be the way to go

[ashen spoke]

Oh darn lol I unpinned the other builds

[lucid oak]

sorry for the confusion, i should had explained this before

[tall gazelle]

i would keep them pinned..

[ashen spoke]

nah don’t apologize

[mental briar]

I haven’t gotten the any of the builds aside from the one grey posted (and called out as AVP working in) to get AVP to boot on my retro castle build.

[ashen spoke]

You should’ve kept your all caps post lmao

[tall gazelle]

Haha not even sure how that happened.. funny though

[lucid oak]

also, i've shared the dv fix here, it's probable that all future builds will come with dv fixed already

[jaunty canyon]

Thank you

[rotund portal]

I tried to make a "Turbo Tom" (tm) core.

I failed.

It just crashes / won't boot.

The "tlw" signal has always caused problems there.

I still don't fully understand what the necessary timing relationships are.

I also ate a whole pan of pasta, and now I can barely breathe.

Doing another compile, to test soniccd123's patch for Direct Video. Hopefully I did it right.

[tall gazelle]

the same or with extras..😃

[rotund portal]

Basically the same atm, but I want to get DV in place.

Can't think of many other things to tweak, as it's not an easy core to understand.

I mean, it would be nice to be able to overclock the Tom chip, but then it gets tricky with the video timings, especially for a CRT.

The ASCAL scaler can handle a very wide range of timing signals.

It doesn't care too much about the absolute timings for things like Hsync, because it just shoves the pixel data into the framebuffer.

I also tried a "Force FASTRAM" thing earlier, but it made no noticeable difference to the games at all.

All that did, was force this value...

But I didn't see the RAS timings change in SignalTap, so maybe a lot of games are already using that reg value?

I think Kitrinx is right, about getting the cart ROM into SDRAM as well soon.

The Cart ROM is currently loaded / read from DDR3.

The BIOS gets loaded into on-chip mem on the FPGA, as it's "only" 128KB usually.

(the on-chip mem is essentially Zero wait-state. DDR3 most definitely is not. lol)

DDR3 is optimized more for longer burst transfers, but the latency is quite high.

I haven't actually checked to see how often the DDR3 takes longer than the original Cart ROM would.

But if it does, some games that stream data from the cart a lot, could have slowdown and other issues.

There was a question about whether we should be checking for DDRAM_BUSY, as main MiSTer writes the cart ROM to DDR3.

But by default, the Jag BIOS always does a cart checksum anyway.

If it fails, it gives you the Red screen of death.

(unless you have the Cart ROM Checksum patch enabled in the OSD menu.)

So far, I've never seen it fail on the red screen on a normal (commercial) cart ROM, so it's probably fine.

[tall gazelle]

I've seen it go red, then the game boots.

[rotund portal]

Great, no video output at all yet. lol

So clearly I didn't do the DV patch correctly.

oic, I was gonna say...

i commented out vresl in both lines 759 and 760

        //hs <= ((hseq & ~hs) | (~hpeq & hs)) & vresl;
        //vvs <= ((vseq & ~vvs) | (~vpeq & vvs)) & vresl;

I should have read it properly. lol

Should be...

  hs <= ((hseq & ~hs) | (~hpeq & hs)) /*& vresl*/;
  vvs <= ((vseq & ~vvs) | (~vpeq & vvs)) /*& vresl*/;

Sounds like vresl could be something like Vertical resolution, or maybe an active-low reset signal?

Trying again...

Core takes 17 minutes to compile atm, with SignalFarp enabled.

On the (almost-stock) 3700X, with 16 Gigabitings.

// VID.NET (130) - vres : nd3
assign vres = ~(lockl & viden & resetl);

// VID.NET (131) - vresl : ivh
assign vresl = ~vres;

Nowhere in vid.v does it drive the "lock" signal.

That was probably some kind of PLL lock thing, which isn't used on the FPGA version.

// VID.NET (34) - lockl : ivm
assign lockl = ~lock;

Oh, it's an input to vid.v.

    input lock,

And it comes from the gpu_mem module, in graphics.v (in the tom module).

reg lock_obuf = 1'b0;
assign lock = lock_obuf;

// GPU_MEM.NET (429) - locki : mx4
assign locki = reset_n ? (bigwr ? 1'b0 : lock_obuf) : (bigwr ? lock_obuf : reset_lock);

// GPU_MEM.NET (431) - lock : fd1q
always @(posedge sys_clk)
begin
    if (~old_clk && clk) begin
        lock_obuf <= locki;
    end
end

"reset_lock" is driven by nocpu, from the abus module.

// ABUS.NET (84) - m1d[13] : mx2
assign m1d_13 = (cfgen) ? din[13] : cfg[4];

assign nocpu = nocpu_obuf;

always @(negedge sys_clk) // /!\
begin
    if (m1ld) begin
        {romwid[1:0], romhii} <= m1d[2:0]; // ldp1q negedge always @(d or g)
        nocpu_obuf <= m1d_13; // ldp1q negedge always @(d or g)

The "cfg" bits are read from pull-ups or pull-downs on the bus, at reset, I think?

So "nocpu" will actually be pulled up to +5V.

What does all of this mean? Not sure. lol

// VID.NET (130) - vres : nd3
assign vres = ~(lockl & viden & resetl);

// VID.NET (131) - vresl : ivh
assign vresl = ~vres;

But it does mean that lockl will probably stay high all the time.

And obviously resetl (when the core is running).

So vresl will toggle, depending only on the viden signal.

I imagine that's a "clock enable" for the video output.

Oh, that's literally just the "video enable" flag in a GPU reg.

`ifdef FAST_CLOCK
always @(posedge sys_clk)
`else
always @(negedge sys_clk) // /!\
`endif
begin
    if (vmwr) begin
        vm[11:0] <= din[11:0];
    end
    if (~resetl) begin
        vm[0] <= 1'b0;
        vm[4:3] <= 2'b00;
        vm[7] <= 1'b0;
        vm[11:9] <= 3'b000;
    end
end
assign videnl = ~viden;
assign viden = vm[0];

Not sure why that would have any impact on Direct Video, unless the converter chip in the DV dongles expect syncs as soon as HDMI starts up?

ie. There is likely a very small delay, from when the core first loads, and when the BIOS writes to the VMODE reg, to enable the VIDEN flag.

In summary, I think soniccd123's real patch for DV is these changes...

//assign vsync_out = hvs;
//assign hsync_out = hes;
assign vsync_out = vvs;        // Direct Video patch, by soniccd123.
assign hsync_out = hs;        // Direct Video patch, by soniccd123.

I mean, I could check all of this on SignalTap, to see how the Sync timings change, but I'm too lazy to keep doing 17-minute compiles. lol

Hsync pulse, with Cybermorph running.

And yes, they are actually active-high, for some reason, despite the names.

Hard to get all of the Vsync pulse to fit on the SignalFarp capture, because Vsync will be several lines long.

I erm, don't currently have a CRT in this room that I can hook up.

No other fancy fixes in that compile, but if somebody could please let me know if Direct Video is now working?

AVP works for me on this build.

But as we know, it can be variable on different people's boards / SDRAM modules.

Almost certain it's just marginal timing stuff messing up that game.

No glitches on the Character Select screen either.

I didn't do anything that would have directly affected that, btw, it's just pot luck.

The Quartus Lottery (tm).

I think I worked out what adds to the suspence in this game...

The frame rate is so piss-poor, you can't be expected to turn around fast enough to shoot the aliens. lol

[dusk slate]

Was finally able to get AvP working with that latest build as well.

I love how some of the core builds boot up to the bios screen with a red background and red logo instead of the usual black background.

[rotund portal]

Which build did you test, the one I just posted?

[dusk slate]

No, it was this one: #1055574003810578503 message

[rotund portal]

Only other thing I did tweak, is reducing the SDRAM controller "ready" signel latency by one clock cycle. Which is probably doing nothing, tbh. lol

Ahh, np.

Red background is usually just when the cart ROM checksum test fails.

Which will likely happen when you first power up MiSTer and load the core.

Or load the Jag core, after running a different core.

Interestingly, when I load a new Jag core build via the USB Blaster port (miniUSB next to the HDMI port), the cart ROM usually stays retained in DDR3 OK.

[dusk slate]

The red background seems consistent to me though on specific builds. Even after going back and forth between Jaguar builds.

[rotund portal]

So it will generally still load up with the previous ROM intact.

Not sure what causes that, then. It's a weird core. lol

[mental briar]

Direct video works, but no video on AVP, just sound

[rotund portal]

lol

Doesn't surprise me.

[mental briar]

Same here. No video but sound on AVP

[rotund portal]

Not even Cybermorph runs on that last core I posted either.

Stupid core.

Oh, running now.

I disabled Turbo CPU, which seemed to help.

[dusk slate]

Why is there a giant floating hamburger in space!?

[rotund portal]

lol

I hate to say this, but I think a single-SDRAM build might work OK-ish.

[mental briar]

No Trevor McFur on this core either

[rotund portal]

A new SDRAM access now happens on the falling edge of CAS_N.

And ram_rdy only goes low for ONE clock cycle.

Which seems to be plenty of time for the core to read the data, vs the old-people DRAM used on the Jag itself.

And that's during the longer "bursts" as well.

[dusk slate]

You just gave hope to...a few people!

[rotund portal]

Although, we have been here before, and on the "old" core, it did seem sensitive to having that data appear as fast as possible.

lol

Personally, I dislike Dual SDRAM, because it's only really Jag that currently "needs" it.

And means I can't just use upscaling via HDMI, and a CRT at the same time.

Nor have analog audio output for headphones / speakers, on JAMMIX.

Once you see that the letters don't render correctly (apparently no backface culling), you can never unsee it.

You're welcome.

Early-90s plasma effect, FTW

[uncut atlas]

right now im trying to figure out the eeprom

it doesnt work when you use the external data bus 0

clearly, the real jag uses the external data bus

however in our design, the sck pulses on gpio 0

[rotund portal]

Does it make much difference, to just always have EEPROM DOUT hooked up directly, bypassing that stuff?

[uncut atlas]

it correctly lowers the external data bus pin, and rw sets the direction correctly, the 68k sets the bus to a value

but the rising edge happens at the same time the bus is released and the data is clocked in incorrectly

[rotund portal]

oic

[uncut atlas]

that begs the question: wtf?

[rotund portal]

lol

Maybe a pull-down somewhere?

[uncut atlas]

nope

gpios are all clearly pulled up

active low

no inverters

[rotund portal]

Or data clocked on the negedge into the EEP, but that wouldn't make much sense either, for any standard I2C EEP.

[uncut atlas]

the octal gates have a propgation delay of 2.5ns

external bus has all pull ups, no capacitance

the eeprom's datasheet definitely says posedge

people have used third party ones successfully to replace them too

[rotund portal]

Are the other EEP pins driven from those GPIOs?

Is it possible the netlist translation is missing some reg, so the rising edge thing is happening too early?

https://www.mulle-kybernetik.com/jagdox/cartridge.html#EEPROM

Man, I didn't think about how crusty the EEPROMs were back then.

Only around 1,500 writes, before it starts going wrong. lol

[uncut atlas]

EEP i driven by GPIO0 (sck) GPIO1 (CS_n) and ED0

and it has EE out to eedata

[rotund portal]

I could totally see somebody playing Checkered Flag 1,500 times, because we all know its the greatest game ever made.

Ahh, OK.

[uncut atlas]

rising edge happens too late

[rotund portal]

Could hook up an o'scope to a real Jag?

I'm not even sure where my Jag is atm.

[uncut atlas]

jaguars aren't welcomed in this house

[rotund portal]

lol

Sorry, what...

"Jerry has six general purpose IO decode outputs which are asserted
(active low)"

Does that mean it actually inverts the signals, vs what you write to the registers?

That's very dumb.

And are the (usable) GPIO outputs also open-drain?

[uncut atlas]

gpio is definitely pulled up so

[rotund portal]

assign j_xgpiol_in[0] = (j_xgpiol_oe[0]) ? j_xgpiol_out[0] : 1'b1;
assign j_xgpiol_in[1] = (j_xgpiol_oe[1]) ? j_xgpiol_out[1] : 1'b1;
assign j_xgpiol_in[2] = (j_xgpiol_oe[2]) ? j_xgpiol_out[2] : 1'b1;
assign j_xgpiol_in[3] = (j_xgpiol_oe[3]) ? j_xgpiol_out[3] : 1'b1;

// EEPROM INTERFACE
// Weird, but I don't see how it could work otherwise...
assign ee_cs = j_xgpiol_in[1];
assign ee_sk = j_xgpiol_in[0];
assign ee_di = e_dbus[0];

eeprom eeprom_inst // FIXME: this should really be saved as a save file
(
    .sys_clk (sys_clk),
    .cs      (ee_cs),
    .sk      (ee_sk),
    .din     (ee_di),
    .dout    (ee_do)
);

Sorry, I know I post a lot, but it's one of the few ways I can make sense.

It's not like I've kept paper notes, for the past 20 years. lol

What about defaulting all of those "outputs" to 1'b0 ?

Or would that cause a World of Pain, for other stuff?

[uncut atlas]

because they arent

the schematic shows with excruciating clarity they are pulled up

[rotund portal]

hmm

Fair enough. lol

"rising edge happens at the same time the bus is released and the data is clocked in incorrectly"

Brain trying to process.

Rising edge of EEP clock, yep?

[uncut atlas]

yes

that's what it says in the datasheet

so the clock happens too late or the external bus select is happening too early

[rotund portal]

What about just registering the data for one extra clock cycle?

ee_di

[uncut atlas]

I mean, we could.. but why are we using a kludge without justification?

[rotund portal]

Yes

lol

If it works for all the games that use an EEP, then I don't see much problem.

[uncut atlas]

I could also just use dbus instead of e_dbus and that works

but it's wrong

[rotund portal]

It's possible some stuff was even left out of these netlists, or got lost-in-translation.

[uncut atlas]

maybe there was a delay somewhere that everyone just took for granted

[rotund portal]

Gah.

I did a whole compile, just to add the EEP signals, but didn't quite add the clock.

Could swear I had "sk" added to the filter box.

[uncut atlas]

you should add the external bus select too

[rotund portal]

I ditched the startcas output from tom, btw. That was just the thing I added last time.

[uncut atlas]

what is the point in that

[rotund portal]

That thing?...

// External Data Bus
wire e_dbus_oe = ~xexpl & rw;
wire e_dbus_we = ~xexpl & ~rw;

[uncut atlas]

xexpl is the external bus select

[rotund portal]

'cos I only exported startcas before, to use to trigger DRAM reads/writes

OK

Grey changed it to now use the falling edge of CAS_N, so startcas is no longer needed.

[uncut atlas]

I changed that technically

I got rid of most of your hacky signals

[rotund portal]

Not to mention, I should have been AND'ing startcas with the bs (byte select) signals, probably.

Ahh.

Good. lol

Tried all sorts to improve things, but I think it was mostly for nothing, because of the broken DSP instructions.

// MEM.NET (473) - startcas : an2
assign startcas = q3a & dram;

I changed that from a wire to an assign as well.

With the wire declared elsewhere in mem.v, just to keep it more original.

I really wish there was a global option, to keep all "wire" and reg names.

assign rw =
    ((xrw_oe)         ? xrw_out   : 1'b1) &
    ((j_xrw_oe)       ? j_xrw_out : 1'b1) &
    ((fx68k_bus_en)   ? fx68k_rw  : 1'b1);

Quartus culled the rw signal.

Already have fx68k eRWn in SigTap, so that's fine.

I'm assuming nobody really tried to access the EEP using code from Tom or Jerry?

[uncut atlas]

seems not

[rotund portal]

@uncut atlas The eeprom module is running on sys_clk (106MHz) atm. Would it help, to just run it from a slower clock?

[uncut atlas]

no.. because then it would be using an asychronous clock?

I mean it's obvious clocked by sck

it seems like the most likely thing is xexpl is not being held long enough

I have sck inverted here

no matter how you slice it, gpio and xexpl are clocked on the same tick and that can't work

it seems like they are are clocked on the falling edge of xpclk

[rotund portal]

hmm

I probably would just try putting xexpl through a reg.

Then OR'ing the original xexpl with the new reg? Not sure.

oic, that's actually taking multiple clock cycles for each xexpl pulse already, so it's setting the timings.

So it's not as if it's a single-clock pulse thing.

[lucid oak]

just a feedback, this one works with dv for me, avp is playable

[rotund portal]

Nice, thanks for the info on patching.

[uncut atlas]

xexpl is used for a lot more than just this, all cart reads and things

it's not safe to just randomly

do that

[sterile moss]

that app creates either a .rom or .img file, rom is a 'demo game' that loops the intro, not sure what the img is but doesn't seem to be a full bios (I really dunno what I'm looking at) 🙂
Found a 'bmp_cry' tool to convert to the format it needs, cant get the resulting rom/img to boot on mister core, rom does under bigpemu

[uncut atlas]

oh, lame

[sterile moss]

ill try the nodither option of the bmp_cry tool

had to grab it from wayback, link on http://www.jagware.org/index.php?/topic/259-jaguar-image-converter/page/2/#comment-12881 was dead

eh nodither is a little better. Need someone who can art 🙂

[mental briar]

see

now the important work is being done

[mild karma]

I absolutely need that bios and now I want hacked MiSTerkun bios files for every core that has one

[sterile moss]

little better with BnW MisterKun

[warm oasis]

Nice, does this work as the BIOS file so could be distributed and work as well as the official one?

[sterile moss]

can only get the .rom version to load as a game, on bigpemu

"INTROPTF.EXE patches a given 64*64-16bit-CRY-image into the INTROORG.IMG-file.
Load the output-file into Jaguar-RAM at $4ff6 and start it there.

Usage:
introptf filename [-demo]
The output-file gets the filename of the CRY-image but with the extension IMG.
Called with -demo the image will be converted intoa cartridge-based program
which plays the intro in an infinite-loop.
The extension for this file will be ROM."

need to inject that img into a BIOS it seems

[ashen spoke]

lol omg y’all are hackers

This is cool

[sterile moss]

ill leave the inevitable dang it robbpi version to others :p

[sterile moss]

From mister

did a VERY nasty merging of the img file generated and the bios with hex editor, and it loaded/games play

pretty sure something is gonna be broken..

[stray obsidian]

Is the core still dual ram only?
Would love to try it, but only got 128mb Ram

[sudden palm]

Yes, dualsdram only

[stray obsidian]

feeling sad ^^. Is single ram possible in future?

[sudden palm]

unfortunately not

[stray obsidian]

Sorry for asking maybe stupid questions, but what is limiting?

[sudden palm]

limitation is the latency of ddr3 memory

Some components must be moved to sdram to work better

[warm oasis]

If you don't have an analogue iO board, i.e. you have the slot a second ram stick goes in empty, then you could pick up a 32MB stick for not much and that will be fine for this core and Saturn. So if you can accommodate the second ram stick you don't need a more expensive 128MB stick in slot B, making it a relatively cheap upgrade.

[uncut atlas]

never say never but it seems unlikely, but maybe there will be one to play like, only a few games like tempest

[sterile moss]

BIOS modified with MiSTer-kun logo if anyone wants to try (rename to boot.rom and copy to \games\Jaguar\)

Light mode: https://cdn.discordapp.com/attachments/1055574003810578503/1308044469261832212/bootMisterKun.rom?ex=67d76b17&is=67d61997&hm=1e01f911834f6f742226807617ba5c76e961b2f5c64cad8169314fb84c6639e8&
Dark mode: https://cdn.discordapp.com/attachments/1055574003810578503/1329635641440337940/bootMK-inverted.rom?ex=6794f270&is=6793a0f0&hm=550e1ca26c2bd2992faa108f6ebd86f2b6b1475186bde9123feb634ffe90f8c3&

https://media.discordapp.net/attachments/1055574003810578503/1307967685807837254/20241118_151545-Alien_vs_Predator_World.png?ex=67914415&is=678ff295&hm=d8187a49d48ba1665ea1dfc43dc15d51353b2b63c7449d690b974aabbc675580&=&format=webp&quality=lossless&width=476&height=350
https://media.discordapp.net/attachments/1055574003810578503/1329628147603214367/20241120_193428-screen.png?ex=67919fb5&is=67904e35&hm=b0a29164686dddcb29b2efe74c06c8695bfef280db3c1d52d639f83c313286c3&=&format=webp&quality=lossless&width=807&height=593

[warm oasis]

Do we think that because Atari open sourced the core then this can be freely distributed? I would assume so, which is great if true

[uncut atlas]

yes

[warm oasis]

Glorious, get that kitty in the release folder

[uncut atlas]

we'll go with that for now, if someone tells us otherwise we'll comply

[warm oasis]

Anyone's uncle work at Atari?

[sterile moss]

haha, make sure it works the same first. My methods appear to work but deserve scrutiny 🙂

[stray obsidian]

Thank you for the explenation

[stray obsidian]

I got my old 64mb still anywhere around. But without IO-Board and direct video disabled I cant get it on my CRTs.

[warm oasis]

Hmm, that could be old and cause issues, but someone may need to confirm. Try it out though

[uncut atlas]

you'll be happy to know I implemented teamtap moondandy, since you seemed caught up on the fictitious idea that you could get four people to play jaguar at once

[warm oasis]

Thank you Kitrinx, I aspire to have three friends one day

We all need life goals

When you said the Jag link thing could be wired to the iO, what would that mean in practice?

[fossil lintel]

A jaguar only running tempest, sounds like an accurate recreation of many jaguars observed in the wild.

[silver vault]

Is it possible that one day a version of the Jaguar core will come out on the analogue pocket?

[thorny swift]

the best cat

[dense ravine]

I’m telling PepsiMan

[mental briar]

Now if I run update all, will it overwrite this new bios?

because the checksums don't match? Or does it not care about that with bioses

[desert oar]

No, Core is not in the state that the update will do anything with it

[mental briar]

update all grabs the bios though

that's how I have it

[desert oar]

Would surprise me if so

[sterile moss]

Hmm, it's not in the CSV on bios db github

[warm oasis]

You are probably getting it from the WIP database

If the new BIOS is definitely good to go I can swap that in until it makes it's way into Main

[mental briar]

Yeah I dunno where I got it. I just know I had it before I had roms in that folder. ¯_(ツ)_/¯ linux magic

[sterile moss]

It's only a few steps to convert a 64*64 BMP if someone want to make a prettier one

[fresh urchin]

Can jagnet be implemented over snac? Forget 4 friends, set real goals like finding 7 other people with misters who want to play jaguar together 🤡

[warm oasis]

SNAC not possible on Jaguar I am afraid

[fresh urchin]

Oh well, no 16 player battlesphere

[warm oasis]

Can any games actually support more than 4 players?

[fresh urchin]

Battlesphere came out long after I boxed my jaguar up, so I can’t say it works from first hand experience, but I have often wondered.

Two players per console though.

[thorny swift]

best virtual cat

[grizzled mantle]

SNAC not possible for controllers due to the pin count, but he's asking about JagLink, which at the port level is a rj11/rj45 jack, so I wonder if that might be doable? Obviously not a priority right now.

http://www.mdgames.de/jaglink.htm

To network two Jaguars together requires a 4-wire telephon rj11 cable. So the 'snac-user-io-port external hardware would only need a female telephone port'.....but I know nothing about how that would be accomplished. Just armchair'ing it.

Makes me wish I hadn't sold all three of my Jaguars. But you know, life events.

[humble bluff]

https://github.com/greyrogue/Jaguar_MiSTer/pull/4 plus some hardware should be possible, please don't bug Grey to merge.

[grizzled mantle]

Awesome work! Thanks for looking into this!

I'm fascinated by 'link cable' systems. We have support in Gameboy and GameBoy Color. We have the Zero Tolerance Link Cable Support for Genesis. I believe you can do Midi-Link support in AtariST, this will be a welcome addition if you get if working. Excited for this.

[fresh urchin]

wow, thanks for sure! Just hope people don’t report core bugs when doom crashes on them every time they try it 😆

[serene widget]

I wonder if anyone from the AtariAge forums knows about the core's progress. Or if anyone from AtariAge that are members here is aware.

[rain sierra]

It’s an enigma, John. 🙂

[serene widget]

Ayo!

[warm oasis]

So is the new BIOS working fine for everyone?

[sacred blade]

I officially propose to sell the next gen Mister as "Mr. Jaguar" in an (Atari) Jaguar case and with the Jaguar core pre-installed. The rest of the cores can be added manually like it is done on the Analogue pocket

With all Jaguar rights in the public domain we can bring back an existing piece of history

The only one we can bring back

[mental briar]

Will it run AVP?

[sacred blade]

It should

[ashen spoke]

** 𝐂𝐨𝐫𝐞 𝐃𝐞𝐯𝐞𝐥𝐨𝐩𝐞𝐫 **

Patreon - [LINK]

(this core’s developer is @tropic rock and @uncut atlas; please consider joining the MiSTer FPGA's Patreon to help support development)

** 𝐃𝐨𝐰𝐧𝐥𝐨𝐚𝐝 𝐂𝐨𝐫𝐞 **

WIP Core Downloader - [LINK]
-# ‎ ‎ ‎ ‎↳ follow instructions in link to automate downloading all work-in-progress cores

Manual Install:

• Single SDRAM - [LINK]
• Dual SDRAM - [LINK]

(Last Updated - -May 3rd, 2026)

** 𝐈𝐦𝐩𝐨𝐫𝐭𝐚𝐧𝐭 𝐈𝐧𝐟𝐨 **

Additional files for test core:

• Improved Jaguar bios - [LINK]
• Improved Jaguar CD bios - [LINK]
• Improved Memtrack bios - [LINK]
• Blank Memtrack save file - [LINK]

SNAC will not be supported by this core. We recommend getting a USB to Jaguar controller adapter.

Currently the single sdram core runs slower than the dual sdram core but the core devs are working to improve it.

If you use direct video and have issues then add the following to your mister.ini:

direct_video=0```
Here is a **pdf of all the controller overlays used by games**; add it to `//media/fat/docs/Jaguar` - **[__[LINK](<#1055574003810578503 message>)__]**

Visit this store if you want to **purchase controller overlay repros** for a more authentic experience - **[__[LINK](<https://hoskinson-industries.myshopify.com/collections/atari-jaguar-controller-inserts>)__]**

You must **source your own games and they must be .j64 for carts and .cdi for discs**; DO NOT ask about it, DO NOT ask for it, and DO NOT ask where to get it.

(thanks to @uncut atlas for the improved bios files and @warm oasis for the controller overlays pdf)

[mental briar]

I stared into the void, and temptemp stared back

also, I love these posts. they make the pins look so pretty

[ashen spoke]

do we still have to disable direct video?

[mental briar]

Not with the build you linked, but it's unclear what's in that build. I can't remember if Ash included all the recent changes that Kit did

[ashen spoke]

Pins updated. Please let me know if I need to add something. Thank you.

[rotund portal]

NothingSpecialEdition

AvP is working for me atm, but has the glitches on the character select screen.

ofc, I have no way of testing the JagLink stuff atm, I just added the code that kconger showed.

[humble bluff]

Hopefully next week I'll have my MiSTer-JagLink boards to assemble and test.

[mental briar]

DV works, No AVP. MisterKun is online

overscan is busted on DV

[rotund portal]

It's a shame the USERIO/SNAC port doesn't have more pins.

It would be entirely possible to support standard Jag controllers, but not every type.

ie. using latches / muxes, etc.

[rotund portal]

I guess an adapter could be made, which worked in conjunction with some menu settings for each controller type.

ie. Jagpad, spinner, analog, light gun, etc.

But making a "universal" adapter will be tricky.

[mental briar]

sound is a little chunky too

[rotund portal]

Might be easier to just go with a Jag to USB adapter, and keep SNAC only for JagLink + Light Gun, or something.

I'll be honest - I haven't tested any sound all week, 'cos I don't have it hooked up. lol

And the Datapath E1S won't capture sound, AFAIK.

[humble bluff]

The reflex adapt works well with the OG Jaguar controller

[mental briar]

AVP crashes after the 2nd heartbeat on this build for me ¯_(ツ)_/¯. But DV works. Should robby pin this one you think, Ash?

[rotund portal]

I think many builds will be unstable for certain games like AvP.

It's pot luck, whether it will work on anyone's particular setup.

[mental briar]

yeah totally

[rotund portal]

Must be down to very marginal stuff for SDRAM or something.

[mental briar]

I just wonder if this is the core that folks should use or if this is a test and we should be using Grey/Kit's core (for general purpose, I mean)

[rotund portal]

If it means anything at all, I'm using a DE10 (original) with this SDRAM on the primary port...

https://ultimatemister.com/product/xs-d128/

And this module on the secondary GPIO header...

Which I think is 64MB...

[mental briar]

yeah, on my retrocastle build, AVP only runs using GreyRogue's second build. (with no DV). I should test this on my misteraddons build, which was running AVP on more builds

[rotund portal]

Yep. Primary is 128MB Alliance. Secondary is 64MB Alliance.

Maybe it's best if both modules use the same brand SDRAM, but I'm not quite sure why. lol

Currently, the "data ready" signal in the core, is a logical OR from both SDRAM controllers...

assign ch1_ready = ch1a_ready || ch1b_ready;//~|ram_count[3:2];

But in theory, both controllers use the same code/logic, so both should activate ready at the same time.

ie. AFAIK, there's no "feedback" from the SDRAM as such, it either returns valid data within the specified time, or it doesn't.

Maybe it's worth trying with the CAS Latency set to 3?

localparam CAS_LATENCY         = 3'd2;     // 2 for < 100MHz, 3 for >100MHz

Because the SDRAM controller(s) are running at 106 MHz atm.

Which is a smidge above the 100 MHz, recommended for CL3.

I'll try it now anyway...

Currently takes 19 minutes per compile now. Don't ask. lol

[humble bluff]

I have two MiSTers both with 2x128 3.0 Misteraddons ram, the same build of the core shows different results on both.

[rotund portal]

Yeah, I think it will be flaky for a while, until one of us can figure out exactly why AvP fails.

Which is very hard to pin down, when running on the real FPGA, even with SnargleFlap.

(SignalTap)

[mental briar]

I can tell you on this build, on my retrocastle mister, it crashes after the 2nd hearbeat

[rotund portal]

My original 32MB (Winbond?) SDRAM module always passed test at around 150 MHz.

Some people say Alliance is the best overall.

It's not as if this core is running the SDRAM especially fast, but it's probably the marginal timings somewhere in the core itself that's causing the issues.

[mental briar]

And yet, on misteraddons (same core, same cifs mounted rom)

I hope this weirdness fills you guys with curiosity and not with dread :p

[rotund portal]

lol

More of the latter... for now.

I mean former.

[mental briar]

https://tenor.com/bjU6d.gif

[rotund portal]

I really want to work on some DC stuffs, but I'm stuck with the mathS.

If I could figure out how to reduce the logic for DC, I could get it rendering frames at far more than 3-4 FPS.

[mental briar]

DC is already solved. Coming soon™️

[rotund portal]

I say "FPS" - it's still only rendering ONE frame at a time, and from emulator VRAM dumps.

So it's basically a slideshow viewer atm.

Yeah, I heard a company called SuperSEGA has a DC "core" already.

But they require a ~€400 downpayment.

[mental briar]

yup. i'm sure we will see it any day now

[rotund portal]

The winner gets free lessons on how to park a Lambo.

[mental briar]

Ehh, I think the winner has to wear pants...that seems more like a good starting point

[rotund portal]

lol

[mental briar]

@warm oasis new bios seems fine. it's a little jumpy at the start in DV, but that's probably more a byproduct of DV than the bios. Seems fine on my non-dv display

[rotund portal]

A nice example of what a realistic project looks like...

A PCB layout that actually makes sense.

Oh, btw...

https://github.com/mamedev/mame/blob/fe971256dc6038c7a14974a1d4646534a0eccb46/src/mame/atari/jaguar.cpp#L2076

[lyric pelican]

ROM_START( area51t ) /* 68020 based, Area51 Time Warner License - MAIN: Oct 17 1996 17:15:41 / OS: 2.03CJ Oct 17 1996 17:15:01 */

[rotund portal]

After seeing the discussion about Cojag the other day, I had a peek.

Area 51 has versions for both the 68020 and R3000 board, which is super weird.

Surprisingly hard to find decent hi-res photos of both boards.

Especially of the "Dual board" type, without the riser card plugged in.

The single board seems to be the version which always has the R3000 on.

And the Dual board, with the 68020 on the riser.

Anywho, I merged the Area 51 (68020) ROMs into one file, using a bit of C code.

Shoved it into the Jag core as a BIOS, but of course it didn't do anything. lol

Thought it was worth a try.

No idea if I have the endianness correct.

None of this means much atm, I'm just messing around.

Apparently changing the CAS Latency to 3 was a terrible idea.

Now the BIOS loads, but won't even run games. lol

So it's taking just ONE clock cycle too long, and everything breaks.

Strange. The Area51t ROM has 0x4E71 as the first word.

Which is normally the Supervisor Stack Pointer.

0x4E71 is actually a NOP instruction on the 68K.

The MAME debugger confirms it has loaded that into the SP, as if it's the start-up stack pointer.

They really knew how to make ugly games back then.

[rain sierra]

https://tenor.com/view/licking-lips-nelly-tilt-ya-head-back-song-yummy-delicious-gif-21286950

My face if you get Cojag in this core

[thorny swift]

I told them

[serene widget]

Thank you. They're gonna be happy hearing the news.

[thorny swift]

If you need photos I can probably source you some

[serene widget]

Found it: https://forums.atariage.com/topic/375340-jaguar-fpga-core-gets-huge-update-almost-all-games-playable/

[rotund portal]

Cojag has quite a different memory map to the Jag.

Can' t post.

Clyde bot is being evil.

Jag...

https://github.com/mamedev/mame/blob/fe971256dc6038c7a14974a1d4646534a0eccb46/src/mame/atari/jaguar.cpp#L1100

[lyric pelican]

void jaguar_state::console_base_map(address_map &map)

[rotund portal]

CoJag 68020...

https://github.com/mamedev/mame/blob/fe971256dc6038c7a14974a1d4646534a0eccb46/src/mame/atari/jaguar.cpp#L1369

The Jag has the BIOS starting at 0xe00000.

CoJag has the "ROM" starting at 0x800000.

Almost as if it's a cart ROM, but CoJag has the 68K starting directly from that address.

ie. Rather than running a "BIOS" first, then reading the cart header before running it, etc.

In the core...

// OS ROM
assign os_rom_ce_n = xromcsl[0];

// CART
assign cart_ce_n = xromcsl[1];

// TOM.NET (234) - romcs[0-1] : b2
assign xromcsl[1:0] = romcsl[1:0];

Not sure how that works, because logically, the Tom chip decides where stuff is read from.

But maybe some external logic on the Cojag board changes where the ROM gets mapped?

oic, they probably just hook up a different Chip Select from Tom to the ROM chip(s).

assign rom[1] = ~(mset & romlo & (ab[23:21]==3'b000) & notdev); // 000000-0FFFFF / 120000-1FFFFF romlo
assign rom[2] = ~(mset & romhi & (ab[23:21]==3'b111) & notdev); // E00000-EFFFFF / F20000-FFFFFF romhi
assign rom[3] = ~(mset & romlo & (ab[23:21]==3'b001)); // 200000-3FFFFF romlo
assign rom[4] = ~(mset & romhi & (ab[23:21]==3'b110)); // C00000-DFFFFF romhi
assign rom[5] = ~(mset & romlo & (ab[23:22]==2'b01)); // 400000-7FFFFF romlo
assign rom[6] = ~(mset & romhi & (ab[23:22]==2'b10)); // 800000-BFFFFF romhi
assign rom[7] = ~(notmset & notdev);
assign from = ~(&rom[7:1]); // cart or bios
assign romcsl_0 = (&rom[2:1]) & rom[7]; // bios

[thorny swift]

68K just doing POST? CoJag could use HDD and other shit; maybe that’s just init?

I’m using Konami logic though and how they booted their 3D boards

[rotund portal]

Found some schematics for Area 51, but lots of pages missing.

[rotund portal]

I'm wondering if a Cojag ROM like Area 51 will show anything at all on-screen, if I can get it to map to the right place.

I can see in MAME where it's supposed to do the first jump.

[thorny swift]

Probably. I’ve gotten 3DO M2 console games to show some signs of life on arcade hardware. Quick failure but it’s better than black screen

[rotund portal]

It doesn't appear to have a separate "BIOS" as such, as it's not necessary for an arcade board.

Looks like Cojag just blindly runs the 68K code direct from ROM.

Even the smallest hint of on-screen stuff would be interesting.

Oh, that schematic was just for the upgrade kit thingy.

[thorny swift]

I’ve never seen a bios

Like a separate arcade specific bios

[rotund portal]

Yep, just the four ROM chips on the board usually.

8-bit wide, so needs four ROMs to make the 32-bit word.

(bytes are interleaved, so I had to merge them with some C code.)

Trying to figure out how the Tom chip maps stuff, using only the two ROMCSL outputs.

assign rom[6] = ~(mset & romhi & (ab[23:22]==2'b10)); // 800000-BFFFFF romhi
assign from = ~(&rom[7:1]); // cart or bios
assign romcsl_0 = (&rom[2:1]) & rom[7]; // bios

'cos the Cojag ROM thingy needs to get mapped to 0x800000, according to the MAME code / debugger.

OK, yep. ROMCSL0 on Tom goes to the BIOS socket.

And ROMCSL1 to the Cart slot.

(pin A20)

I tried loading Area51 as both a "BIOS" and Cart ROM, but I didn't have the 68K Addr and Data busses added to SignalTap.

So hard to tell if it's doing anything at all.

This is something that would be far easier to test in the sim, but I need to fix that as well first.

This is the trace file from the MAME debugger, as Area 51 (68k) first boots.

It should jump to there first, or actually to 81CB06.

(first instruction isn't shown in the trace, because MAME jumps there before it even brings up the debugger window.)

The 68K reads the Program Counter from the second word in the ROM.

The first word is the SSP (Supervisor Stack Pointer).

Which seems to be set using a couple of instructions for some reason, but later gets set to the correct SSP value.

(probably in case the game crashes and tries to read an instruction at offset 0, it will force it to jump to some "safe" code?)

[thorny swift]

So yeah If address and data lines are hooked up and you read from the proper address you should be able to confirm if there’s any signs of life or if it’s just black screening

[rotund portal]

Yep. Another compile needed, so I can see more of what the 68K is doing.

[warm oasis]

I asked this the other day but don't think anyone responded, are these Co Jag games out in the wild and in Mame? Might be worth grabbing if they are and you are digging into that.

4 unreleased prototypes exist:

Fishin' Frenzy
Freeze
Vicious Circle
3 on 3 Basketball

[thorny swift]

Even if you just see garbage or a few frames of POST sequence you’d at least know it’s feasible to work forward on

[thorny swift]

Ignore me I’m stupid

[rotund portal]

On first glance, I thought maybe Cojag (68K or R3K) had an Analog Devices sound chip.

But it looks not.

[thorny swift]

Sorry vicious circle is

[rotund portal]

Looks like the Altera CPLD is probably just for the IDE interface and some JAMMA stuffs.

(the SDT chip above the IDE port is the R3000 on that photo.)

Would be ideal if the schematics are out there for any Cojag board.

Even better if it's the 68K version, which seems to have no "CPU" on the main board, only on the riser board.

[warm oasis]

Is that the only one?

[thorny swift]

I had to check

[rotund portal]

Then again, I suppose I just have to map the Area 51 ROM at the right place after reset.

[thorny swift]

Vicious circle and fishing frenzy exist. I’ve played vicious circle on the channel

[rotund portal]

Jag...

$800000  +------------------------+ 
         |                        |
         |          ROM           |
         |                        | $DFFFFF
$E00000  +------------------------+
         |       BOOT-(EP)ROM     | $E1FFFF

The Jag will supposedly boot from the BIOS at 0xE00000 after reset.

[thorny swift]

@rotund portal well we at least know this

https://m.youtube.com/watch?v=JaBJRncqY_M

[rotund portal]

The CoJag ROM needs to be mapped at 0x800000, since that's where it's code was compiled for.

[thorny swift]

Someone must have just changed the instructions specific to the 68020 and redone it for the 68000

[broken hound]

I am just getting some crazy flickering using my dual ram MiSTer. Am I doing it wrong?

[thorny swift]

Or shit who knows maybe it wasn’t even using the extra bits and pieces of the 020 series

[rotund portal]

I can't figure out how stuff would get mapped after reset, and also have the correct addresses, erm, something.

[rotund portal]

Is that captured from HDMI or kind of from a Direct Video thingy?

[broken hound]

It is from HDMI, direct_video=0 in .ini

[rotund portal]

It's possible they're not using much of the 020 stuff. I mean, obviously the data bus is 32-bit, but it might do something without needing that.

[thorny swift]

Sadly modded didn’t really document much from what I can see. Or even finish it

[rotund portal]

I remember the 010 didn't add too much, aside from a slightly more secure Supervisor mode.

I don't think 020 adds a whole lot more, tbh.

[rotund portal]

Not sure, unfortunately. I've not really seen that kind of flicker so far.

Which version of the RBF were you using?

[broken hound]

I tried the two most recent ones from test-builds channel.

[rotund portal]

Which capture card?

It might be something to do with the tweaks done for Direct Video, even though you're not using DV as such.

[broken hound]

THe sound is perfect. Hmm.

Oh I found the problem. I had the core set to PAL, instead of NTSC!

Now it is perfect with NTSC setting.

Awesome!

I am playing Tempest 2000!

[rain sierra]

Now you need a Jag spinner controller

[broken hound]

OMG

Why.

I guess you are right 🙂, none of my other controllers has enough buttons etc.

[rotund portal]

Area 51 thing, 68K trying to run some code. But...

I just remembered, the BIOS gets loaded into on-chip mem on the FPGA.

Which is only 128KB, enough to fit the Jaaaaaaaag BIOS.

The Area 51 ROM (once merged from four separate ROMs) is 2 Megabitings.

So it's quite likely that will just be overwriting the 128KB multiple times, corrupting the start of the code.

I'll try trimming the file for now, to see what happens.

Anything but having to do another 17+ minute compile again.

(there's only around 700KB of on-chip mem on the DE10 Cyc V, so no way to fit the entire ROM.)

I already tried adding an OSD option to swap the BIOS and Cart ROM memory ranges, but that didn't work at all. lol

Again, don't anyone build their hopes up. I'm just playing around atm.

[thorny swift]

I hope this is a Jeremy Clarkson reference

[thorny swift]

Nobody get their hopes up if you make it work 🤣 games aren’t great

[rotund portal]

Exactly.

Would be different if it had a library of more good games.

Don't get me wrong, I'd love to see all kinds of weird arcade stuff running on a core.

But you have to wonder which stuff is worth the effort. lol

[thorny swift]

Oh me too. Thats my wheelhouse haha

Both released games got ports so

[rotund portal]

Correct data showing up in places, but still doesn't look right.

0x4E71 is the first word in the ROM.

[warm oasis]

Out of interest, how much do co Jag boards sell for? They silly expensive or alright priced?

[rotund portal]

Oh, hang on...

[thorny swift]

They aren’t that expensive

[rotund portal]

It's like it's only selecting the lower byte each time.

[thorny swift]

$350 working right now for Area 51

You want me to make an offer @rotund portal if I can get it I can get you all the high res shots and data you need

[rotund portal]

I appreciate the offer, but I'm not sure how much the real board would tell us.

Because the Tom and Jerry chips are probably the same as on the Jag.

So it must be hooking up some chip selects differently.

I'm also saving for a holiday atm, so don't have much money. lol

[thorny swift]

Yeah they are the same

[rotund portal]

Thanks, though.

[thorny swift]

Haha no I meant I’d just buy it. If you needed data I’ll grab it. Then I’ll sell it later. Shit with a solid state mod and a cleaning id probably make money haha

I’m just offering to pick it up if it helps the “community”

[warm oasis]

Maybe someone can convince JT to send the Jaguar hardware he was gifted (including a Jag CD) when he claimed he was going to make a core to GreyRogue 😉

[rotund portal]

Dude, that would be amazing. But I genuinely don't know if I'd be the best person to make use of it.

[thorny swift]

I’ll put an offer in and see

[rotund portal]

I have serious burnout atm, which is why I'm messing with core stuffs.

oic, the Tom chip is handling the address bus stuff at boot.

And the BIOS chip on the Jag is only 8-bit wide, so Tom has to read in a pair of bytes at a time.

[thorny swift]

Offer in. If I get it I’ll do the legwork on signals. Arcade PCB research is where I really shine haha

[rotund portal]

It's possible I just have the endianess of the ROM wrong, even though the 68K is supposedly Big Endian. Not sure if the 020 supports both?

Dayum.

Mr Bacon, I hope you can make money back on it after. 😉

btw, is that an R3000 or 68020 version board?

Oooh, it really is reading the data correctly, or at least the initial Program Counter, then jumping to that address.