Atari Jaguar

[rotund portal]

Yep, I think the BIOS boot code sets it. Can't remember if the header also says whether it wants 16-bit or 32-bit access?

assign siz[1:0] =
    (aen) ? xsiz_out[1:0]
    : (j_aen) ? j_xsiz_out[1:0]
    : {fx68k_uds_n, fx68k_lds_n};

[uncut atlas]

that explains why a lot of homebrew doesnt work

[rotund portal]

It has the siz thing, but I think that's for the main bus accesses, not cart.

Plus homebrew tends to have the different boot point.

But IIRC, the BIOS code does handle that, by reading the cart header.

[uncut atlas]

why does that matter?

[rotund portal]

Just not the cart bus width thing.

Because I can't remember half of this. lol

[uncut atlas]

yeah but the cart bus matters because the data has a different word size that I dont think we account for

[tropic rock]

Tom handles it

[uncut atlas]

how?

we give it an address we're fetching data in the wrong spot?

[rotund portal]

OK, yeah, if that's in the cart header, then could probably improve the logic for that.

[tropic rock]

It uses dmuxu and down to swap bytes

[rotund portal]

https://github.com/greyrogue/Jaguar_MiSTer/blob/1956404614ca5c68e16e9eabe3d78b93ed180481/Jaguar.sv#L631

[uncut atlas]

right that's 32 bit words

[tropic rock]

https://github.com/Torlus/JagNetlists/blob/e13d5120cdf3f0e5b3d9e865b331a3a4f692cd38/netlists/tom/DBUS.NET#L28

[lyric pelican]

dmuxd[0..2],	moves high order long,word,byte down for writes to narrow

[rotund portal]

Also ignorring all the other stuff atm...

    //.cart_oe_n( cart_oe_n ) ,    // output [1:0] cart_oe_n
    .cart_ce_n( cart_ce_n ) ,    // output  cart_ce_n
    .cart_q( cart_q ) ,            // input [31:0] cart_q
    //.cart_oe( cart_oe ) ,        // input [1:0] cart_oe

[uncut atlas]

but isn't the address in ddr3 that we put the data wrong?

maybe im just derping

because we're loading 8 bit words

or 16

[tropic rock]

Tom mangles the addresses and data as necessary based on the config registers

[rotund portal]

// Jag DRAM is now mapped at 0x30000000 in DDR on MiSTer, hence the setting of the upper bits here.
// The cart ROM is loaded at 0x30800000, as the Jag normally expects the cart to be mapped at offset 0x800000.
// DRAM address is using "abus_out" here (byte address, so three LSB bits are ignored!)
// so the MSB bit [23] will be set by the Jag core when reading the cart at 0x800000. TODO - confirm this is always the case!
assign DDRAM_ADDR = (loader_en)  ? {8'b0110000, loader_addr[23:3]} : {8'b0110000, abus_out[23:3]}; 
assign DDRAM_RD = (loader_en) ? 1'b0 : cart_rd_trig;
assign DDRAM_WE = (loader_en) ? loader_wr : 1'b0;

[uncut atlas]

ok

then it should be fine I guess

something else is broken with them

[rotund portal]

I'll be honest - I'm never quite sure where to load stuff in DDR. Just "anywhere that doesn't stomp on Linux nor ASCAL."

[uncut atlas]

there's a specific address where cores start

[rotund portal]

oh.

[uncut atlas]

you can find it in other ddr3 using cores

[rotund portal]

So that is the BYTE address in those notes, so around 800MB (offset) in DDR.

Cart ROMs are written to DDR as 16-bit chonks.

So just have to worry about how stuff is being read, for 16-bit vs 32-bit cart mode.

It might have even been 16-bit originally, but I tweaked to 32-bit, since that's what most (all?) commerical games use.

Oh yep - BIOS read as 8-bit.

wire [16:0] os_rom_addr = (os_download) ? {ioctl_addr[16:1],os_lsb} : abus_out[16:0];

// For writes from ioctl to OS (BIOS) RAM/ROM thingy...
wire [7:0] os_rom_din = (!os_lsb) ? ioctl_data[7:0] : ioctl_data[15:8];

// For reads from OS (BIOS) RAM/ROM thingy, to the core...
assign os_rom_q = (abus_out[16:0]==17'h0136E && status[2]) ? 8'h60 : os_rom_dout; // Patch the BEQ instruction to a BRA, to skip the cart checksum fail.

No idea if it's always read as 8-bit, but I think the chip itself is?

[uncut atlas]

well what grey is saying is tom automagically fixes the addressing and masking

[rotund portal]

No sure.

[uncut atlas]

the bottom three bits are siz

[rotund portal]

I seem to recall it always accessing the cart as 16-bit, so might have to implement that to get more homebrew working?

I mean, the old-old core.

[uncut atlas]

im not sure why

[rotund portal]

I could be wrong, it was a long time ago now.

[tropic rock]

You can see in the code the bottom three address bits are specially handled

[rotund portal]

Just have quite strong deja vu, about changing to reading carts as 32-bit wide, and more stuff started working?

But possibly killed homebrew. lol

[tropic rock]

https://github.com/Torlus/JagNetlists/blob/e13d5120cdf3f0e5b3d9e865b331a3a4f692cd38/netlists/tom/TOM.NET#L313

[lyric pelican]

Gpu := 	GRAPHICS (maska[0..2],aout[3..15],dout[0..31],ack,bback,

[tropic rock]

for example

maska is the bottom three bits

That was my understanding of the code at least

[rotund portal]

True, it may be OK as-is, and something else is stopping some homebrew from working?

assign cart_q = (!abus_out[2]) ? DDRAM_DOUT[63:32] : DDRAM_DOUT[31:00];

[uncut atlas]

btw grey I think the eeprom mem isnt being inferred right so switching it to explicitly defined bram and figuring out why it thinks it's async might help timing some

and we need to make it dp anyway to do saves

[rotund portal]

'cos presumably, if carts are accessed as 16-bit wide, it just won't increment the lower bits of abus_out as fast?

EDIT: And Tom then figures out the correct data bus shifts etc.?

[tropic rock]

You were doing look ahead. You might have grabbed the wrong one

Pre-mangled

[rotund portal]

Wow, that's rough... Sorry. lol...

wire cart_rd_trig = !cart_ce_n && (cart_ce_n_falling || (abus_out != old_abus_out));

always @(posedge clk_sys)
if (reset) begin
    xwaitl_latch <= 1'b1; // De-assert on reset!
    old_abus_out <= 24'h112233;
end else begin
    cart_ce_n_1 <= cart_ce_n;
    old_abus_out <= abus_out;

    if (cart_rd_trig) begin
        xwaitl_latch <= 1'b0; // Assert this (low) until the Cart data is ready.
    end else if (DDRAM_DOUT_READY)
        xwaitl_latch <= 1'b1; // De-assert, to let the core know.
end

ie. checking to see if the abus addr has changed, in order to trigger a cart read.

[uncut atlas]

xwaitl of course is not used by the real system

[tropic rock]

I should check that

[uncut atlas]

maybe for jagcd, i dunno

[rotund portal]

Would be better if we could find a more specific signal, yeah.

I think that may have been also part of the "I want to save some clock cycles" effort.

[uncut atlas]

yeah actually that read logic is terrible

[tropic rock]

yeah

[rotund portal]

lol

Definitely was mine.

[tropic rock]

I was commenting on the save some cycles comment

[rotund portal]

Could try ditching the (abus_out != old_abus_out) part maybe?

Eww.

wire cart_ce_n_falling = (cart_ce_n_1 && !cart_ce_n);

[uncut atlas]

does the system do cart_ce pulled low and just swap address? there must be better than that

[rotund portal]

Not sure.

[tropic rock]

I havent looked closely at the cart logic. I concentrated on the ram

[rotund portal]

In jaguar.v, line 739...

// CART
/*
assign cart_a[23:0] = {abus[23:3], xmaska[2:0]};
*/
assign cart_ce_n = xromcsl[1];
assign cart_oe_n[0] = xoel[0];
assign cart_oe_n[1] = xoel[1];

[uncut atlas]

using the abus like that which is a massive combination chain to begin with isnt great

[tropic rock]

https://github.com/Torlus/JagNetlists/blob/e13d5120cdf3f0e5b3d9e865b331a3a4f692cd38/netlists/tom/MEM.NET#L217

[lyric pelican]

*************** ROM **********************

[rotund portal]

Were those netlists always that horrible to read? 😛

Looks like an ancient Lovechild, of VHDL and ABEL.

[tropic rock]

Those are the comments. The code is worse

[rotund portal]

lol

oic, state machine comments stuffs.

Right, gonna have a rest soon.

Bit of a stresfull day...

Cat had to be taken to the vet.

She was coughing and choking most of yesterday.

Got a message, thinking she had "glass" in her throat.

It was lost-in-translation, and turned out it was "grass".

But all removed now, and she's recovering from the anesthetic, so she's all dopey and walking into things.

I'll have a play with the new Jag core in the next few days.

Which is a sentence I didn't think I'd be saying this week. lol

[tropic rock]

Hope you get a build that works for you. It is quite finicky

[thorny swift]

thats a hell of a lot better than glass! Glad kitty is ok!

[fallow salmon]

btw if it helps with getting builds to work more reliably consider stripping the scandoubler and gamma features

[uncut atlas]

yeah

the scandoubler is actually not too helpful with these clocks

and not analog

[sudden palm]

this one works ok for me, AvP launches correctly

maybe it will work properly for someone too

[mental briar]

is this based on the latest build with kitrinx's stuff? (#1055574003810578503 message)

and, most importantly, can we play shut up and jam yet 😄

[sudden palm]

based on the latest available code on github

[vague whale]

Getting a black screen with that one too, same as the previously posted dualram build

[warm oasis]

Should people be reporting what ram revisions they have, or should that not be an issue with whether a build works for them or not?

[urban mango]

Same here

[mental briar]

This is potentially a very silly question but will the core even boot on single ram?

[dusk slate]

It does not. My crazy ass already tried.

[dense ravine]

lol single ram peasants

(I am one)

[mental briar]

They laughed when I bought a dual ram setup. WHO’S LAUGHING NOW?!

[dusk slate]

arnrh and I are laughing! ||As we cry ourselves to sleep at night...||

[warm oasis]

People asking about a potential single RAM build, it doesn't sound like it will ever be possible with anything close to full compatibility based on what has been said in the chat in the past few days.

[mental briar]

Gonna be an interesting next few months. If dual ram becomes a real thing, you wonder if that alters dev and accessory priorities. I dunno if jaguar and 5 (or whatever) Saturn fighting games does that…. But are there “nice to have” features in existing cores that could happen with dual ram?

Never a dull moment

[glad flame]

The dual RAM was going to be unavoidable. Developers were eventually going to hit a brick wall with the DE-10 NANO, and need that extra RAM for the more complex systems.

[mental briar]

It's going to be interesting. Things that feel like novelties (direct video maybe?) are going to potentially be more emphasized - are there optimations to be made there.

And yeah like existing cores - can we add stuff to existing cores if dual ram becomes more standard.

[lucid oak]

Hey, i was looking up the direct video thing, found this in jaguar.v

// 15 KHz (native) output...
assign vga_r = xr[7:0];
assign vga_g = xg[7:0];
assign vga_b = xb[7:0];

// assign vga_hs_n = (hc>=16'd40 && hc<=16'd120);
// assign vga_vs_n = (vc < 2);

do you guys think that maybe the problem is that those assign vga_hs_n and vs_n are commented out?

i noted that it is not in earlier commits, like 2021

i would try to build it, but need to setup my pc

[warm oasis]

Dual ram is only useful in very specific situations, for specific systems. Jaguar and Saturn are the only two we have come across that are doable on the DE-10 Nano but need that extra ram to run everything

[fallow salmon]

if dual ram had been needed for PSX it'd be the default by far by now but... it wasn't

[warm oasis]

If you look at the 486 core, that is one that is out of space on the core, but doesn't even require a single ram stick

[sacred blade]

And Saturn only for 3 to 4 hi-res fighting games up until now: Dead or Alive, Virtua Fighter Megamix, Fighting Vipers, Last Bronx (?) AFAIR

[mental briar]

yeah, and grandia's texture flickering is fixed on dual ram. I'm not saying that that + Jaguar is enough for people to abandon the VGA port...But obviously some people will (let he is who able to resist cybermorph's siren song cast the first stone). And is that enough for devs and accessory makers to start thinking about dual ram systems more seriously?

[verbal grail]

Nice find. Hopefully that gets direct video working.

[lucid oak]

i'm trying to compile it, lets see how it goes

[mild karma]

just a note for others having trouble with AvP….I had to load it like half a dozen times before it finally worked

I’ll try kuba’s build later to see if it gives better results for me

[mild karma]

it’s possible another factor in getting it to work right was loading a different game first and then loading AvP…

[lucid oak]

didnt work :/

[mental briar]

thanks for trying 🙂

[verbal grail]

Oh shoot. Thanks for trying.

[warm oasis]

When people say direct video isn't working, does this mean that it isn't working with Tink 4K and Morph scalers?

[verbal grail]

Yes and on crt. There’s no analog video information displayed in the MiSTer menu either.

[mental briar]

I believe sonic has it hooked up on a CRT

[lucid oak]

yeah, i have

i tested the signals with an osciloscope, V sync and H sync pins are the same signal, this is probably the problem

now, why this is happening...

wait, i'm fucking stupid

i think i altered the wrong file

let me try to compile it again lol

[mental briar]

happy accidents

[humble trail]

lmao i look away for a few days and people are working on jag again?!

[mental briar]

It's wild how much shit works now

You TOO could play cybermorph

assuming you have the contitution (and RAM) for it

[humble trail]

i absolutely do not, on either score 😂

[ashen spoke]

Crossing my fingers for SNAC support otherwise I am a silly man for buying an Atari Jaguar controller

[mental briar]

Porkchop better be in the lab right now

[sudden palm]

https://tenor.com/view/leonardo-leonardo-dicaprio-django-unchained-meme-gif-18513725

[mental briar]

Reading Kit, Grey, and Ash's back and forth about the system, it would not surprise me if the controller used puffs of air to communicate inputs to the port

[dense ravine]

Magic smoke signals

[ashen spoke]

I have to check if I got a Jaguar SNAC cable from MisterAddons

I probably did knowing me

[glad flame]

All the inputs are actually controlled by a tiny jaguar. Sometimes the jaguar can be fussy though, so please understand.

[ashen spoke]

Because I BELEIVE

[dense ravine]

Believe in Virtual Boy

[mental briar]

It's just a small person sitting in there yelling "LEFT" "UP" "B" "B" "NINE"

[ashen spoke]

I have TWO VB SNAC cables!

[dense ravine]

Willing it into existence!

[dusk slate]

Time for Robby to buy a bunch of 3DO accessories!

[dense ravine]

There are probably aren’t any left because @thorny swift is hoarding them all

[dusk slate]

He can sell some to Robby so that Robby can use his powers!

Awbacon is powerless of course. Too much VT cheese.

[thorny swift]

lol that’s M2 I hoard 🤣

[dense ravine]

M2, 3DO, same shit different name. Neither had any decent games 😉

[thorny swift]

Fighting words!

[mental briar]

Kubuki Warriors would like to chat with you

on the playground

after school

[thorny swift]

@blissful onyx was here two weeks ago and held a few rare M2 units in his hand

I didn’t even make him wear white gloves haha

[dense ravine]

Is that what you call it?

“Wanna hold my rare M2 unit?”

[thorny swift]

😂

[dusk slate]

We were comrades!

[dense ravine]

I’d actually be excited by a 3DO core tbh

[mental briar]

same

[thorny swift]

I’ve always got spare M2s for the first person I trust who wants to try a core (on some future hardware)

[mental briar]

but we cannot ask for two much. santa atari brought us the jaguar this year. maybe if we are good, the hawkins bunny will bring us 3DO next year

[dusk slate]

He's too busy hawkin little green army men.

[thorny swift]

There’s the little donor bastard. Waiting for someone to want to take a shot

Only diff between arcade and console is extra ram and IO is on diff pins. Otherwise near 1:1.

[dense ravine]

Is there a decent software emu for it?

[blissful onyx]

and now my prints are all over em

damnit

[mental briar]

D was an M2 game, yeah? I seem to remember previews for that in Ultra Game Players

[thorny swift]

MAME runs four of five games. One runs well

[dusk slate]

D2!

[mental briar]

Oh shit, it was D2?

Right, D was on PSX

[thorny swift]

I’ll have a vid tomorrow am actually. Something in MAME .271 made Total Vice basically full speed. No notes on the M2 driver so it must be an improvement to something PowerPC related in an adjacent platform

[mental briar]

I remember the box now

[dense ravine]

Also on Dreamcast, right?

[thorny swift]

https://www.eurogamer.net/collector-unearths-playable-file-for-original-cancelled-d2-the-video-game-thought-lost-to-history

[warm oasis]

SNAC isn't doable sadly, I asked Blue about this a couple of weeks ago here

[thorny swift]

I found and released the last known “playable” piece of it

[dusk slate]

Original D2 on M2. Final version (different game) on Dreamcast.

[thorny swift]

Ok but we’re way off topic 🤣

[dense ravine]

I’ll move over there and at @dusk slate

[thorny swift]

There back on track

[mental briar]

It's because there is a little man in there yelling at a little jaguar on the other end of the port, isn't it?

the magic is ruined

[ashen spoke]

Ok crisis averted!

[dense ravine]

Damn, Porkchop has a solution for everything!

[warm oasis]

Is this a USB adaptor solution?

[dusk slate]

He has the solution to curing my single ram peasant setup on the way.

[thorny swift]

Yeah Reflex Adapt. He basically has an adapter for whatever you want to plug in

[ashen spoke]

Yeah, it’s his Reflex adapter.

[warm oasis]

Nice

[dense ravine]

Shillin’ ain’t easy

But it seems like such a cool solution

[dusk slate]

I have the extra cool glow in the dark version. 😎

[ashen spoke]

Yeah it came off like I was shilling lmao. I bought all of that with my own money though!

[thorny swift]

I get accused of shilling in videos. I wish someone would finally pay me my shill fees

[dense ravine]

If I weren’t such a cheapskate and unwilling to pay for the international shipping, I’d have so many of his products

Well shipping + customs fees etc

[fickle folio]

1 Jaguar or Virtual Boy adapter sold = same happiness as 10 Genesis/NES/SNES adapters sold.

Wait, I can get people to shill for me???

[thorny swift]

Yes. Admit Escape from NY is better than Big Trouble in Little China and I’ll shill for you

[fickle folio]

I can't! I tried watching it again recently and it didn't stick.

I have to be true to my roots!

[thorny swift]

“MiSTer Addons products do everything. They cured my cataracts and I prayed to Reflex and was gifted infinite wealth” 🤣

[mild karma]

is it just me, or does the bios music after the jaguar roar just feel out of place 😅

like it doesn't match the vibe

[ashen spoke]

The jaunty little song?

[tranquil cape]

lol - it's like "Look how cool and edgy we are! - Nah, we're silly af"

a testament to the typical Jaguar experience

[mild karma]

yes, @tranquil cape described it perfectly

[lucid oak]

the thing with direct video seems to be here, in vid.v

always @(posedge sys_clk)
begin
    if (~old_clk && clk) begin
        vblank <= ((vbbeq & ~vblank) | (~vbeeq & vblank)) & vresl;
        hblank <= ((hbbeq & ~hblank) | (~hbeeq & hblank)) & vresl;
        hs <= ((hseq & ~hs) | (~hpeq & hs)) & vresl;
        vvs <= ((vseq & ~vvs) | (~vpeq & vvs)) & vresl;
        hvs <= ((hvstart & ~hvs) | (~hvse & hvs)) & vresl;
        ves <= ((vebeq & ~ves) | (~veeeq & ves)) & vresl;
        hes <= ((hestart & ~hes) | (~heqe & hes)) & vresl;
    end
end
assign notvblank = ~vblank;
assign nothblank = ~hblank;
assign noths_obuf = ~hs;
assign notvvs = ~vvs;
assign nothvs = ~hvs;
assign notves = ~ves;
assign nothes = ~hes;

// VID.NET (290) - blank : nd2
assign blank = ~(notvblank & nothblank);

// VID.NET (305) - hvstart : an2
assign hvstart = hvsb & vvs;

assign vsync_out = hvs;
assign hsync_out = hes;

i think hes and hvs are being generated in a wrong way, i don't know

[mental briar]

Escape from New York better than big trouble little china? We have strayed too far from the light

[lucid oak]

if anyone wants to take a look, i'll be only able to look at this again tomorrow

[thorny swift]

10/10 people agree with me

[mental briar]

This is a silly argument. Everything lives in the basement of The Thing's penthouse

https://tenor.com/fYhuCPJSBB6.gif

https://tenor.com/btYp6.gif

[thorny swift]

Escape from NY, The Thing, They Live, Big Trouble. That’s the proper order

[mental briar]

Where did I put my unsubscribe button

[thorny swift]

In your butt

[mental briar]

how dare u

[thorny swift]

🤣

[frosty pike]

How do I see pins on the discord app now.....

Its in settings!????

Its....not a setting

[frosty pike]

So... do i buy Jag controllers?

[mellow wind]

Is the Jag core only dual ram?

[mental briar]

yeah

[mellow wind]

gah

[mental briar]

As it turns out, one stick of ram can only hold 32 bits

need both

[mellow wind]

vadernoo.gif

[mental briar]

just mafs

[serene widget]

Well, the math ain't mathin'!

[uncut atlas]

hey give this a shot, it's faster and a little more robust

esp with cpu turbo on

there's still some instability starting games for some misters

[mild karma]

will test soon! wish I would’ve checked here a half hour ago cause I was just streaming some Jaguar

honestly, mostly everything I’ve thrown at it seemed to work pretty well…even tried a couple homebrews without issue

tried with AvP first and it didn't load on first boot...GreyRogue's second core from yesterday still seems to be the only one that reliably loads that game for me at least

Wow, yeah, tried Doom so far and it's noticeably smoother

huh, all the Rayman save slots say "Error" on this build

second attempt on AvP...sound but no video

Trevor McFur also doesn't want to load for me on this build

but everything I did try that runs definitely runs smoother, hell yeah!

[rotund portal]

Looks like the core still gets Hsync and Vsync direct from Tom anyway.

So that old code can be ditched.

The code looks very much like something I added, when I was messing with trying to get the image centered on a CRT at the time.

And that was before it was even using the correct clock freqs for the core.

https://github.com/greyrogue/Jaguar_MiSTer/blob/1956404614ca5c68e16e9eabe3d78b93ed180481/rtl/jaguar/jaguar.v#L1153

It gets Hsync and Vsync direct from the Tom chip.

This can probably be ditched, too...

(*keep*) wire my_h_de = (hc>=252) && (hc<=1661);
(*keep*) wire my_v_de = (vc>2+17) && (vc<240+2+17);
// assign hblank = !my_h_de;
// assign vblank = !my_v_de;

I've not done much work with Direct Video before, besides testing various adapters.

It doesn't sound like fun, getting a "new" core running with DV. lol

In theory, it is just outputting the native video from the core via HDMI, but it also involves things like pixel repetition.

(because the HDMI spec says it can't have a pixel clock of below about 25 MHz. So if you want to use lower than that, you have to duplicate each pixel twice, or three times, etc.)

The ADV7513 HDMI chip on the DE10 can handle auto pixel rep. I'm just not sure if DV is set up to use that, or if it's done on the FPGA side.

You likely also need to get the "DE" (Data Enable) signal timings just right, so the image fits the frame correctly, and doesn't do weird stuff for cores that use interlaced output etc.

The code snippet above looks like my very rough attempt at generating DE / blanking, when testing on a CRT a long time ago.

(this was also when the counter for hc was using a higher clock multiple, hence why the check for hc<=1661 is such a high number.)

btw, Big Trouble > Escape from NY, any day of the week. 😉

Both movies are classics, but Big Trouble still holds up. Last time I watched it, I forgot how good/fun it was.

But... The Thing (1982) will always be king. lol

Oh, and to be clear - I haven't done any work on the Jag core in about two years. lol

This was all Grey and Kitrinx' work on the new release.

[uncut atlas]

that's interesting, I bet I know what that is

[rotund portal]

I was just looking at trying to get the core running under a Verilator sim again.

But it has SO many altsyncram blocks to take care of.

oic

`ifdef SIMULATION

Kind of worked / compiled.

But a fair few warnings about multidriven signals, which might help fix a few things?

Verilator is quite handy to run code through, as it tends to pick up problems in a way that Quartus might not.

[grizzled bloom]

There’s a jaguar usb adaptor at 2600daptor

Whoops didn’t realize you had a reflex already

[fickle folio]

Reflex for life!

[rotund portal]

Trying to compile the sim on MSVC, but it kinda gets stuck at the end.

"Previous IPDB not found, fall back to full compilation"

It could just be that it's a very complex core, and takes ages to compile. lol

I also disabled all of the VCD tracing stuff.

Boo!

Crashed, when trying to update the texture for the video display thingy.

Fair enough.

BIOS ROM file loaded OK.
Assertion failed: (g.CurrentWindowStack.Size > 1) && "Calling End() too many times!", file C:\linux_temp\imgui\imgui.cpp, line 7352

Finally

Still crashes atm, due to difference between Verilator 4 and Verilator 5.

[warm oasis]

Has anyone been able to confirm that two player is working as expected?

[rotund portal]

fx68k stuffs missing.

$readmemb("nanorom.mem", nRam);

[rotund portal]

Needs some more work, to figure out if it's even booting.

I just wanted to get the template sim project up-and-running again.

Oh, great. I'll have to add all of the DRAM "emulation" stuff.

reg [9:0] ras_latch;
reg old_cas_n;

wire dram_cas_edge = old_cas_n && ~dram_cas_n;

wire [19:0] dram_addr = {ras_latch, dram_a};//abus_out[22:3];//{ras_latch, dram_a};

[urban mango]

P2 controls did not seem correct - tried T2K duel mode and sensi soccer

[warm oasis]

Thanks for checking, sounds like one Kitrinx and/or Greyrogue will have to dig into under the hood

[rotund portal]

https://github.com/greyrogue/Jaguar_MiSTer/blob/master/rtl/jag_controller_mux.v

https://github.com/greyrogue/Jaguar_MiSTer/blob/master/rtl/jaguar/jaguar.v#L583

    .mouse_ena_1( status[6:5]==1 ) ,
    .mouse_ena_2( status[6:5]==2 )

    "O56,Mouse,Disabled,JoyPort1,JoyPort2;",

Make sure the mouse option is disabled.

I haven't spotted any obvious issue otherwise, but it's a bit complex on the Jag.

It took some figuring out, just to get more buttons for P1 working. lol

I wrote the controller mux thing ages ago...

https://github.com/ElectronAsh/Jaguar_MiSTer_new/blob/master/jag_controller_mux.v

But I don't recall if I even tried a two-player game at the time.

I think Kitrinx said last night, that some of the joystick stuff was tweaked, as I had some bits wrong.

Trying to remember how that even works...

always @(posedge sys_clk) begin
    u374_clk_prev <= j_xjoy_in[2];
    if (~u374_clk_prev & j_xjoy_in[2]) begin
        // $display("JOY LATCH %x", dbus[0:7]);
        u374_reg[7:0] <= dbus[7:0];
    end
end

assign joy_bus[7:0] = (~j_xjoy_in[0]) ? joy[7:0] :         // j_xjoy_in[0]. Output enables the 16 joystick input pins onto the bus. (lower byte).
    (~j_xjoy_in[1]) ? b[7:0] :             // j_xjoy_in[1]. Active low output enables the four button inputs onto the data bus.
                                                                            // Pulled high during reset for big endian (Motorola) operation, low for little endian (Intel) operation.
    (~j_xjoy_in[3]) ? u374_reg[7:0] :     // j_xjoy_in[3]. Active low output enables the outputs of the joystick output latch.
    8'b11111111;        // Default.

assign joy_bus[15:8] = (~j_xjoy_in[0]) ? joy[15:8] :         // j_xjoy_in[0]. Output enables the 16 joystick input pins onto the bus. (upper byte).
                                                      8'b11111111;

I think u374 is the actual latch chip on the Jag mobo.

Which the Jag can use to OUTPUT signals to some of the joyport pins.

So it uses that to output the Column bits to each port.

col_n

The upper and lower four bits of col_n are mapped to each Joyport / Player.

jag_controller_mux controller_mux_1
(
    .col_n( u374_reg[3:0] ) ,    // input [3:0] col_n
jag_controller_mux controller_mux_2
(
    .col_n( u374_reg[7:4] ) ,    // input [3:0] col_n

It then expects to read back the "row" from the joypad(s).

Then had to figure out the mapping for those...

https://arcarc.xmission.com/Web Archives/Deathskull (May-2006)/games/tech/jagcont.html

assign row_n[5:0] = (!col_n[3]) ? ~{but_hash, but_9, but_6, but_3, but_option, 1'b0} :
                          (!col_n[2]) ? ~{but_0, but_8, but_5, but_2, but_c, 1'b0} :
                          (!col_n[1]) ? ~{but_star, but_7, but_4, but_1, but_b, 1'b0} :
                          (!col_n[0]) ? ~{but_up, but_down, but_left, but_right, but_a, but_pause} :
                                                                                            ~6'b000000;

It's possible some games might even be able to assert more than one col_n bit (low) at a time?

But the logic doesn't currently check for that.

I guess that wouldn't make sense, else it wouldn't be able to differentiate button presses on multiple rows.

Can't post pics on here. sigh

At least not from PNG or BMP, only when Pasting.

Ok, so the above logic assumes only ONE but of col_n is asserted (Low) at a time.

All of the but_ inputs to the jag_controller_mux module are assumed to be Active-High.

So those get inverted with the bitwise thingy ~, after the input bits get concatenated.

East, West, South, North. lol

Talk about making it overly complex.

That looks OK so far.

Does Player 2 not work at all, or just have incorrect button mappings?

I don't expect the "Mouse" / Rotary Encoder thing to work, as I never tested it.

[still aurora]

who would be unfortunate enough to own 2 Jag Controllers ! I have one for historical reasons

[rotund portal]

lol

I think I own one. I haven't powered up the Jag in years.

https://www.mirari.fr/iS1N

I probably should have called it "u18" in the code. Oh well.

JOYPORT 1... 
Columns...
Pin 1.  JOY3  <- ED3  (from latch U18)
Pin 2.  JOY2  <- ED2  (from latch U18)
Pin 3.  JOY1  <- ED1  (from latch U18)
Pin 4.  JOY0  <- ED0  (from latch U18)

Rows...
Pin 6.  B0    -> ED0  (via buffer U25)
Pin 10. B1    -> ED1  (via buffer U25)
Pin 11. JOY11 -> ED11 (via buffer U20)
Pin 12. JOY10 -> ED10 (via buffer U20)
Pin 13. JOY9  -> ED9  (via buffer U20)
Pin 14. JOY8  -> ED8  (via buffer U20)


JOYPORT 2...
Columns...
Pin 1.  JOY4  <- ED4  (from latch U18)
Pin 2.  JOY5  <- ED5  (from latch U18)
Pin 3.  JOY6  <- ED6  (from latch U18)
Pin 4.  JOY7  <- ED7  (from latch U18)

Rows...
Pin 6.  B2    -> ED2  (via buffer U25)
Pin 10. B3    -> ED3  (via buffer U25)
Pin 11. JOY15 -> ED15 (via buffer U20)
Pin 12. JOY14 -> ED14 (via buffer U20)
Pin 13. JOY13 -> ED13 (via buffer U20)
Pin 14. JOY12 -> ED12 (via buffer U20)

JOY1 through JOY7, can also be read via buffer U21.
The "JOY0" bit is actually used for reading from the EEPROM Data output.

assign joy[7:1]   = 7'b1111111;    // Port 1, pins 4:2. / Port 2, pins 4:1.
assign joy[0] = ee_do;

The Jag uses a pair of '244 buffers, to read the upper and lower 8-bits of the "JOY" bus.

And a separate '244 buffer, to read Button inputs B0 through B7.

(but only seems to use B0+B1 for Joyport 1, and B2+B3 for Joyport 2.)

Standard Jag controller uses those "button" inputs for two of the Row inputs...

assign joy[8]  = (!mouse_ena_1) ? joy1_row_n[5] : mouseX2;            // Port 1, pin 14. Mouse XB.
assign joy[9]  = (!mouse_ena_1) ? joy1_row_n[4] : mouseX1;            // Port 1, pin 13. Mouse XA.
assign joy[10] = (!mouse_ena_1) ? joy1_row_n[3] : mouseY1;            // Port 1, pin 12. Mouse YA / Rotary Encoder XA.
assign joy[11] = (!mouse_ena_1) ? joy1_row_n[2] : mouseY2;            // Port 1, pin 11. Mouse YB / Rotary Encoder XB.
assign b[1]    = (!mouse_ena_1) ? joy1_row_n[1] : mouseButton_l;    // Port 1, pin 10. B1. Mouse Left But. / Rotary Enc button.
assign b[0]    = (!mouse_ena_1) ? joy1_row_n[0] : mouseButton_r;    // Port 1, pin 6.  BO/Light Pen 0. Mouse Right Button.

Looks like the correct order for Player 2 as well...

assign joy[12] = (!mouse_ena_2) ? joy2_row_n[5] : mouseX2;            // Port 2, pin 14.
assign joy[13] = (!mouse_ena_2) ? joy2_row_n[4] : mouseX1;            // Port 2, pin 13.
assign joy[14] = (!mouse_ena_2) ? joy2_row_n[3] : mouseY1;            // Port 2, pin 12.
assign joy[15] = (!mouse_ena_2) ? joy2_row_n[2] : mouseY2;            // Port 2, pin 11.
assign b[3]     = (!mouse_ena_2) ? joy2_row_n[1] : mouseButton_l;    // Port 2, pin 10. B3.
assign b[2]     = (!mouse_ena_2) ? joy2_row_n[0] : mouseButton_r;    // Port 2, pin 6.  B2/Light Pen 1.

So I dunno. lol

It's not as though there's a separate buffer for P1 vs P2.

It reads most of the "JOY" bus using one Chip Select signal.

Then reads the 8 "button" inputs using another Chip Select.

[rotund portal]

I don't get how it's able to output data from latch U18, while also enabling buffers U21+U20 to read the Rows back?

Would surely only be able to assert one JOYCSLx signal at a time?

Maybe some games do actually read back the JOY7:1 bits?

So hard to explain. lol

The JOYCSLx signals come direct from the Jerry chip.

JOYCSL3 is the Output Enable for latch U18, which allows it to drive data onto Joybus bits 7:0.

JOYCSL2 is used to latch new data into the, erm, latch.

JOYCSL1 controls the Output Enables for buffers U21 and U20, which allow it to read Joybus bits 15:1, plus the EEPROM data bit.

JOYCSL0 controls the Output Enable for buffer U25, to allow it to read the "button" inputs B7:B0.

If Jerry can't drive both JOYCSL3 and JOYCSL1 at the same time, I can't see how it could read the joypad matrix?

Could be worth trying a small tweak...

assign joy[0] = ee_do;
assign joy[7:1]   = 7'b1111111;    // Port 2, pins 4:1 / Port 1, pins 4:2.

assign joy[0] = ee_do;
assign joy[7:1]   = u374_reg[7:1];    // Port 2, pins 4:1 / Port 1, pins 4:2.

To allow games to read back the state of the u374_reg (U18 latch) thingy?

Even though you wouldn't expect them to, since the game itself controls what gets output from that latch.

assign joy_bus[7:0] = (~j_xjoy_in[0]) ? joy[7:0] :         // j_xjoy_in[0]. Output enables the 16 joystick input pins onto the bus. (lower byte).
    (~j_xjoy_in[1]) ? b[7:0] :             // j_xjoy_in[1]. Active low output enables the four button inputs onto the data bus.
                                                                            // Pulled high during reset for big endian (Motorola) operation, low for little endian (Intel) operation.
    (~j_xjoy_in[3]) ? u374_reg[7:0] :     // j_xjoy_in[3]. Active low output enables the outputs of the joystick output latch.
    8'b11111111;        // Default.

assign joy_bus[15:8] = (~j_xjoy_in[0]) ? joy[15:8] :         // j_xjoy_in[0]. Output enables the 16 joystick input pins onto the bus. (upper byte).
                                                      8'b11111111;

The actual JOYCSLx stuff, comes from the j_xjoy_in bits in the core, apparently.

I guess j_xjoy_in[0] is already being correctly used for when the game reads the EEPROM, too?

oic...

The latch can only output signals onto Joybus bits 7:0.

The actual joyport stuff gets read back on Joybus bits 15:8.

(plus two extra Row bits per player, via the "Button" inputs B3:B0.)

So it would be a bit pointless for a game to try to output stuff onto JOY[7:0] via the Latch, whilst trying to read that back at the same time.

I'm almost certain the Jerry chip can only assert one JOYCSLx (j_xjoy_in bits on the core) at a time anyway.

I did say it was overcomplex. lol

[rotund portal]

May be worth mentioning that the TeamTap thing isn't implemented atm.

Essentially only "Pad A" is implemented now.

(for both P1 and P2, but sounds like there are issues with P2 atm.)

jag_controller_mux could be modified, to just have active-high inputs, to select which column (and joypad) is selected.

I have no idea which games even support four players, tbh.

Most people who owned a Jag in the 90s, probably didn't have three friends.

https://forums.atariage.com/topic/257128-atari-jaguar-team-tap-games/

So I guess up to 8 players total.

Definitely no Jag owners with 7 friends.

[glad flame]

There's no Bomberman on the Atari Jaguar, so what even is the point?

[fossil lintel]

That's harsh.

[rotund portal]

lol

[rain sierra]

That Team Tap exists solely for NBA JAM doesn't it? lol

Hell of an influence that game had

[timid snow]

Also White Men Can't Jump and the unreleased Barkley's Shut Up and Jam.
Essentially if you want 4 player action on Jaguar you have to be a basketball fan lol

[mental briar]

Talk about a niche of a niche.

[rotund portal]

Currently helping my brother on a carpet cleaning job. I think the World is trying to send me a message.

[ashen spoke]

@uncut atlas that’s you!

[uncut atlas]

it should in the build I posted

@rotund portal https://github.com/greyrogue/Jaguar_MiSTer/blob/motherboard_rework/rtl/Rework/jaguar.v#L686-L695

[lyric pelican]

assign joy_bus[7:0] =
    (~j_xjoy_in[0]) ? (~j_xjoy_in[3] ? u374_reg[7:0] : joy[7:0]) : // j_xjoy_in[0] enables joystick on the ebus, which can be either the latch if xjoy_in[3] is low, or the joystick inputs.
    (~j_xjoy_in[1]) ? b[7:0] :                                     // j_xjoy_in[1]. Enables system jumper "b bus" output onto the external bus.
    8'b11111111;                                                   // Pulled up.

assign joy_bus[15:8] =
    (~j_xjoy_in[0]) ? joy[15:8] :                                  // j_xjoy_in[0]. Output enables the 16 joystick input pins onto the ebus. (upper byte).
    8'b11111111;                                                   // Pulled up.

assign joy_bus_oe = (~j_xjoy_in[0] | ~j_xjoy_in[1]);

[uncut atlas]

the external bus is its own little seperate bus and then the joystick bus is also a mini bus connected to that

it only has two output enables though

[rotund portal]

Ahh, OK.

Replies a bit limited atm, as I’m on carpet duty. lol

[uncut atlas]

also verilator wont help with the issues that are left here really

these are stability errors from ram reads

[rotund portal]

True, but will be nice to get it running again, as it could help with some stuff.

[uncut atlas]

in grey's builds the second joystick isnt even fed to the core

I fixed that in my rework of jaguar.v

as well as added the adc and fixed the joy bus and all that

[rotund portal]

oic

ADC works for spinner, yep?

Suddenly remember how impossible it is to look at code on a phone.

[uncut atlas]

there is no spinner afaik

one game could use an analog joystick

Battlesphere or something, but I cant find any info on how to use it, but it does poll

[hidden siren]

Huh - apparently, there's hidden/secret support for rotary in tempest 2000;

https://www.retrorgb.com/jaguartempest.html

[rotund portal]

Fucken Bob.

(in a good way. lol)

[hidden siren]

http://www.mdgames.de/Tempest2000RotarySupport.htm - there, non-bob-link

[rotund portal]

No, I like Bob. It’s kind of a running joke we have. 😉

[hidden siren]

According to the 2nd link, the activation of the option is stored in eeprom. For some future plan, maybe that could be done for users by the core, possibly? Note that this statement is not hindered by any knowledge of how hard that might actually be

[uncut atlas]

yeah we will make eeprom saved soon

right now it's just discarded

then you can just share a save file

[hidden siren]

So yeah, found a testable rotary controller game for yah 🙂

other than battlesphere

[uncut atlas]

that probably does not use the adc

rotary likely uses the regular lines

[rotund portal]

oic, lotary encoder.

[uncut atlas]

a paddle would use the adc

only the early models of the jag had it

[hidden siren]

ahhh, well, k - sorry then 🙂

[uncut atlas]

no, I appreciate it

this is just a different thing that needs to get added

the multi-tap thing too

[ashen spoke]

Kitrinx working on paddles? DEJA VU!

I love this core so much

[uncut atlas]

not paddles

spinner

[ashen spoke]

don’t ruin this for me : (

[uncut atlas]

I added the adc because it was a device on the bus, and I wanted the bus to be accurate

in my build, you can basically leave turbo on

I haven't seen a situation where it breaks anything

[urban mango]

In your build, turbo felt good on t2k - normal seemed a bit too sluggish. Really appreciating the work folks are putting in on this tricky beast. Happy to help with hardware comparisons if needed at some point

[uncut atlas]

I feel like there is still something consuming too much bus time, and I think it's probably the use of xwaitl with cart roms

[uncut atlas]

atari engineers hard at work

[ashen spoke]

Aren’t you technically an Atari engineer?

[uncut atlas]

[hidden siren]

an atari reverse engineer 🙂

[mental briar]

"THEY PRESSED UP"
Tiny Jaguar looks on, uncaring
"UP, THEY PRESSED UP"
Tiny Jaguar lays down
"CAN YOU PLEASE TELL THE SYSTEM THEY PRESSED UP?"
Tiny Jaguar begins bathing itself

[hidden siren]

an irata reenigne

[ashen spoke]

FINALLY, AFTER ALL THESE YEARS A TROLL WORKED

[frigid dock]

Hold me closer tiny Jaguar

[ashen spoke]

I can retire!!!!!

[frigid dock]

https://tenor.com/view/thank-you-goodnight-bow-show-thankful-gif-15205363

[mental briar]

My favorite Beatles song

[uncut atlas]

you just exploited the trauma of being in an abusive relationship with fpga code

[ashen spoke]

wait now I feel bad lol

[uncut atlas]

[ashen spoke]

🥺

I’m sorry!

[uncut atlas]

this is for the team tap

that's basically all there is to it

[humble bluff]

@uncut atlas I tried two players with your latest build and NBA Jam. Only some of the buttons on the second controller are working. Looks like A ,B, C, and Options work the rest weren't registering.

[uncut atlas]

ill see if there's a typo in the code

[vague whale]

Huh, I'll be damned.. this version actually shows video on my Mister Pi

To clarify, video on AvP

[verbal coyote]

For me this version works on regular de10 but not on qmtech

[still aurora]

its dealing with ram, Clones by their nature are different

[mental briar]

Do you have dual ram in your qmtech?

[verbal coyote]

Yes

128mb 2.9 + 32mb

[still aurora]

Currently its being developed on the DE10. The QMtech is not a DE10. In the future it may work but not today if what you say is correct

[mild karma]

interesting…I get no video on AvP with this build, but I do get into gameplay with GreyRogue’s
latest build

[still aurora]

I think people are having too high an expectation. Its a beta core its not complete and its a miracle it works at all giving the hellscape the netlists generate

[low dome]

I used to own a massive atari jaguar collection, and some don't know that it actually have a "pro" controller with 6 buttons:

[uncut atlas]

yeh some oopsies in controller code

for one thing the top level registers are only 16 bits

the eeprom wire gets obliterated if the latch is selected which is wrong

[mental briar]

Finally, a controller for professionals like myself

[uncut atlas]

the column select is pulled even if the latch is not selected

the second controller uses the opposite order of column bits

[rotund portal]

I guess you could call it... a NetScape.

https://tenor.com/view/leonardo-leonardo-dicaprio-django-unchained-meme-gif-18513725

[dusk slate]

I shall soon be part of the dual ram elite!

[rotund portal]

Does this really need to have Burst Length set to 4?

https://github.com/greyrogue/Jaguar_MiSTer/blob/master/rtl/mem/sdram_dual.sv#L70

[lyric pelican]

localparam BURST_LENGTH        = 4;

[rotund portal]

'cos with Dual SDRAM, each controller only needs to read/write two 16-bit words, no?

Setting that to 2, should make "ch1_ready" go high sooner.

https://github.com/greyrogue/Jaguar_MiSTer/blob/master/rtl/mem/sdram_dual.sv#L284

[lyric pelican]

if(ch == 0) data_ready_delay1[CAS_LATENCY+BURST_LENGTH] <= 1;

[rotund portal]

    // MSB Byte is read/written FIRST now. ElectronAsh.
    if(data_ready_delay1[3]) ch1_dout[31:16] <= dq_reg;
    if(data_ready_delay1[2]) ch1_dout[15:00] <= dq_reg;
    if(data_ready_delay1[3]) ch1_ready <= 1;

Not sure why I used data_ready_delay1[3] there, but probably to save another clock cycle.

ie. The core won't see ch1_ready go High until the next clock cycle anyway.

By that time, it should have latched the lower word from SDRAM, too.

That part might be OK, but worth trying BURST_LENGTH=2.

[dense ravine]

I thought we were comrades, comrade

[uncut atlas]

this should fix a bunch of controller issues and eeprom

[rotund portal]

Also, if the current SDRAM clock is 106 MHz, it may be a teensy tiny bit on the limit for the refresh timer...

localparam CAS_LATENCY         = 3'd2;     // 2 for < 100MHz, 3 for >100MHz

But I don't know if the refresh values were tweaked for that, or if letting the Tom chip handle it works out OK.

Trying to think if I even have a second SDRAM module here atm. lol

[uncut atlas]

you should probably refer to the correct branch https://github.com/greyrogue/Jaguar_MiSTer/blob/rework/rtl/mem/sdram_dual.sv

or even better, this one which is mine based on his: https://github.com/greyrogue/Jaguar_MiSTer/tree/motherboard_rework

[rotund portal]

Oh. lol

I didn't know it was branched off. I thought Grey's main branch was updated already.

Fair enough.

[uncut atlas]

the jaguar code is in rtl/Rework

[rotund portal]

So BURST_LENGTH is already at 2, yep?

[uncut atlas]

it's radically different code throughout

[rotund portal]

OK

np

I'll use that last link.

Ahh, so you did set that back. haha

    if(data_ready_delay1[1]) ch1_dout[31:16] <= dq_reg;
    if(data_ready_delay1[0]) ch1_dout[15:00] <= dq_reg;
    if(data_ready_delay1[0]) ch1_ready <= 1;

Probably a good idea, tbh.

To be absolutely sure the data is valid for the full 32 bits.

[dusk slate]

You can't back stab someone without first becoming their comrade.

[rotund portal]

I thought about doing the logic for the TeamTap adapter earlier, but it hurt my brain, thinking about how best to map them to each player input from MiSTer.

I guess it would just work as a menu option to enable it.

Then P1, P2, P3, P4 from MiSTer, mapped to each TeamTap port?

Error (12002): Port "analog_0" does not exist in macrofunction "jaguar_inst"

[uncut atlas]

It's very simple

It's basically a lut of column codes

It turns an integer into a preset single bit down it of 16

I already have code for it

[rotund portal]

Ok, np.

Could probably ditch the fdram and pix_clk outputs in jaguar.v

And just change the assign to a wire...

wire pix_clk = xvclk & cpu_toggle;

(since pix_clk does get used internally)

snd_l_en and snd_r_en also no longer used on jaguar.v port list.

Wonder if anyone will ever want support for the Light Pen input? lol

It would be like hooking up a NES Zapper to a Casio Loopy.

[uncut atlas]

Nothing used it afaik

[rotund portal]

Yeah.

Possibly some weird homebrew.

Assuming anyone ever built or hooked up a light pen. No idea.

[uncut atlas]

I hooked it up to the right wire for good measure

[rotund portal]

OK

Analog inputs to jaguar.v are missing on this branch atm.

[uncut atlas]

I also didn't know why they drop a bit of blue

[rotund portal]

Was that on the schematic / DAC ?

[uncut atlas]

Not mine

[rotund portal]

Oh, I just did this earlier...

git checkout remotes/origin/motherboard_rework

Can't see analog_0 etc. on any of them?

I just added this in Quartus, just to get it to compile, but no actual logic added...

    input [15:0] analog_0,
    input [15:0] analog_1,
    input [15:0] analog_2,
    input [15:0] analog_3,

[uncut atlas]

Try pulling

Are you building jaguar_rework project?

It's a different project file

[rotund portal]

Oh

Damnit. I even saw that last night. lol

It's been 84 years, since anyone made a separate qpf.

[uncut atlas]

Make sure you look at the right copy of files in the rework folder

[urban mango]

T2K and SensibSoccer are working 2 player as expected - thanks!

[rotund portal]

OK

Got it now, thanks.

I know my replies are a bit sporadic, but trying to post things as I spot them...

assign DDRAM_RD = (loader_en) ? 1'b0 : cart_rd_trig;
assign DDRAM_WE = (loader_en) ? loader_wr : 1'b0;

In Jaguar.sv. ^

There's a possibility the DDR controller will miss some writes, if they clash with ARM/Linux accesses.

Although it generally uses a command FIFO, so probably not?

Ideally, it should be checking to see if DDRAM_BUSY is High, and holding DDRAM_WE high until BUSY goes Low again.

Else, possible cart ROM corruption during loading.

[uncut atlas]

That's what xwaitl does

It extends the wait states

[rotund portal]

This is for loading, from main MiSTer into DDR, though?

It's probably OK, but makes me a bit nervous.

[uncut atlas]

I've talked about it a bunch and that's what grey wants to move rom to sdram

Which one of us eventually will

[rotund portal]

Yep, that might be OK.

Jag RAM/VRAM and Cart access is on the same bus, yep?

So it can only ever access one at at time anyway?

[uncut atlas]

Tom never access dram during rom reads even though half the bus is unused

[rotund portal]

jaguar.v does look a lot tidier.

[uncut atlas]

Yes

[rotund portal]

You've basically already done all the things I spotted earlier, because I was looking at the wrong file. lol

I didn't spot that either earlier...

wire [3:0] joy2_col_reversed = {u374_reg[4], u374_reg[5], u374_reg[6], u374_reg[7]};

[uncut atlas]

I just fixed that

Also I was accidentally obliterating the eeprom output under some situations

[rotund portal]

Ahh.

I don't get why they would drop the blue LSB bit either.

Maybe another hw bug?

[uncut atlas]

But it does. I'll probably make it optional

[rotund portal]

Would guess they'd only do that if an older ASIC rev was holding Blue LSB high?

[uncut atlas]

Tom had no b0 out

[rotund portal]

Weird.

[uncut atlas]

The hold it low

[rotund portal]

I guess this means the Jag is really 63-bit?

I did the math...s.

[uncut atlas]

23 bit color

The blue bit seems valid though

[rotund portal]

lol

[uncut atlas]

So we can use it if we want

[rotund portal]

jaguar.v does look good now.

[uncut atlas]

Thanks

[rotund portal]

Compiling, but I have no idea where a spare SDRAM module is.

[uncut atlas]

When grey is done I'll clean up the sv too

[rotund portal]

Yeah.

sv isn't too bad.

[uncut atlas]

It's very messy with a lot of dead code

[rotund portal]

I don't know if there's a better internal signal to use for RAM writes?

wire ram_write_req = ({dram_uw_n, dram_lw_n} != 8'b11111111);    // Can (currently) only tell a WRITE request when any of the dram byte enables are asserted.

Makes me wonder if those enables sometimes go Low during READs, and are stomping on stuff.

[uncut atlas]

It's accurate combined with CAS

That's how it's wired

[rotund portal]

OK

Yeah, I guess only on a CAS edge.

wire ch1_rnw = !ram_write_req;

I don't dare touch anything like the Timing Advisor, as I just know it will mess things up.

[uncut atlas]

The timing is a big problem

For accuracy the ROM speed is probably the biggest potential improvement

With some sdram opportunities

[rotund portal]

I'm surprised the real Jag accesses the cart that fast?

Oh yeah, DDR latency sucks.

[uncut atlas]

It's not that slow, just random delays

[rotund portal]

May be worth renaming "os" to "bios" in the sv?

[uncut atlas]

Nothing used xwaitl on real jag so using it is intrinsically inaccurate

[rotund portal]

Yep

[uncut atlas]

We stick with the internal schematic names usually

[rotund portal]

You probably recall, us finding any kind of signal to use at the time. lol

[uncut atlas]

The ram still needs that hacked wait

[rotund portal]

Had another look through the sv, really not bad at all.

I like the fact the "real" refresh request is used now.

Feels a bit closer to the OG.

[uncut atlas]

That was Grey's innovation

Good stuff

Oh shoot. Someone see if turbo works in that last core I posted

I forgot to revert that

[rotund portal]

Wondering if changing this to 2, would help at all?...

assign DDRAM_BURSTCNT = 1;

ie. to kind of pre-read another cart word.

But I don't think the DDR controller works like a cache.

Only a FIFO.

So you'd have to be sure to read that second word every time, to clear the FIFO.

So probably a dumb idea.

[uncut atlas]

There's enough open bram to buffer a bit

[rotund portal]

Probably.

Oh yeah, often on the same row anyway.

[uncut atlas]

But there's no reason to not use sdram

[rotund portal]

True.

Hoping somebody might be able to look at Dreamcast soon.

Because I showed on the sim, that it might be possible to get very decent frame rates from it.

[uncut atlas]

Not on mister. Dont see how that could ever work without different hardware

[rotund portal]

But, atm, that meant duplicating some of the logic 32 times, and Quartus then tried to use 227% of the FPGA. lol

[uncut atlas]

Maybe on the agilex board

[rotund portal]

Yep, either way, it's not realistic to run on the DE10, mainly due to the RAM latency / bandwidth issue.

But then...

[uncut atlas]

Clock speeds

[rotund portal]

If that logic can be reduced, for the visibility thing, it's where it gets the main speed-up.

[dry cedar]

Clock running at x4?

[rotund portal]

It would only need to render one texel at a time after that.

SH4 for sure would never run at 200 MHz on the DE10.

Tiny possibility some uber dev could manage to get it to execute more instructions in parallel.

But yeah, just the sheer amount of logic involved.

I looked into making a start on a custom board for a future DC core.

It could even use 8MB (or 16MB) of SRAM for the VRAM.

To forgo having to mess with the SDRAM crap.

But four 2MB SRAM chips need a LOT of IO.

[uncut atlas]

Better to not waste time on it until there's a viable board

[rotund portal]

I think there's plenty of opportunity to make more progress on it, if more devs were interested.

Even if it means running a real SH4 CPU on the final board.

There are some other issues though, with the way the real PVR uses floating point values. lol

Currently means most of the renders have big glitches, for polys "closer" to the camera.

'cos the range of Z values is HUGE.

[urban mango]

Yes, seems to (I notice the difference in the dot patterns on the level select of T2K). One thing that is different between faster and faster2 cores for me is that the music in Pinball Fantasies is distorted in faster2 not in faster.

[rotund portal]

It's pretty much a glorified slideshow viewer right now...

https://drive.google.com/file/d/1GUWKqgU4P5BBFApqlg9Ai4yh4YrcjoJp/view?usp=sharing

The "dots" during rendering is because I was super lazy.

Whenever it's doing a pixel write to the framebuffer in SDRAM, it can't read the framebuffer for the display.

The vertical lines are due to a delay issue.

Some stuff gets rendered from right-to-left, and don't have the vertical lines, like Toy Commander.

Bearing in mind, it has no "32 times speed-up" logic ('cos that's massive), and the core was only running at about 15 MHz.

I say "core", I really mean "glorified state machine that renders some polys with textures".

(I selected HOTD2 tile instead of Rayman 2 title at one point in the vid, hence it didn't render.)

Jag core compiled.

It took 15 minutes, 30 seconds, on my 3700X.

44% of the FPGA logic used.

31% BRAM.

And no spare SDRAM module to test it yet. lol

[desert oar]

I believe that 2025 could be the beginning for a real Dreamcast core. Would be cool if the core gets the better Naomi gpu too.

[thorny swift]

It only took three decades after it launched but finally in 2024 Jaguar became interesting haha

[uncut atlas]

thanks I reverted it, I forgot I was testing a 4x turbo

[fresh urchin]

oh, the jaguar was always “interesting”, just for a particular inflection of interesting that isn’t very flattering 😉

[warm oasis]

Really exciting to see such a flurry of development on this code. Great work 🙂

[fossil lintel]

All through the power of disgust and hate.
Feels like the wrong lesson...

[mental briar]

I like to think it’s because I asked nicely and it’s an act of kindness

[still aurora]

BigPEmu is also great for Jag and the CD Jag

[lucid oak]

i'm having progress on DV, H sync seems to be solved by now

[mental briar]

Nice work, Sonic!

[thorny swift]

Bubsy

Atari’s attitude when developing Jaguar…

[serene widget]

You know, I would've sworn that AVGN would be the only one back then to give a shout-out (or shit-out) to the Atari Jaguar, thus skyrocketing the interest in it.

[uncut atlas]

@rotund portal the multi-tap is this simple

so basically output[col[3:0]] = 1'b0;

the 16 outputs are sent in groups of 4 to each of the 4 controller ports on the multi-tap

and the joy-in is all muxxed, only one can drive it at a time

[warm oasis]

So what you are saying is it is easier to code than it is to find three other people willing to play Jaguar with you

[mental briar]

Ok, what should I be testing...anything? Are we at a place where testing is helpful?

[thorny swift]

I can’t find three people to play ANY game with me

[dusk slate]

I would if you didn't live in a neighborhood where my car tires would get slashed!

[thorny swift]

No you’d get shot

[dusk slate]

Both!

[lucid oak]

so, i got DV working on my setup, but i need to take a look at some things before releasing it to you guys

v sync and h sync work without problems, each on its pins, i don't know if csync generation is really correct

[mental briar]

ooooo

[lucid oak]

my CRT is very forgiving with sync signals so, it may not be a good parameter for everyone

[mental briar]

I didn't realize bacon lived in Washington Park

[glad flame]

I want to test it with my Morph 4K to see how it handles that external scaler.

[mental briar]

yeah I have a tink that is ready to test

[rain sierra]

What CRT you rocking?

[ashen spoke]

haw haw programmers, DO THE MATH

https://www.youtube.com/watch?v=mlRWqqWay7c

[tranquil cape]

[warm oasis]

Huh, I did not know this...

Hasbro declared the Jaguar as an open platform in 1999, releasing the console's patents and rights into public domain, allowing software developers to make and release games for Jaguar without requiring a licensing agreement.[6][7][8][9] Since then, hobbyists have released previously finished but unpublished games and produced homebrew games to the Jaguar's cult following.[

That was cool of them, a shame more companies don't just do this.

Does this mean the BIOS is open source?

[lucid oak]

guys let me ask you something kind unrelated, i suppose that there is some documentation about this, but to help me troubleshoot

when composite_sync=1, the mister framework join both vsync and hsync or is it the core?

csync is generated by each core or there is circuitry/code that handles creating it after the core output?

i'm sorry to bother, is just that i'm not really familiarized with how this works exactly

[thorny swift]

Should be. Everything Jaguar is open source for all. Hasbro probably realized there was zero revenue opportunity and just said “do what you want”

[warm oasis]

Oh nice, means we can have the boot.rom in the release folder and not need to have it in BIOS DB. -cc Kitrinx

[lucid oak]

this is it guys, direct video should be working in this one

in my crt it works

[verbal grail]

Works on my crt also. Great job. Thanks.

[lucid oak]

its a late panasonic one, i dont remember exactly the model numbers, i modded it to use RGBS, it was a bellow average TV that become a amazing one after the mod

[mental briar]

Iiiiits ALIVE

Of course, AVP doesn’t work on this build. But we can’t have everything

That overscan is angry tho

Nice work @lucid oak ❤️

[mild karma]

interesting...was just about to try this one because AvP doesn't work for me on Kitrinx's latest builds

just tested the few remaining games on the spreadsheet that hadn't been tested...only ones that don't work are Soccer Kid and Space War 2000

[mental briar]

AVP might work for you

[mild karma]

nope, I just tried

it works for me only on GreyRogue's last build

[mental briar]

Same (on my retro castle mister)

[lucid oak]

this build is based on the latest code available on greyrogue's github page, which i dont know if its the same as the last build he posted here

my fix is very simple, it will be very easy to merge into the project

[mild karma]

yeah I'm sure it's just a lucky build in my case...it works reliably only on that version of the core so far

[glad flame]

By the way, are there plans to get the Jaguar CD on the core too?

[mild karma]

I just downloaded that set just in case

[low dome]

Tried a few prototypes and homebrew games with the recent core, so far Brett Hull NHL Hockey (unreleased), Superfly DX (homebrew), Tiny Toons Adventures (Demo) and uFly (homebrew) works well. Some games loads but freezes or doesn't go to the next screen after you press a button, like The Realm Fighters (Proto) and Speedster II (Proto). Other don't boot at all or give me the red jaguar screen.

[stoic stump]

This reworked Jaguar core is a nice surprise. Works suprisingly well already. Thanks to all involved - are there patreons to support?

[rotund portal]

I haven't tried that (or any new core yet).

Just wondering if it works at all. lol

The only thing I changed, was reducing the SDRAM latency by ONE clock cycle.

In theory, it should still boot, but I don't know.

    // MSB Word is read/written FIRST now. ElectronAsh.
    if(data_ready_delay1[1]) ch1_dout[31:16] <= dq_reg;
    if(data_ready_delay1[0]) ch1_dout[15:00] <= dq_reg;
    if(data_ready_delay1[1]) ch1_ready <= 1;    // Assert one clock early.
    
    if(data_ready_delay2[3]) ch2_dout[15:00] <= dq_reg;
    if(data_ready_delay2[2]) ch2_dout[31:16] <= dq_reg;
    if(data_ready_delay2[3]) ch2_ready <= 1;    // Assert one clock early.

The theory is, that the core will "see" ch1_ready go high on the next clock cycle anyway.

By that time, it should have latched the lower 16-bit word into ch1_dout[15:0].

That saves one clock cycle for each SDRAM access, which might not sound a lot, but it is if it's doing thousands of accesses per second.

Actually, maybe it won't boot. Depends on how fast the rest of the core grabs the data after seeing ch1_ready go High.

[sudden palm]

Yeah , works 😉

As always, there is a problem with AvP

Fight for Your Life game does not work for me on any core version (before the fight starts , the game stops )

[sudden palm]

It probably doesn't matter now but every core has this error

[urban mango]

The only builds I've got to gameplay in Fight for Life were Kitrinx' _faster/faster2 builds from yesterday, as I tested 2 player in that game

[sudden palm]

Sometimes I manage to see the beginning of the fight and then blackness 😉

[tall gazelle]

thanks for this.

[rotund portal]

Ooh. Thanks for testing.

If it didn't work at all, I was gonna delete the RBF from here. lol

Probably doesn't make much (if any) noticeable difference in speed, but I was curious to see.

I found my spare SDRAM module last night, I will try testing some corez later.

I can safely say that Grey and Kitrinx' new builds are instantly better.

I think a lot of the graphical glitches before, were probably due to the broken DSP instructions.

[rotund portal]

No obvious difference in frame rate on Checkered Flag on my mildly-tweaked core, but then that game isn't great either way. lol

I honestly don't know how the developers thought it was a good idea to release that game, with such poor frame rates.

I realize it was probably a huge challenge at the time, to understand and get the most out of the Jaaaag, but still.

[tall gazelle]

The Lynx version is much better 😂

[rotund portal]

I can't remember the Lynx version, tbh.

I have a Lynx somewhere, but was taken apart years ago, and left in a box. lol

I should send it to GadgetUK or somebody.

Gonna try enabling SignalTap, to see if I can spot why AVP won't boot.

[tall gazelle]

Retrosix could sort it for you..

[rotund portal]

But the problem is - enabling SignalTap in itself, can often mess with already-marginal timings, and make things worse.

[tall gazelle]

Does this core have the DV enabled ?

[rotund portal]

Probably not the one I just posted.

I'm using Kitrinx' code from the github motherboard-rework branch.

The only thing I tweaked so far, is saving one clock cycle for each SDRAM access.

I'm just using HDMI / ASCAL atm.

Shoved into the Datapath capture card.

[tall gazelle]

I can switch from CRT to hdmi.. CRT easier for me, as it's on my bench lol.

[rotund portal]

Only CRT I have now, is a JVC thing, 20" tube, I think?

I RGB-modded it, but not in the best way. lol

I really want my old monitor from the 90s, which was a Philips CM8833-II.

I used to watch my movies on it as well, from my Sanyo Betamax deck. 😉

Labyrinth, Little Shop Of Horrors, Wayne's World, etc. mostly recorded off TV.

[tall gazelle]

Philips knew how to make a monitor, mines 21" consumer TV.

[rotund portal]

Actually, one neat thing I did with the JVC RGB mod, was to use the LED for "Input B" to activate the RGB input.

[tall gazelle]

We was VHS people 😀

[rotund portal]

I think I literally just connected the LED positive pin to the Fast Blanking / RGB input on the jungle chip. lol

I was as well, but loved the Betamax deck for recording, as it was one of the few that was reliable at the time. lol

I used to repair VCRs, etc.

Can't say I miss it much, maybe sometimes.

Dad used to buy VCRs and all sorts, from the local recycling center.

Fix them up, changing belts, pinch rollers, idler wheels etc., then sell them on.

[tall gazelle]

Back in the day seemed easier, now I'm like high voltage 😁

[rotund portal]

First time I ever got a (linear) Stereo VCR, was a Ferguson Videostar, listening to Bohem Rhapsody. lol

[tall gazelle]

Top loader ?

[rotund portal]

I think so, yep.

Lots of levers on the front.

I very nearly bought another Ferguson on eBay last year, which we had in the 90s...

[tall gazelle]

Wire remote control 😁

[rotund portal]

It had a digital capture box inside, to do near-perfect stills.

[tall gazelle]

Watching bad pirated versions of ET 😆

[rotund portal]

https://advancerepair.pt/produto/leitor-de-video-vhs-vintage-ferguson-videostar-fv26db/

Yep.

My brother said ET was one of the very first pirate VHS tapes he remembers.

1982 ish

You wouldn't think by looking at it, but that was one of the few VCRs at the time to have a digital stills module.

[tall gazelle]

Haha

[tall gazelle]

We had a silver one I think.

[rotund portal]

I didn't really start working on CRTs until I was in my late teens.

'cos they used to scare me. lol

I only ever had ONE zap from the anode cap.

I think that was a 28" Baird TV. It was off, and I was using a screwdriver which had a wire wrapped around it, and hooked up to the earth strap.

But the clip fell off, and an arc jumped to my thumb. lol

Lesson learned.

[tall gazelle]

They do now, but didn't then, repair arcades, but the eyes couldn't now lol

[rotund portal]

Only bad shock I ever had, was from a D2MAC sat box. I was trying to "diag" it, with little-to-no experience, when I was about 14.

Trying to compare the temperate of the two heatsinks, I put my hand across BOTH at once. 😮

lol

[tall gazelle]

That would work 😂

[rotund portal]

The current violently shook my hand, and I couldn't let go for about half a second.

[tall gazelle]

Nothing wrong with a De Fib .

[rotund portal]

Scary how much current that was, and it wasn't even direct from the mains. It was from the switcher chip / transistor. lol

At least by that time, I'd already got into the habit of always keeping one hand away, when working on Live stuff.

And after that, I learned you rarely need to work on Live stuff anyway. Almost all diag can be done with it powered-off, and caps / CRTs safely discharged.

[tall gazelle]

I want to recap my CRT, but I just cannot be bothered😁

And it works

[rotund portal]

Never thought I'd feel nostalgia for crap like this. lol

I remember how those buttons used to "bind" on the edges.

[tall gazelle]

One of my players definitely had a wire remote, great stuff.

[rotund portal]

Yeah, we had a wired remote on the VCR until about 1988. lol

My granddad lived in the garage conversion for a long while. He had a Baird TV in there, with touch button controls...

The TV had a problem one day, as it kept changing channel by itself, and wouldn't stop.

Turned out, my Granddad had sneezed on the buttons. lol

[tall gazelle]

Get up to change the channels 1-4

[rotund portal]

Yeah - Everytime you stood up from the sofa... "While you're up... put Channel 4 on!"

"While you're up, stick the kettle on!"

[tall gazelle]

I had to take my MiSter to people's houses to get the CRT as it wouldn't always sync properly.

[rotund portal]

As kids, we WERE the "remote".

[tall gazelle]

I was literally going to say that

[rotund portal]

Oh wow, it compiled.

I thought I'd added way too many signals to SnargleFlap, but it looks OK.

Now to find a miniUSB cable.

[tall gazelle]

Don't suppose at some point you could add the CRT part? Save me switching mister.ini 😂

[rotund portal]

Jaaaag.

CRT part? Direct Video?

tbh, I'm quite sure how to do it. lol

Never really used DV, except testing a few of the adapters.

I know it basically routes the native video from the core to HDMI, but it's a bit more involved.

Trying to see if I can spot anything obvious that's stopping games like AVP from booting.

But from what Grey said, it's probably just marginal timing issues.

The faster bursts on SignalTap are probably video display access, or Object (sprite) fetch.

AVP completely and totally crashes, and stops dead.

Then just does that.

The challenge is, finding a way to trigger SignalTap, at the time the crash happens.

Then making any sense of the chaos.

[tall gazelle]

Yes DV.. AVP for me loads then just plays music no video.

[rotund portal]

Ahh, see, I don't have audio atm, as the Datapath doesn't support it.

There's a point, just before AVP crashes / video stops, where it jumps to address 0.

Other games, like Atari Karts don't seem to do that.

Interesting.

The Alpha version of AVP does show that.

And gameplay.

(and does also jump to abus addr 0, before booting.)

[uncut atlas]

what is driving it?

looks like 68k

[rotund portal]

Not sure yet. Trying to wrap my brain around it.

I'll have to start adding a Mnemonic Table thingy, for some of the common reg addresses.

Thing is, we know some builds do run AVP just fine, so probably just marginal timings.

So could be very hard to pin down.

[uncut atlas]

looks like it's a response to interrupt

[rotund portal]

I was trying to trigger on a specific function code, but didn't see one that was unique to the crash.

[uncut atlas]

FC is "Supervisor data"

[uncut atlas]

basically it means the program encountered an exception

it put it into supervisior state, and the exception handler was to go to address 0

which seems like it's rebooting

[rotund portal]

Yeah.

This is where SignalTap becomes very limited.

Else I'd just trace the entire 68K boot process, then check against an emu.

[uncut atlas]

so, one thing to note about avp is that it's character select portraits are corrupted if the cpu is at normal speed

this means one of the chips isnt processing fast enough

probably because of arbitrary delays in either ram or cart

overclocking the cpu fixes those

the progam could be crashing from fetching bad data, or having hard coded speed needs which are unfulfilled

[rotund portal]

Oh, I see what you mean. IPL1_N is staying low after the crash.

(I might as well ditch IPL0 and IPL2, as they're not used by the Jaaaag.)

[uncut atlas]

they are unused signals, yeah

I wonder of oRESET gets pulled in that supervisor mode

it might be trying to reset the system

oRESET should really pull down j_xresetil

[hollow current]

Chequered Flag.... Yeah, I remember owning this one and being very disappointed it wasnt better that VR Racing.
WELL - I still prefer the spectrum version when compared to the Jag one!

[uncut atlas]

imho getting cart into sdram and ditching xwaitl is the next step

that eliminates a known inaccuracy an a variable

then after that is focusing on dram misses

it very well might be a schematic error in bus arbitration or processor bug

[rotund portal]

I'll always have a soft spot for the Speccy. I used to play the +2 well into the 90s, even after getting an Amiga and having PCs.

[uncut atlas]

I feel like the bus is very close to accurate now though, despite the complexity of the chip interplay

[rotund portal]

Yes, it feels like most games are about the same speed I remember on the real Jag.

Although I think I only have the cart for Cybermorph.

[uncut atlas]

the hw speed tester of the 3 processors shows them getting about the right number of cycles

but it seems like under some situations they do not

[hollow current]

Same here.. my grey +2 was much better than my friends +3 with dodgy sound chip... Its a great time to be a speccy fan.. Crash Live 2024 in kennelworth next weekend!!!

[rotund portal]

I'm one of the weird people who still liked loading from tape, even after getting a +3. lol

The C64 Datasette weirded me out, because you couldn't hear the loading sounds.

Triggered when IPL1_N is Low, and abus = 0x000008.

If that means anything at all. Hard to trace.

[hollow current]

And now I use a C64 Datasette on my Spectrum Next... oh the irony

[rotund portal]

lol

That reminds me - I need to get the Commander X16 "core" stuff on github soon.

Can't remember if anyone has done a Next core yet?

[hollow current]

Yes

It works fine

[rotund portal]

Ahh, OK.

X16 isn't actually a core as such atm, only boots in the sim.

They got a bit strange about it, because they wanted to keep control of the BIOS - even though the BIOS can be compiled from source. sigh

[uncut atlas]

wait that's impossible

[rotund portal]

Which part? The X16 BIOS, or SignalTap?

[uncut atlas]

bgack_n is low

doesn't that imply the 68k doesnt have the bus?

[rotund portal]

The 0x000008 thing is probably just a glitch on the bus.

Erm, I can barely remember now.

I used to have a good understanding of that stuff, when we last looked at it.