I'm doing some exploratory development for the original playstation with zig. Everything is fine in debug builds, but when turning on ReleaseSmall I get invalid instructions, specifically teq after a divu to check for divide by zero. teq isn't valid in the mips1 ISA and it's correctly recognized as such (I get a compile error if I try to use it as inline assembly).
I guess my question here really is is this a zig bug or an llvm bug, and how exactly can I narrow it down.
#target generating invalid instructions
1 messages · Page 1 of 1 (latest)
ok I think I found it, it's not a zig issue but llvm. the difference from zigs point of view was it was emitting one of those fancy mul by a large constant to do division by a constant, vs using the divu instruction. it does feel a bit weird that it's not the other way around though
idk if you solved it already, but this sounds like you've got the wrong -cpu option
You gotta tell LLVM the CPU features you have available, as well as just the architecture
the -cpu option is correct, it's a bug in llvm
huh, weird
llvm is emitting that instruction despite it not being available with your cpu options?
that's very odd
mips1 has divu, all the divs add trap for div/0
but fwiw mips1 support is considered "experimental"
Might be worth reporting it to them if there's not already a bug for it
already done 😎
nice c:
working on a fix, just gotta wait for llvm and zig to compile...