Macropad Schematic Review

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Here's the pdf if you prefer it

[peak shell]

Looks like altium

But I'll take a look at it

[rugged canyon]

sliders pin3 go where?

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yeah sorry everyone, I just have it installed and forced to use it at school. Rn I prefer working on it just because I'm used to and I want to do my personal projects in the little spare time I have

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should be to ground, nice catch

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fixed it thanks

[peak shell]

Yeah makes sense. Don't worry too much about it 👍

Are you using the internal pullups? otherwise you need to add pullup resistors

you might want to add a decoupling cap to the usb switch thing

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I'm using the screen with already some circuitry on it, I'll check if it has already pullup resistors going from the SCL/SDA to the 3.3V

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completely forgot, adding them rn thanks!

[peak shell]

just add them in and set them to no bom using a variant

if you end up needing them you can solder them in afterwards

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makes totally sense, I like this approach

[peak shell]

are the adc pins of the esp 5v compatible?

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totally not, I checked the Absolute Maximum Rating rn

I think I should check it for the RP too

[peak shell]

this is one of my designs using adc pins. You could add a 1nF and 100ohm resistor close to the adc pins to provide some extra filtering. You probably wont need it but its very nice to have if you do. Set the 100 ohm resistor to 0ohm in the variant

[peak shell]

yeah I see you're pulling the encoder lines to 5v too

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yes I spotted it after the error with the ESP 🙂

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so just the 1nF and the 0 ohm? so in case I need the 100ohm ones I can solder them?

[peak shell]

These also go to 5v

[peak shell]

I would put the 1nF to no bom in the variant as well

but other than that you're correct

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IC, in case I need them I can always solder them

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I dont have a lot of experience with keyboards and led matrixes but it looks good

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yep 😁

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thank you so much for the corrections, I'll fix the reviews and proceed with the routing

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me neither, I wanted to experiment with multiplexing 🙂

[peak shell]

awesome! other than that I was not able to find other mistakes

oh and another tip: it looks like you're using a custom drawing template

but the information tabs are empty

I would fill them with project info

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its not custom, but yes I still need to fill them

I was thinking of filling them before making my repository visible

[peak shell]

In altium you can make globaly modifieable info by going to project > project options > parameters

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that's really nice to know, for my other projects they were already made for the team

[peak shell]

I dont know how you can add them to your template though. probably placeholder text with the same name or something

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I'll just create a template, atm I'm using the standard one

before I'll route and order the pcb, I have another pcb to route too that is massive

[peak shell]

how did you add your picture into it though?

is that the template or did you just place a picture

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placed it, I tried in the train to create a template but I didn't have enough time and now I prefer working on the rest

[peak shell]

fair enough

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in all my designs I place a photo just because usually at school we're required to put it

[peak shell]

thats strange

my school just wants my name and student number

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for some projects it was like that, but in some they wanted it. ig professor based

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ah i see

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like now I've it already inside my latex template just in case

[peak shell]

I need to start working with latex. word is driving me nuts

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I haven't used word since middle school, never liked it and never wanted to support microsoft for that product. VScode + latex for everything

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Checking the thardware design of the RP2040 I found out an error in my schematics. The two capacitors next to the the oscillator weren't 15pF

[peak shell]

Did you calculate the capacitance?

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no I did not, the HW design says so: .

We’ll assume a value of
3pF for this, and as this capacitance is in parallel to C2 and C3, we simply add this to give us a total load capacitance of
10.5pF, which is close enough to the target of 10pF. As you can see, the parasitic capacitance of the PCB traces are a
factor, and we therefore need to keep them small so we don’t upset the crystal and stop it oscillating as intended. Try
and keep the layout as short as possible.

[peak shell]

Yeah but the load capacitor value depends on the stray capacitance and the load capacitance of your crystal

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also I found out something else, somehow I forgot the esp crystal xD

[peak shell]

What crystal are you using?

https://www.digikey.nl/en/products/detail/abracon-llc/ABM8-272-T3/22472366

This datasheet says it's 18pf

https://community.nxp.com/t5/LPC-FAQs/How-to-calculate-the-value-of-crystal-load-capacitors/m-p/464589 using this formula

I get a load capacitance of 30pF

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where?

[peak shell]

Yeah

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opened str8 from mouser

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10pf

That's cl

Oh huh

Wait

I'm not stupid 😂

Weird

[peak shell]

You looked at this link right

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digikey and mouser have different datasheets?

[peak shell]

Maybe?

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even says "Crystal approved for use with Raspberry Pi ‘s
RP2040 and RP235x range of microcontroller
products" lmao

[peak shell]

But even then

The load capacitors should be 14pF with that formula

10pF=((X*X)/(X+X)+3pF

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mine's

yours

[peak shell]

(i ve got a fancy calculator that does the math rewriting for me)

[peak shell]

Ok. But it doesn't really matter anyway because the result is 14pF not 10.5

According to that formula at least

But 14pF is a lot closer to 10.5 then 30 at least 😅

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I haven't had yet a course where they explained us oscillators etc

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yeah I was surprised w 30pF 🙂

[peak shell]

That's ok

[peak shell]

It happens. On my last design I used the same crystal actually and I used 30

Or 27 or something

(I usually put my stray capacitance at 5pf)

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what about the width and lenght trace? also should I put it close to the rp and as far as possible to the ESP oscillator?

[peak shell]

I like to keep it close to the pins and keep it away from analog or high speed datalines

But crystals are annoying

They usually don't work in my designs 😂 (take that how you want)

The datasheets are also pretty confusing usually, where pin 1 is for example

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damn, I could use a lock source with a CMOS also right?

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I'm not entirely sure

I believe your microcontroller has to support it? But I'm not sure

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the rp does

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I haven't used one

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In that case yes

It uses a bit more power though

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should I put test pads then to plot the frequency with the oscilloscope? so I can always desolder the capacitors

[peak shell]

I mean I just put my probes on the pads of the crystal. There's usually more than enough room for them

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that one i'm using has the pads underneath tho

[peak shell]

Yeah but the footprint is probably a bit bigger than the actual crystal

Let me see if I have a picture somewhere

It's hard to see but you get the idea

This is better. There are two of them next to eachother

Oh the capacitor placement isn't optimal I think

But it gives you a good sense of the footprints

Those capacitors are 0603 btw

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all my cap are 1206

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yeah IC, for me is the first time using crystal oscillators so good to know

[peak shell]

Not sure if you can get those low capacitance values in that size

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true I should check that

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0603

1206

[peak shell]

Looks good. Can you also get them in 14pf?

That's what came out of the Formula

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13 or 15 for both of them

I think it isn't a standard value

same on digikey

even 28 isn't a standard value in case you wanted to put two in series

[peak shell]

You can get a lot of weird capacitor values is smaller packages sizes. I had to use some RF capacitors with a value of 3.3pF for example

Or 7.5

That was in a 0402 package though

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14pF is available at 0402

[peak shell]

I figured. How comfortable are you with soldering SMD stuff?

I'm not very good at it so I try to avoid anything smaller than 0603 when I can

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all my resistors are 0402, I'll use a hotplate

and I'll order a stencil

also my leds are 0402 🙂

I'll have tons of fun

I'll use the same formula for the ESP crystal

The esp32-s3-mini1 datasheet says that the module has an already built in 40MHz oscillator but in the typical application circuit another one is placed

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I also noticed that I'll have smd components on both sides of my pcb, that means that I'll either use sometape to hold one side or solder by hand x32 0402 LEDs :/

those ones

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You'll hate yourself 😂

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The built-in one will work but you probably won't be able to use the radio

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Im thinking of swapping to bigger ones or even addressable ones

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I'll add one then

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I've placed the components roughly keeping in mind to place the decoupling capacitors as close as possible to the pins. I'm wondering which components could I place far from the chip in order to also use the left space (where there are the 3 sliders) ?

I'm thinking of using a plane for some signals and VCC, the other one for ground

• I have to route the differential pairs, any tips for that? should I place them in a different plane seen the small space that I have? I was thinking of routing them in the front face where I have space

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I was thinking of maybe placing the decoupling capacitors on the other layer and just route underneath with a via, the buttons I could place them far (maybe not the Bootsel)

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already looking better, idk if I need to impedance match the 2 tracks of the crystal

[peak shell]

Looks pretty good. Place the esp on the outer edge of the board though. The antenna loses a lot of range if you have copper below and around it

[peak shell]

Leaving them close to the chip is best

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No. But the layout looks a bit weird. Is this a crystal or a txco?

[peak shell]

I would do top: signal/gnd inner1: gnd inner2 power bottom: signal/gnd

That's what I usually go with

Your resistors are absolutely tiny. make them bigger. You'll love yourself

[peak shell]

I would keep the diff pairs on the same plane as the ic youre going to route them to

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crystal, is the same one you had on your rp design

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ok I'm placing it on the top border

[peak shell]

Mmm looks a bit weird with that resistor but it should work I think

Those resistors and capacitors look very small as well

I would make them bigger

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they're 0402, im forced to for the capacitors but I'll use a reflow oven and a soldermask

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that's what is present in the schematics

[peak shell]

You can't get them in a larger size? Also yeah reflow over is a good thing but placing them is still annoying. 0402 is alright if you've do it before

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The schematics of the rp2040?

Oh yeah it does

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oh I've done it multiple times

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Interesting

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yes

it's in the hardware design

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I've never seen it before

Ok well sounds good then 👍

Move the esp though

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did it

[peak shell]

Unless you're not going to use the WiFi/bt stuff

[peak shell]

You could also move it more inward and have a cut out and/or a keep out

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I'm wondering how I should divide in the plane the 3v3 and the 5V

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in reality it's perfect so I have space for the potentiometer

[peak shell]

Red is esp outline. Blue is keep out.

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I see it

I could, so at the end of the day I've the same lenght

I could do the same for the usb c port

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you have any ideas?

[peak shell]

I wouldn't

Just have one layer. Inner 2 for example empty and draw the power traces on that

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aight

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@peak shell should I impedance match the DP DN sorting from the usb and going to the IC1?

[peak shell]

Nah it's only usb 2.0

In fact you probably don't even have to impedance match at all

I did for my last project though because I thought it would be fun

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Should I still treat them as differential pairs when they sort from the USB c and going to the ic1?

After ic1 for sure

[peak shell]

Yeah yeah I know. But you can get away with it. But you can do it if you want

I did it for my internship PCB as well

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Not really necessary. But you can

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Mine was modern c++ for 3 months 😭

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Funnn...

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got the bag and the experience tho 🙂

[peak shell]

Awesome

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I'm still having problems to route the differential pairs of the usb-c

I'm forced to go to the other plane using vias but then how can I make sure that the lenght of the traces will be the same for both?

also for the 90ohm I'll need to sum the leghnt from A6 to 1 + B6 to 1 + lenght to the multiplexer + to the MCU?

and count for vias too

[peak shell]

I'm not an expert on this

I just kinda did whatever I felt looked good 😂

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Lmao

I swapped to a usb2 connector

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I've been working on the routing lately, it's a 4 laer with the 2 inner layers being GND planes for EMI protection (overkill? probably but I want to have a GND plane under the differential pairs). Before continuing I've few questions: 1) to connect the 2 GND planes together do I scatter in a grid some vias? 2) in order to have less noise on the 3V3 should I use large copper pours? note that the testpads and the 2 connectors in the bottom right corner of the first image aren't routed yet. asking that before using vias to connect all the GND and the 3V3 🙂

in the pdf there's a high quality image of the routing in color, if there are any other problems / some suggestions / any other files needed lmk !

the usb connector is also giving me some problems with the distance between pins ig, ill recheck my rules

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@peak shell what do you think?

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Layer stack up sounds good. 1) You can either place stitching vias yourself but altium and kicad have automatic stitching via scripts. The one in altium is a bit weird because there was something you needed to do in order to get it to work. 2 ) I don't know what you mean. Btw it looks like you only have fills in the inner layers. I would also put ground planes in the top and bottom layer

Did you connect everything to ground yourself?

You don't need to do that now that you have those two inner ground planes

Just have a short wire and a via going into the ground plane

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Nothing is connected to ground yet

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Those leda are connected to the max7219 in Multiplex

So rows and columns shared

[peak shell]

I see

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What I mean is: should I put some fills also for the 3V3 and have some areas just for that in order to reduce noise?

[peak shell]

I would fill the whole thing with 3.3v and have one of your internal layers dedicated to power routing

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Then I wouldn't have any GND underneath the differential pairs...

[peak shell]

Why?

You have 4 layers right?

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I do have 4

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because the differential pairs are routed on both layers

I could have one layer dedicated to power routing and a fraction of it for the gnd (to stay underneath the diff pairs)

[peak shell]

Yeah that's probably what I would do

Although the distance between the copper layer underneath that is probably already enough

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I'm following your suggestion and I'm using stitching vias to go from the layer 4 to the 3v3 layer

in the third imageI should have an error right? because the traces are going over the drill

right?

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Wayyy too many vias

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And yes

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I'll double check the manufacturer capabilities

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You don't need so many stitching vias

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Is there any equation to find a good number based on what you want to achieve? Or I just go by sense and put way less?

[peak shell]

Sense mostly

Only if you're doing a coplanar wave guide or try shielding against a specific frequency

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that's what I was thinking too, engineering moment

I still didn't find in the altium doc a way to automatize creating vias to connect automatically the GND and 3v3 to its layer

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I thought that now I can connect all the 3v3 manually with vias and then pour GND to the outer layers