Xiromos 16-Bit NASM OS | Operating System Development | Page 4

echo granite Jun 2, 2026, 3:58 PM

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it cant be that hard, especially for these older GPUs

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think positive

silver bridge Jun 2, 2026, 3:59 PM

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gl

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maybe if they are older you can find something

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like protocols and stuff

cinder bronze Jun 2, 2026, 4:08 PM

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you should use relative paths before writing a nvidia driver

silver bridge Jun 2, 2026, 4:08 PM

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💀

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also, never heard of gitignore?

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you have raw .bin files in your repo

echo granite Jun 2, 2026, 5:18 PM

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cinder bronze you should use relative paths before writing a nvidia driver

if i do ~/Downloads NASM doesnt find the path

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so i have to do the full path because my directory for my 32Bit OS is not in the Xiromos directory

cinder bronze Jun 2, 2026, 5:19 PM

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because the preprocessor cannot interpret ~

echo granite Jun 2, 2026, 5:19 PM

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yes

cinder bronze Jun 2, 2026, 5:19 PM

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echo granite so i have to do the full path because my directory for my 32Bit OS is not in the...

just start from your project directory 😭

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%include "xmode/syscalls/disk.asm"

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or even "syscalls/disk.asm" or "disk.asm" depending on from where you're building the project

silver bridge Jun 2, 2026, 5:20 PM

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else other ppls will NOT be able to build

echo granite Jun 2, 2026, 5:20 PM

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hm, okay, then i have to change something in the build script, because the script is in the Xiromos Directory

silver bridge Jun 2, 2026, 5:20 PM

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nor the github actions runs

cinder bronze Jun 2, 2026, 5:20 PM

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echo granite hm, okay, then i have to change something in the build script, because the scrip...

huh?

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so what

echo granite Jun 2, 2026, 5:21 PM

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what do you mean?

cinder bronze Jun 2, 2026, 5:21 PM

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isnt xiromos your 2nd OS?

echo granite Jun 2, 2026, 5:22 PM

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Yes, my build script builds Xiromos AND xmode because xmode doesnt work without it. Except if you use UEFI

cinder bronze Jun 2, 2026, 5:23 PM

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why does one of your OSes depends on the other one???

echo granite Jun 2, 2026, 5:23 PM

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thats my special architecture: Xiromos is the "Bootloader" for xmode

cinder bronze Jun 2, 2026, 5:23 PM

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you have a 32-bit kernel + loader, right?

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why does your 32-bit os depends on your 16-bit os

echo granite Jun 2, 2026, 5:26 PM

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Because xmode is just a "program" for Xiromos which can be started from it. If you use BIOS you have to install first Xiromos because it can load it then. If you use UEFI then the UEFI will find /EFI/BOOT/BOOTX64.EFI and load it. This is how i support BIOS + UEFI.

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yeah its a little bit weird

cinder bronze Jun 2, 2026, 5:26 PM

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and why can't the programs be built independently from the OS?

echo granite Jun 2, 2026, 5:26 PM

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which programs do you mean?

cinder bronze Jun 2, 2026, 5:27 PM

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echo granite which programs do you mean?

xmode

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you said it is a program

echo granite Jun 2, 2026, 5:28 PM

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yes, it cant be build independently right now but i will change that now

echo granite Jun 2, 2026, 6:06 PM

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okay, now it is better. Check out the second branches of Xiromos and xmode

echo granite Jun 3, 2026, 7:29 AM

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i think, after AHCI i will make an USB keyboard driver

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then a PS/2 mouse driver and window manager

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and then maybe the graphics card driver

echo granite Jun 3, 2026, 8:08 AM

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    pusha
    cmp dword [abar], 0                 ;no AHCI
    je .no_ahci
    mov eax, [abar]

    mov esi, ahci_device_list_addr      ;0x8b000
    mov ebx, [eax+0xc]                  ;Ports Implemented
    xor ecx, ecx
.loop:
    cmp ecx, 32
    jae .done

    bt ebx, ecx
    jnc .next

    jmp .found_port
.next:
    inc ecx
    jmp .loop
.done:
    mov byte [ahci_active], 1
    popa
    ret

.found_port:
    mov edi, eax
    add edi, 0x100

    mov edx, ecx
    imul edx, 0x80

    ;check if port is emtpy
    add edi, edx
    mov edx, [edi+0x28]     ;PxSSTS
    and edx, 0x0f
    cmp edx, 3
    jne .empty_port

    ; mov edx, [edi+0x28]
    ; shr edx, 8
    ; and edx, 0x0f
    ; cmp edx, 1
    ; jne .empty_port

    ;port has an active device
    ;store information in ESI (16 bytes):
    ;-Port Number
    ;-Port Address
    ;-Signature (device type)
    mov [esi], ecx
    mov [esi+4], edi
    mov edx, [edi+0x24]     ;PxSIG
    test edx, edx
    jz .empty_port
    mov [esi+8], edx        ;0x00000101 = SATA, 0xEB140101 = ATAPI
    inc word [ahci_devices]
    mov dword [edi+0x14], 0xffffffff        ;enable interrupts

    movzx edx, byte [avail_disks]
    imul edx, DRIVE_LIST_ENTRY
    add edx, DRIVE_LIST_ADDR
    mov [edx], eax      ;ABAR
    mov [edx+4], edi    ;Port Address
    mov [edx+8], cl     ;Port Number
    mov [edx+9], 0xaa   ;Drive Type
    inc byte [avail_disks]

    ;stop port
    mov ebx, [edi+0x18]
    and ebx, ~(1 << 0)
    and ebx, ~(1 << 4)
    mov [edi+0x18], ebx

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    mov ebx, [edi+0x18]
    test ebx, (1 << 15)
    jnz .wait
    test ebx, (1 << 14)
    jnz .wait


    push edi
    push ecx
    push eax

    mov edi, [edi]      ;Command List Base

    xor eax, eax
    mov ecx, 1024/4
    rep stosd

    pop eax
    pop ecx
    pop edi

    ;set command lists
    push edi
    mov edi, AHCI_PORT_MEM_OFF
    imul edi, ecx
    add edi, AHCI_MEM_BASE
    mov edx, edi           ;address of Command List
    pop edi

    mov [edi], edx          ;PxCLB
    mov dword [edi+4], 0    ;PxCLBU

    push edi
    mov edi, AHCI_PORT_MEM_OFF
    imul edi, ecx
    add edi, AHCI_MEM_BASE
    add edi, CMD_LIST_SIZE
    mov edx, edi            ;address of Reveived FIS
    pop edi

    mov [edi+0x8], edx
    mov dword [edi+12], 0


    mov ebx, [edi+0x18]
    or ebx, (1 << 4)        ;FIS Receive Enable
    or ebx, (1 << 1)        ;SUD
    or ebx, (1 << 0)        ;ST
    mov [edi+0x18], ebx
.empty_port:
    add esi, 12
    inc ecx
    jmp .loop
.no_ahci:
    mov byte [ahci_active], 0
    popa
    ret```

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    pusha
    ;AL = AHCI Port

    xor ah, ah
    cmp ax, [ahci_devices]      ;check if device is valid
    ;jae .no_device
    imul ax, AHCI_PORT_ENTRY_SIZE

    movzx ebx, ax
    mov esi, ahci_device_list_addr
    add esi, ebx

    mov eax, [esi+4]            ;port address

    mov ebx, [eax+0x38]
    ;or ebx, [eax+0x34]
    not ebx
    bsf ecx, ebx
    ;jz .no_free_slot

    mov edi, [eax]
    mov edx, ecx
    shl edx, 5      ;*32
    add edi, edx
    ; Command Header
    ; DWORD 0: flags + PRDT length
    ; DWORD 1: PRDT base addr low
    ; DWORD 2: PRDT base addr high
    ; DWORD 3: reserved

    mov edx, [esi]      ;port number
    mov esi, AHCI_MEM_BASE
    imul edx, AHCI_PORT_MEM_OFF
    add esi, edx
    add esi, CMD_LIST_SIZE
    add esi, RECEIVED_FIS_SIZE
    mov edx, CMD_TABLES_SIZE
    imul edx, ecx       ;slot number
    add esi, edx        ;address of command table

    push esi
    push edi
    push eax
    push ecx

    xor eax, eax
    mov edi, esi
    mov ecx, 256/4
    rep stosd

    pop ecx
    pop eax
    pop edi
    pop esi

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    mov dword [edi], 0x00010005         ;FIS length + PRDT entries
    mov dword [edi+4], esi
    mov dword [edi+8], 0
    mov dword [edi+12], 0

    ;set PRDT
    mov dword [esi+0x80], 0x5000        ;example
    mov dword [esi+0x84], 0
    mov dword [esi+0x88], 511
    mov dword [esi+0x8C], (1 << 31)

    ;set FIS
    mov byte [esi], 0x27
    mov byte [esi+1], 0x80
    mov byte [esi+2], 0x25      ;read DMA extended
    mov byte [esi+4], 0         ;LBA 0
    mov byte [esi+5], 0         ;LBA 1
    mov byte [esi+6], 0         ;LBA 2

    mov byte [esi+7], 0x40      ;device byte 

    mov byte [esi+8], 0         ;LBA 3
    mov byte [esi+9], 0         ;LBA 4
    mov byte [esi+10], 0        ;LBA 5

    mov byte [esi+12], 1        ;sector count 1
    mov byte [esi+13], 0        ;sector count 2

    mov dword [eax+0x30], 0xffffffff    ;clear errors
    mov dword [eax+0x10], 0xffffffff    ;interrupt status
    mov ebx, 1
    shl ebx, cl
    mov edx, [eax+0x38]
    or edx, ebx
    mov [eax+0x38], edx
    mov edx, [eax+0x10]
    call print_hex8
    call print_newline

    mov edx, [eax+0x20]
    call print_hex8
    call print_newline

    mov edx, [eax+0x30]
    call print_hex8
    call print_newline

    mov edx, [eax+0x38]
    call print_hex8
    call print_newline
    popa
    ret```

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does someone know why the AHCI controller doesnt accept the command?

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the results of the print_hex are: off 0x10 = 0, off 0x20 = 0x00000050, off 0x30 = 0, off 0x38 = 0x00000001

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this means that there is no error but the controller seems to be busy or somethin, because of the 0x00000050

cinder bronze Jun 3, 2026, 10:39 AM

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echo granite okay, now it is better. Check out the second branches of Xiromos and xmode

you forgot a path

echo granite Jun 3, 2026, 2:24 PM

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echo granite this means that there is no error but the controller seems to be busy or somethi...

bruh, the AHCI controller says its ready and doesnt show any errors, but it still doesnt start the DMA transfer and doesnt interrupt the CPU, which is very strange

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how do i debug if there are no errors?

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HAHAH LETS GOO I FIXED IT

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i dont know what the error was

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but AHCI reads work!!!

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FINALLY

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4 days of work...

cinder bronze Jun 3, 2026, 2:28 PM

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gg

echo granite Jun 3, 2026, 7:05 PM

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guys, my OS has a new boot concept

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when the kernel is loaded in memory it starts a task called INIT.SYS, draws a welcome message and executes the shell

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this is because the OS boot much faster

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INIT.SYS scans then the PCI, initializes AHCI/IDE devices, searches for USB devices and prepares everything, but all this happens in the background, so the shell can be started faster

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the advantage of this is that the Shell starts immediatly without delays

echo granite Jun 3, 2026, 7:09 PM

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cinder bronze you forgot a path

btw i fixed that, i just didnt push it do the repo, i will do that after my AHCI and OHCI drivers are finished

echo granite Jun 3, 2026, 7:10 PM

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echo granite guys, my OS has a new boot concept

i also added a function for that, now you can auto-execute programs on start

cinder bronze Jun 4, 2026, 6:34 AM

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echo granite btw i fixed that, i just didnt push it do the repo, i will do that after my AHCI...

you are not forced to push everything at the same time yk

echo granite Jun 4, 2026, 7:57 AM

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why?

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to push something you first have to commit everything

echo granite Jun 4, 2026, 10:04 AM

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why is this Apple USB Controller in my QEMU VM??

spare nova Jun 4, 2026, 10:06 AM

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echo granite why is this Apple USB Controller in my QEMU VM??

from pci.ids: ```
106b Apple Inc.
...
003f KeyLargo/Intrepid USB
1af4 1100 QEMU Virtual Machine

echo granite Jun 4, 2026, 10:09 AM

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spare nova from pci.ids: ``` 106b Apple Inc. ... 003f KeyLargo/Intrepid U...

i emulate an OHCI controller and USB stick in QEMU:

 -drive file=disk.img,format=raw,if=none,id=usbstick
 -device usb-storage,drive=usbstick``` i thought QEMU would emulate its own OHCI controller?

spare nova Jun 4, 2026, 10:16 AM

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it's been like that since ohci has been added to qemu 20 years ago

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https://github.com/qemu/qemu/commit/0d92ed3022694aa6ec9172938e999871fa04f711#diff-ece7ea13db51fb64a6f11cc7263d4dfbb302390e66fc0d30c2d9be325a6e9fcaR1131-R1132

cinder bronze Jun 4, 2026, 10:25 AM

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echo granite to push something you first have to commit everything

no?

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add the files you want, commit them and push

echo granite Jun 7, 2026, 12:46 PM

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now multidisk support + better shell command interpreter

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also my OS uses now Busmastering DMA reads instead of PIO Mode

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i made a function which abstracts disk reads - you just give it parameters and the function decides which driver to use (IDE / AHCI / OHCI)

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im now working on an OHCI driver but its very complicated

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to support USB sticks

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and USB Keyboards

echo granite Jun 10, 2026, 6:37 PM

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whohoo, COFF files can be executed on my OS

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you can compile files like this: nasm -f win32 test.asm -o test.obj

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these files arent real executables like ELF or PE, they are object files but they can be executed on my OS

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COFF object files are now the standard executables for my OS, BIN files are for Xiromos

#Xiromos 16-Bit NASM OS