#EvalynOS

1 messages Β· Page 31 of 1

hazy saddle
#

Aswell funny thing

#

I also tried an old kernel build

#

It just fucking died

#

πŸ’€

#

The docs also say this

#

But the docs are fucking ass

#

And its hard to tell if it applies to only the page

#

Or only the MSR?

#

Clanker says it applies to both and it seems to work so

#

πŸ’€

#

Here you go

#

Il be pushing my changes after I sleep

#

But I did end up managing to confirm the hyperv shit 😭

hazy saddle
#

done

#

i should sleep soon

#

tomorrow may be another break day

#

But I'm probably going to implement x86 scheduling

#

I am really considering getting a buddy allocator at some point too

#

That would be nice for certain things

magic saffron
hazy saddle
hazy saddle
#

i wonder if i should consider 32 bit support

#

i can use recursive page tables on 32bit platforms

#

which would help a good bit

wide mica
hazy saddle
#

though riscv cant support them sadly

#

id probally hide the fact paging is recurrsive from the arch generic parts

#

eg virt -> phys

wide mica
hazy saddle
#

il still probally still only do i686 systems with apic/ioapic though

clear bison
#

You'll have to do MP tables parsing

#

Which is pretty easy tbf

wide mica
#

I wouldn't do 32-bit x86 idk

#

there are other funnier arches

clear bison
#

Yeah do AVR trl

wide mica
#

avr isnt even real

#

isn't it harvard

clear bison
young hamlet
#

avr is horrific

wide mica
#

not von neumann = not real

clear bison
young hamlet
wide mica
#

quick reminder that von neumann is goated

#

actual extreme genius

wide mica
young hamlet
clear bison
#

That's what you get

wide mica
#

why do they even use AVR btw

clear bison
wide mica
#

why not ARM

#

or risc-v

#

risc-v has very stripped down sets

young hamlet
clear bison
#

Probably because at the time it was probably cheaper to use that

clear bison
wide mica
#

probably not

#

but like

#

use anything else

young hamlet
#

u had mips

wide mica
#

rip MIPS u were awesome

#

now they replaced it with stupid RISC-V

#

loongarch is what risc-v should've been

clear bison
young hamlet
young hamlet
#

like ive never seen anyone speak so fondly of loongarch aside from this discord server

wide mica
young hamlet
clear bison
young hamlet
wide mica
#

it's like risc-v but not made by idiots

clear bison
#

It's like risc-v but actually well done

young hamlet
#

it just looks like mips to me

wide mica
#

yeah

#

it is mips

young hamlet
#

the dmw thing just looks like kseg on steroids

wide mica
#

risc-v aimed to be the "new MIPS" but loongarch did that way better

clear bison
#

What if you make loongarch short

#

Does it turn into shrtarch

young hamlet
#

people will use something if everyone else uses it

clear bison
#

I wonder what ISA are supercomputers using nowadays

#

Probably x86

#

Or maybe ARM

wide mica
#

powerpc

young hamlet
wide mica
#

yeah

#

ah it's called Power now

#

there's still a supercomputer running it

young hamlet
#
hazy saddle
wide mica
#

also risc-v if you count gpus

clear bison
#

Are GPUs risc-v???

wide mica
#

yeah

#

nvidia chips are risc-v

clear bison
#

Huh

#

Weren't they some custom arch

wide mica
#

why do that when you can use risc-v for free

clear bison
wide mica
#

i never said which chips

#

i said they had risc-v chips

hazy saddle
#

I think when I redo my paging reworks il also do recursive mappings

#

i will probally have an hddm slab and a virt slab implementation

#

Where the HHDM one is for small objects to reduce overhead on them and for where it's not a slab for a specific object later in the runtime process

wide mica
#

I do rely on the hhdm for small slabs but I don't particularly like it because it wouldn't really be portable to 32 bit

hazy saddle
#

thast why two allocator impls

#

one for 32bit one for 64bit

#

that or i do what linux does and have a small hhdm for thoes allocs

wide mica
#

I'd just have a ifdef

hazy saddle
#

issue is id probally archtecture them alot diffrently

#

since one will heavily use the pfndb

fiery tangle
#

Weekly check in on this server :3

#

Hows it goin?

jade olive
fiery tangle
jade olive
#

yoooooooo
wanna try and run my os? :3c

#

my i486 is about 150km/95miles away from me currently :c

tender mantle
jade olive
#

cuz it's fun :3

jade olive
hazy saddle
#

Linux dosnt even support 486 anymore

#

And 32bit support would be a side project later

#

And most definitely be a fork I'd maintain a bit seperate while working on and off it

jade olive
wide mica
hazy saddle
tender mantle
#

Hey @hazy saddle

#

Have you considered supporting the 286?

#

It’s really fun

#

No stupid paging, no way to go from protected to real mode without a warm reset

hazy saddle
tender mantle
#

No 32 bit addressing iirc

hazy saddle
#

you are lucky we arent in od3

tender mantle
#

Evalyn is paid off by big paging

hazy saddle
#

and you are lucky i like you too much to not mute you even for a joke ;3

hazy saddle
tender mantle
hazy saddle
#

πŸ’€

hazy saddle
#

i would want to make my own PCB for it tbh

#

And get one that has an MMU

#

And make a board for it

#

Connect a serial port up to it

#

How much ram do these usually have too mmLol

#

Because I'm worried about some of my data structures not being the most efficient with ram usage in all cases

viral bison
#

and also very expensive on ebay πŸ’€

young hamlet
#

Xtensa would be very based

hazy saddle
viral bison
hazy saddle
#

i think the main issue would be the rest of the PC

viral bison
#

with this stuff it's not that bad

#

the frequencies are pretty slow

hazy saddle
#

issue is id want both socketable ram and a cpu

viral bison
#

then you want the DIP version of the cpu

#

and ram

#

or make custom ram pcbs

hazy saddle
#

and a 16550 UART + a firmware flash chip and some readable and writable storage

hazy saddle
viral bison
#

oh

hazy saddle
#

same for qfp

viral bison
#

never seen the adapters

#

then yeah it's fine

hazy saddle
#

and the 68040 has no DIP version

viral bison
#

i can make you some pcb now if you want

hazy saddle
#

only ones lacking an MMU have one

viral bison
#

ah

hazy saddle
#

though idk how easy 512mb ram would be to put there

viral bison
#

k, gimme a list of features

viral bison
#

you would need to order a second pcb tho

#

so you can get ram sticks

hazy saddle
# viral bison k, gimme a list of features
  • m68k 68040
  • 512m ram
  • 256m of some presistent flash storage
  • 4m of flash for firmware to hold dtb and boot routines
  • one or two 16550 UARTs
  • paddr 0 being reserved / always returning zeros if possible
  • if you feel crazy maybe could even use an rp2350 to drive an HDMI display and have some shared vram for this to give an emulated text mode VGA thing trl
viral bison
#

why not vga, lol

hazy saddle
#

that should be enough to port my kernel to

hazy saddle
viral bison
#

i mean, i can just remake a whole gpu trl

hazy saddle
#

😭

#

Maybe if there is an FPGA on the board for some of this

viral bison
#

hmm, true, that is a good idea

#

a lot of fpgas are cheap AF

#

k, time to find a socket for it, lol

viral bison
#

ok i hope the socket is not crazy hard to solder

hazy saddle
#

if i getg money for this

#

im paying you to assemble it

#

😭

viral bison
#

i'll try to make it as cheap as possible

hazy saddle
#

I also wonder if debian could boot on this too

#

fuck

#

its also big endian

#

well that will be fun

viral bison
#

πŸ’€

#

FUCK πŸ’€

#

why are these so expensive

wide mica
#

it's not like 6502

hazy saddle
#

Atleast the sockets for the firmware and the main storage chip would be chill

viral bison
#

those yes

#

wait, tf it means 179 PGA on the mpu??

#

the largest connector i have are either 176 or 225 pins

coarse oasis
viral bison
#

oh god i hate that datasheet

#

why the fuck did they use a non standard shape

#

ok @hazy saddle the PGA socket needs to be ordered somewhere else

hazy saddle
#

damn wahhgone

viral bison
#

on digikey πŸ’€

#

let's check on mouser and hope

hazy saddle
#

You also probably can hard wire two of the physical addresses to zero / ignore them

#

And only have 1gb paddr space

#

Which is fine for the specs

viral bison
#

it still could not fit on a 17x17

#

the footprint is different

#

πŸ’€

#

21 bucks for shipping from the US

#

and it's the only one i found

hazy saddle
#

At least it will still be cheaper than a normal PC because the ram and ssds

#

😭 πŸ™

viral bison
#

those connectors are so rare

viral bison
hazy saddle
#

i also wonder if you will need space for a cooler on the thing

viral bison
#

a fan would suffice

hazy saddle
#

still would need a mount and some heatsink

viral bison
#

so, we need to find a socket i can use in the pcb

#

else the cpu will have to be soldered

hazy saddle
#

which wouldnt be good for rare chips

viral bison
#

and then we'll have to be lucky

hazy saddle
#

I wonder if there are any QFP m68ks online?

#

Also

#

The Motorola 68060 ("sixty-eight-oh-sixty") is a 32-bit microprocessor from Motorola released in April 1994. It is the successor to the Motorola 68040 and is the highest performing member of the 68000 series. The 68060 is the last development of the 68000 family for general purpose use, abandoned in favor of the PowerPC chips. Two derivatives we...

#

Is this one any better?

#

Like in availability

viral bison
#

lemme check the package

viral bison
#

i think gpt found something

hazy saddle
#

No FPU though

viral bison
#

yes, one has

hazy saddle
#

Oh yeah maybe

viral bison
hazy saddle
#

Why use chatGPT

#

And not Google it lol

viral bison
#

fast research

#

and google is shit anyway

#

look at what i found

#

these will need to be soldered on tho

hazy saddle
#

That may be acceptable given the price here

#

Especially if they have the MMU

#

We may need one of these chips

#

It has UARTs and a timer

#

@viral bison

viral bison
#

Cool

#

Or else i could try to find something more modern in case

hazy saddle
#

Could be nicer to have a modern timer

#

16550 UARTs are the gold standard though if we can use thoes

hazy saddle
#

somthing like this for the memory map could be good? the 0th page would have to be firmware due to being reset vector stuff

{PADDR BIT 31 && 30 = [0, 0]}  0x00000000 - 0x003FFFFF [FIRMWARE] (4 MB)
{PADDR BIT 31 && 30 = [0, 1]}  0x40000000 - 0x5FFFFFFF [RAM]      (512 MB)
{PADDR BIT 31 && 30 = [1, 0]}  0x80000000 - 0x83FFFFFF [MMIO]     (64 MB)
{PADDR BIT 31 && 30 = [1, 1]}  0xC0000000 - 0xCFFFFFFF [STORAGE]  (256 MB)
wraith star
#

what arch is this?

hazy saddle
#

m68k

wraith star
#

ooo

hazy saddle
#

May be making a custom PCB for it

#

Could be fun

#

Probably will have an FPGA for address shit and interfacing with external hardware

#

i also had the most evil idea

#

make the frimware implement UEFI

coarse oasis
hazy saddle
hazy saddle
# viral bison

And these are probably than an FPGA capable of running the full thing

#

Verses just needing to handle a flash chip and some memory mapping and some UART/timers or whatever else the FPGA will do

#

It could easily embed the UART and IRQ controller and timer shit

coarse oasis
#

i think the biggest problem is unless you're making your own pcb, it's hard to find dev boards that have enough io broken out

hazy saddle
#

I mean apparently @viral bison can do PCB stuff

coarse oasis
#

for some reason the largest io header i saw was 40p with 34 usable ios

hazy saddle
#

Only issue is money since I have none to build this

#

πŸ₯€

coarse oasis
#

on a xilinx fpga dev board

hazy saddle
#

I did see one that was like 300 bucks from AMD and had CM5 connectors on the bottom

#

So it would have enough IO

#

But uhhh

#

Expensive

viral bison
#

Lol

coarse oasis
#

the one i have was like 100 bucks from mr aliexpress

coarse oasis
viral bison
#

Almost none that are actually good

hazy saddle
#

BGA isnt an issue if the PCB company can assemble thoes parts

coarse oasis
#

true

#

well it is an extra design challenge

viral bison
#

I can too, it's not an issuebreally

#

Unless it' very big

coarse oasis
#

and it basically forces you to have >2 layers

viral bison
#

At least 6 layers for bga

#

Else gl

hazy saddle
#

What do you think of an rp2350 acting as a VGA text mode buffer device for this too

coarse oasis
#

i mean if you're getting an fpga why not move as much stuff to it

#

generating a vga signal is ez

viral bison
#

Yeah

#

Just look at ben eater's video

coarse oasis
#

with a bit of impedance matched routing you can even get hdmi dvi with not that much extra logic if you pick the ios right :^)

hazy saddle
#

Well dvi but mm

viral bison
#

Hdmi is a pita

#

Bc it's hard to find the ics

coarse oasis
#

haven't looked into dvi but hdmi was ez on xilinx

hazy saddle
#

I mean if you are designing hardware you know alot more about that than me 😭

coarse oasis
#

no ics needed, just set the io standard to TMDS_33, then do encoding in fabric

hazy saddle
#

I just want something usable for making software on that's not impossible to build in 2026+

viral bison
#

Oh yeah if you have a fpga it' ez

coarse oasis
#

i don't even use OSERDES i just have a shift register and DDR buffers :^)

hazy saddle
#

If we put alot of it into the FPGA it could also do a regular framebuffer too mmLol

viral bison
#

I plan to make my own riscv computer too

#

3x cpus

coarse oasis
#

problem with a full framebuffer is memory

#

fpgas don't have that much block ram

viral bison
#

Connect external ram

coarse oasis
#

like, on an artix 7 100t a 640x480 8bpp fb would take 60% of all available block rams

coarse oasis
viral bison
#

Yeah

urban mulch
#

Yeah you don't get to not connect external RAM to an FPGA

viral bison
#

Huuh, why not

#

It def is possible

urban mulch
#

You can't fit almost anything in them

viral bison
#

Oh wait

hazy saddle
#

Something like DDR3 would allow for enough ram for the framebuffer and the system ram

urban mulch
#

If you don't have ext ram

viral bison
#

I misread

clear bison
coarse oasis
#

well ig depends on resolution

urban mulch
hazy saddle
#

true but ddr3 would be easier to source and be socketable i presume?

urban mulch
#

If you want you know more than 0 memory for it

coarse oasis
#

if you want it to be dimm modules then sure

urban mulch
#

soldered

coarse oasis
#

but then that's even harder to design for

hazy saddle
#

socketable is nice but it may have to be soldered. how much capcity/speed can SDR reach?

coarse oasis
#

200MHz clock is probably max of max (on my fpga board i have 166MHz-rated ram that runs fine at 200MHz), capacitywise probably max 64MB per chip or so?

#

the board i have has a single 32MB chip

#

with a 16 bit data bus

urban mulch
coarse oasis
#

yeah

#

well i think you can find 233MHz rated chips, and the extra 33MHz might be doable?

#

but i think that's basically the max sdr sdram was rated for by the manufacturers, and it's pretty rare even then

hazy saddle
#

i mean thats plenty for a small FB

urban mulch
#

FPGAs aren't really rated for a specific clock speed. That depends on your design.

coarse oasis
#

yeah

urban mulch
#

There's typical numbers though. The fancier the FPGA, the higher that gets.

#

You can expect a small Artix-7 to reach abouts 100MHz and 200MHz if you really pipeline the snot out of everything, for example.

coarse oasis
#

i mean my kinda subpar design runs at 200MHz on artix 7

#

although just barely

#

but that's anecdotal

urban mulch
#

Yeah but that's prob not on one of the small chips right

coarse oasis
#

yeah 100t

urban mulch
#

100t and 200t use a different process node than the smaller ones

#

afaik

coarse oasis
#

hhu

#

h

urban mulch
#

Making them slightly faster on average

hazy saddle
#

i also wonder if the FPGA could handle DMA for the storage aswell along with memory mapping it mmLol

#

ive never really dipped into them much

viral bison
#

given you can fit the whole cpu inside them

hazy saddle
#

True

#

I want to fit as much as possible to the point it's just the physical CPU and the FPGA acting as a south bridge managing the ram and all the peripherals

viral bison
#

what cpu tho

#

the m68k?

hazy saddle
#

Yes

viral bison
#

it can work

hazy saddle
#

You could probably reuse alot of this design for the riscv stuff too couldn't you?

viral bison
#

idk, riscv has ethernet and more

hazy saddle
#

But using other devices on the FPGA

hazy saddle
#

And other things

viral bison
#

also wdym with managing the ram?

hazy saddle
#

Being the memory controller?

viral bison
#

hmm, i tought the m68k had it integrated, lol

#

anyway, time to come up with a plan for the implementation then

clear bison
viral bison
#

oh you wanna use ddr3 with m68k?

#

πŸ’€

hazy saddle
viral bison
#

ok that would be interesting

hazy saddle
#

What kind of dram did it use

#

But using moderm ram for it would be nice if possible

wide mica
#

probably sram

#

not dram

viral bison
#

i'm not getting 512 megs of sram for cheap, you can say bye to that XD

hazy saddle
#

Last time I checked sram it couldn't reach 512mb that easily

#

😭

viral bison
#

we'll try ddr3 via the fpga

viral bison
#

lol

wide mica
#

but i meant machines used sram

#

of taht time period

#

probably

#

idk

viral bison
#

they prob did

wide mica
#

i am very useful to this conversation

viral bison
#

it isn't really hard to drive an sram

#

so yeah we'll have to make a ddr3 to sdram interface πŸ’€

#

i mean, the cpu runs at 33 / 25 MHz

#

so the ddr3 will def be fast enough to act as sram

coarse oasis
clear bison
# hazy saddle It did?

Apparently some m68k embedded variants had an integrated memory controller, but the usual ones used an external one

#

Most of what i found had DRAM controller actually

coarse oasis
#

i mean problem is that it's likely for the older dram standards

#

like fpm/edo or whatever

viral bison
#

yeah, we'll prob need a ddr3 to sram interface

#

and that needs an fpga with a lot of IO

coarse oasis
#

that doesn't really work since without a specially design controller you don't have predictable delays

#

unless you mean sram with a valid/ready interface or thereabout

#

(which works for the m68k due to it having dtack natively)

#

although at that points it's basically just a ddr3 controller with a m68k bus interface no?

viral bison
#

basically yes, lol

#

tho i think it's the only way we can get ddr3 on here?

coarse oasis
#

i mean that's basically how it's done, sub m68k bus interface for some other bus protocol

clear bison
hazy saddle
#

well this will certainly be fun to work on

#

hopefully sombody else can help with FPGA stuff yaaar

#

but making the firmware and the kernel port should be fun

#

speaking of which i need to stop feeling lilke crap and finish sched stuff

viral bison
#

(tho i deeply hate vhdl)

hazy saddle
#

I did hear there are some apparently nicer HDLs?

viral bison
#

system verilog

#

it's a bit better

#

still hell

hazy saddle
#

Should we use an SD card at this rate though

#

And just provide a controller the m68k can use

viral bison
#

i mean, it's def possible

#

we can instead of an fpga use a couple of MCUs acting as bridges also

#

especially ST's ones

hazy saddle
#

We probably do want an FPGA for managing the memory bus though

viral bison
#

that have a flexible mem controller

hazy saddle
#

Since that needs to be high speed

viral bison
#

ST can reach like 100MHz+ mem speeds on that mem controller

hazy saddle
#

Atleast for DRAM, MMIO access can be slower ofc

hazy saddle
viral bison
#

the st can easily run at 500mhz+

#

(and i get them for free)

hazy saddle
viral bison
#

depends if you use DMA + FMC i think

#

we can go the easy path with st, or harder path with fpga

hazy saddle
#

You'd still have to decode the address aswell. Read 32GPIOs too

#

Is the GPIO that fast on there?

viral bison
#

no need to read gpios

#

the fmc handles the memory easily

hazy saddle
#

The m68k part

#

😭

viral bison
#

you can use fmc to interface 2 mcus / mpus

hazy saddle
#

Wait wtf 😭

viral bison
#

lol

hazy saddle
#

What's the fmc again

viral bison
#

flexible mem controller

hazy saddle
#

Like whats the spec sheet / docs

viral bison
#

you make the bus act as a memory trl

#

anyway just read up the docs on the FMC

#

they explain everything

hazy saddle
#

So could you say have the micro act as a memory bus for both and handle ddr3

#

And have other devices emulated and also do DMA

viral bison
#

no, ddr3 def not

#

an mcu cannot use it

#

an mpu yes

#

if you want ddr3 we have to go with a fpga

hazy saddle
#

Or like any kind of ram

#

If it can be enough

#

Other issue is 5v level shifting

viral bison
#

ddr3 might be the cheaperst i think

viral bison
#

they won't be an issue

#

it's basically just 2 transistors

hazy saddle
viral bison
#

ye

#

and one with at least 128 gpios

#

or more

hazy saddle
viral bison
#

eh, it can be used for IPC too

#

with some dark magic

hazy saddle
#

πŸ’€

#

It also seems like it couldn't do 512m?

viral bison
#

it 100% can

viral bison
#

it's 32 bit

hazy saddle
#

Yeah wouldn't that cause issues? There is only 256m of banks

viral bison
#

?

#

it literally says 512MB

hazy saddle
#

Isn't that DDR something else??

viral bison
#

no

#

DDR = ram

hazy saddle
#

Yes

#

I know but it's not external ram connected?

#

I mean

#

😭

viral bison
#

it is

hazy saddle
#

If you can do the black magic

#

And it works well

#

Please show me

#

I'm confused af

viral bison
#

the mp1 is expensive AF

#
  • bga
#

i'm gonna stay away from that mpu, lol

#

also, mp2 exists and it's 64 bit

hazy saddle
#

How much is it, you did get them from free apparently 😭

viral bison
#

the mcus (h7)

#

not mpus

hazy saddle
#

Can thoes do this?

viral bison
#

they do have FMC too

hazy saddle
#

Using a full CPU also feels like cheating

viral bison
#

then fpga route?

hazy saddle
#

Probably

#

And the FPGA would allow having 16550 UARTs on the memory bus

#

And other fun stuff

viral bison
#

easy 195 IOs

#

perfect

#

and 700kbit of ram

hazy saddle
#

And an IRQ controller and a high resolution timer and an interrupting timer

viral bison
#

fuck yes, it comes with integrated interfaces for ddr3 too

#

and LVDS

#

(display)

hazy saddle
#

Ooooo

#

That would probably need conversion to a proper port though?

viral bison
#

LVDS -> eDP exist

#

and eDP should in theory be 1:1 compatible with DP

hazy saddle
#

Also it seems to do non LPDDR3

viral bison
#

ye

hazy saddle
#

Could we do a sodimm?

viral bison
#

yes

#

connectors exist

hazy saddle
#

πŸ”₯

hazy saddle
#

if you build this and ship me one il make a ton of ze firmware and work on the fpga things with you

viral bison
#

i hope bga won't kill me first

#

but ok

#

lol

hazy saddle
#

check PCB websites

#

they could solder it for you

viral bison
#

assembly is expensive AF

#

i already checked XD

hazy saddle
viral bison
#

so, what should we connect to this fpga?

#

other than ddr

hazy saddle
#

The m68k of course

#

An SD card for storage

viral bison
#

oh sd card

#

not flash?

hazy saddle
#

We need one flash for firmware

#

One SD card for the main storage

#

We could do flash for both?

#

SD may be nicer though

viral bison
#

idk how much more complex an sd card driver is

#

it should prob be checked

hazy saddle
#

i mean its just SDIO?

viral bison
#

yes

#

tho remember we have only around 20k cells

#

and 1Mbit of integrated ram

coarse oasis
viral bison
#

800 mbps i think it refers to video

#

tho it also has MIPI

coarse oasis
#

i mean bitrate is a generic value for a serial stream

viral bison
#

oh wait, i think MIPI is for camera only

#

f

coarse oasis
#

mipi has a display protocol too

#

but csi is the camera one

viral bison
#

not here

#

here is just CSI

hazy saddle
#

we may have to just do vga text mode with this

#

but thats fine

viral bison
#

vga driver is very simple anyway

#

tho i think LVDS can easily be used for display anyway

#

fuck wait

#

that one does not have the DDR3 interface

#

we need the better version

#

lemme check

#

it's x2 more expensive πŸ’€

#

@hazy saddle

#

but has like double the cells

#

and way more gpios

hazy saddle
#

It's still cheaper than the CPU

viral bison
#

yeah, lol

hazy saddle
#

And it potentially means we could cream maker peripherals

viral bison
#

yep

#

double the blocks means way more logic

hazy saddle
#

And connect am nvme

viral bison
#

πŸ’€

hazy saddle
viral bison
#

i mean

#

it prob isn't fully impossible

#

but why

hazy saddle
#

But then the firmware needs an nvme driver

viral bison
hazy saddle
#

Well

viral bison
#

or usb

hazy saddle
#

That would just be part of PCIe

#

If we did that

viral bison
#

no

#

ethernet needs a PHY

#

it's not pcie

hazy saddle
#

Plug in an Ethernet card

viral bison
#

or that, yeah

hazy saddle
#

I mean

#

You could design it to have two PCIe slots

#

And an m.2

#

And then plugin USB and Ethernet

viral bison
#

m.2 is just pcie

hazy saddle
#

Yes I know

#

But the physical connector is different

viral bison
#

tho we need at least 1 lane per device

tender mantle
#

pcie on a m86k?

viral bison
hazy saddle
hazy saddle
tender mantle
hazy saddle
#

Yes

#

They may attempt that

#

If we do this 😭

tender mantle
#

πŸ”₯

viral bison
#

i can always route them

#

and not place any comps

#

ok fuck

#

no pcie for us

#

we need a dedicated PHY

hazy saddle
#

I mean we need some PHYs for the UART

viral bison
#

pcie is not that simple

hazy saddle
#

Yes yes

#

What if

#

We implemented virtio

#

On this 😭

viral bison
#

πŸ’€

hazy saddle
viral bison
#

ok usb or ethernet, but not that πŸ’€

floral kettle
#

attach a bluetooth chip over sdio and get internet over it from a phone trl

viral bison
#

i mean, it also works

hazy saddle
#

We could do PS/2 foe the keyboard and maybe an esp32 to act as a network controller??

viral bison
#

ps2 is ez af

hazy saddle
#

Indeed

clear bison
#

Why are we trying to design a m68k as if it were a modern computer 😭

viral bison
#

why not trl

clear bison
#

It's horrible

viral bison
#

i mean, this interface can be exchanged for every cpu that has a 32 bit bus anyway

clear bison
#

It's like putting a 6502 in charge of a last gen nvida graphics card

#

Like bro πŸ™

viral bison
#

it's fun

clear bison
#

You'll reconsider what fun means once you implement all of this crap using a HDL

viral bison
#

good project for uni XD

#

i mean, the ddr3 controller should come pre-done afaik

#

so it's just a matter of interfacing it

hazy saddle
#

The other stuff is a stretch

hazy saddle
clear bison
#

What UART btw

hazy saddle
#

16550

clear bison
#

πŸ’€

hazy saddle
#

😭

#

I already have a driver for it

clear bison
#

You know the m68k family already haves an UART

#

What is this Frankenstein machine

hazy saddle
#

If we have an FPGA alot can just be handled there

urban mulch
clear bison
#

Bad larp

hazy saddle
clear bison
#

Historical butchery

viral bison
#
  • that fpga could in theory work with every 32 bit processor that has a 32 bit buffer
hazy saddle
#

This will just be a fucking Frankenstein of bullshit

viral bison
#

also, we could in theory get 1080p+ DP video out

urban mulch
clear bison
#

I present to you the Bullshitosch Amiga 7000

hazy saddle
urban mulch
#

Are you porting Limine to 32-bit and m68k as well now?

urban mulch
#

😭

hazy saddle
#

The more bullshit the better if it can be pulled off

#

😭

hazy saddle
urban mulch
#

At this point implement a virtio interface for something inside the FPGA

clear bison
#

This is m68k not x86 or some random MIPS workstation aiming for x86 card compat

#

πŸ’”

hazy saddle
#

And just fucking make the most cursed m68k board possible

#

Ala wheat force

viral bison
#

let's put a fucking athlon instead of that m68k trl

#

i mean, it will have high changes of working

clear bison
#

Amigatosch ST dev board

viral bison
#

as i said, that fpga interface is pretty global anyway

#

lol

urban mulch
hazy saddle
#

Yeah but m68k first

clear bison
#

Please touch some actual m68k hardware for the love of god πŸ™

hazy saddle
#

We need to make an abomination

tender mantle
#

nope :3

#

it would be funny to put a real m86k on the board tho

#

even if it isn't the main cpu as like an i/o controller or something lol

hazy saddle
tender mantle
#

fpga != real m86k

clear bison
#

If you end up making it find one of those commodore amiga forums and post your crap there

hazy saddle
#

The m68k is real

#

The FPGA is the south bridge

tender mantle
#

OHHH

#

okay

#

that's neat

clear bison
urban mulch
hazy saddle
#

So are you in on this project

urban mulch
#

I'll do some wacky FPGA shit sure but it's still your project

hazy saddle
#

Ofc ofc

#

Diamond master handles pcb and assembly

#

You do FPGA

#

I handle the software

urban mulch
#

I'll cobble together some standard IP

#

What model FPGA u doin btw

hazy saddle
#

@viral bison

#

They are picking that out

urban mulch
#

Bonus points if it is a Xilinx one since I have xp with it

viral bison
#

nah

#

it's a way less expensive one

viral bison
#

?

urban mulch
#

You don't want random no name in FPGA space

viral bison
#

docs seem pretty solid tbh

urban mulch
#

It's also only 31K LUTs??? You could just get an Artix-7 50T and it'd be better

viral bison
#

"only"

#

it's the one that has the most πŸ’€

#

in that price

#

the artix 7 is expensive

urban mulch
#

31K LUTs is not going to be enough for a core with proper MMU by my estimates

viral bison
#

?

#

we using a real cpu

hazy saddle
urban mulch
#

oh

hazy saddle
#

The m68k is a physical one

#

The FPGA is the south bridge

urban mulch
#

That makes things a lot simpler

urban mulch
viral bison
#

yes

#

that's how it is gonna communicate with the cpu

urban mulch
#

I can get you a VGA controller and PS2 I/O easy with that.

viral bison
#

data + address pins all to the bridge

urban mulch
#

NS16550 compatible UART I can do too

viral bison
#

we have LVDS on that fpga too

urban mulch
#

What other I/O we adding?

viral bison
#

for eDP

viral bison
#

and idk what else evalyn wants

#

maybe usb

urban mulch
#

What controls the DDR3

viral bison
#

DDR3 should have a dedicated block already

hazy saddle
viral bison
#

in the fpga

clear bison
#

Nuclear bomb trigger

hazy saddle
#

SD card flash and the DDR should be eveything needed for a working machine

clear bison
#

So it fucking explodes when you manufacture it

urban mulch
viral bison
#

yes afaik

#

the m68k is like 40MHz max

#

but the qfp that we want are like 25Mhz or 33 MHz

urban mulch
#

lmao why are we putting DDR3 on something that runs at 25MHz

viral bison
#

cheap

urban mulch
#

no

viral bison
#

i mean, that fpga works with ddr2 too

clear bison
urban mulch
#

DDR3 is going to make your PCB very expensive

viral bison
#

heh, not really

clear bison
urban mulch
#

You need very fancy PCBs to do DDR3 right

viral bison
#

we gonna need 6 layers already

#

and it's very cheap if the dimensions are contained

#

6L comes with fancy features already

urban mulch
hazy saddle
#

How much better would ddr2 be yaaar

urban mulch
#

And I hope you've found some friends willing to teach you how to hook it up in a way it won't explode due to noise

viral bison
#

DDR2L*

viral bison
#

they work on this stuff

urban mulch
viral bison
#

this only has LPDDR2 max

urban mulch
#

Given that we're running a 25MHz m68k that doesn't expect more than like 32MB of physical RAM from its time period

viral bison
clear bison
hazy saddle
#

I do wonder how bad performance may be

urban mulch
#

Well my point is you don't need a fucking impedance matched PCB with length tuning on all the traces for DDR2

hazy saddle
#

Should be fine even with a micro kernel

urban mulch
#

DDR3 is nominally 2.8+GT/s

clear bison
urban mulch
#

DDR2 is going to be more than fast enough

viral bison
clear bison
urban mulch
viral bison
#

or well, impedance control

urban mulch
#

You need to have your PCB manufactured with impedance control and then you need to put the right resistors and capacitors in the right places

clear bison
viral bison
#

and they will try to keep them as close as possible

hazy saddle
viral bison
#

i don't think you need inline resistors for ddr3

hazy saddle
#

I think the model we picked is the best one with an MMU and FPU and being non PGA

clear bison
#

50-75MHz

hazy saddle
#

Ah neat

clear bison
#

Max CPU clock rate

hazy saddle
#

I wonder if @viral bison can find one that could work for this

clear bison
#

You could definitely overclock it too

hazy saddle
viral bison
viral bison
#

fuck

#

wait

#

206 pins

#

and no socket exist for 206 pins

#

BRUH

urban mulch
#

this board is gonna be an abomination

#

and also is gonna cost upwards of 300$

viral bison
#

prob no

urban mulch
#

at the rate we're going

viral bison
#

way less

#

the fpga will be the most expensive part + cpu

urban mulch
#

You're overly confident in how cheap an unassembled 6-layer PCB will be

#

esp one as big as we'll need

viral bison
#

pretty cheap

urban mulch
#

there's no way

#

did literally everything I'm talking about get cheaper by half since a year ago?

viral bison
#
  • i can use coupons trl
urban mulch
# viral bison

oh so it literally did get cheaper by a significant amount in just one year

viral bison
#

yep XD

#

and with coupons you get it for way cheaper

urban mulch
#

You'd be shelling out like €70 for that a year ago iirc

clear bison
hazy saddle
clear bison
#

Here it is the socket

hazy saddle
clear bison
#

I've definitely seen it at less than 10 euros before

viral bison
viral bison
#

πŸ’€

urban mulch
# viral bison πŸ’€

If that's your reaction to "make the footprint yourself", you shouldn't be making this PCB

viral bison
#

no i mean, i normally make them

#

but 206 pins is hell

urban mulch
#

what did you think EEs do all day

viral bison
#

well, time to find the pinout first

hazy saddle
#

we may also want to not use VGA text open, my kernel may very much not like that

#

if we can help it atleast

viral bison
#

we will use eDP anyway

#

so framebuffer

hazy saddle
#

major typo

#

😭

#

vga text mode

urban mulch
#

Well weren't we putting the crtc in the FPGA anyway

hazy saddle
#

my kernel wants full colors and unicode that FT does

urban mulch
#

we can make it do anything the fuck we want

hazy saddle
#

i was just noting the change

urban mulch
#

In fact this makes my job easier

hazy saddle
#

What framebuffer specs should we have

#

If we did use a 1gb ddr3 chip we could do 1080p 😭

#

Ddr2*

urban mulch
#

I have a ready to use CRTC that only needs hooking up to memory

#

And it's fully configurable

#

So basically we can make it do anything really

hazy saddle
#

i think this could be the most cursed mk68 based machine

urban mulch
#

for sure

viral bison
#

and we have LVDS out anyway

#

so ez

urban mulch
hazy saddle
#

We could expose the video controller as configurable?

urban mulch
#

I don't even have any DP monitors 😭

hazy saddle
#

Where you give it a physical memory address and the resolution and bpp

viral bison
#

it will get first converted to eDP

#

and then it should be 1:1 compatible with normal DP afaik

hazy saddle
#

Also @urban mulch should I make the firmware larp as a 90s x86 BIOS that does a POST and a ram counter and other stuff

urban mulch
#

ofc

hazy saddle
#

what about a PC speaker

urban mulch
#

also be prepared for your OS to be hella slow, it's gonna run at like 1/60 of what it usually does KEKW

viral bison
hazy saddle
#

It's a micro kernel so should be fineeeeeee

urban mulch
urban mulch
hazy saddle
urban mulch
#

we do PC speaker for the shits

viral bison
#

what interface does it even use?

urban mulch
#

That's a buzzer

#

It beeps

viral bison
#

ah

hazy saddle
urban mulch
#

Sometimes you can't even change the pitch of the beep

viral bison
#

lol, so it's not even a real speaker

urban mulch
#

nope

viral bison
#

why not i2s tho

urban mulch
hazy saddle
viral bison
#

meanwhile i'm fucking with xhci on my os

hazy saddle
#

Or should we use virtio for that

#

OR even better

urban mulch
viral bison
#

and it's causing random opcodes exceptions πŸ’€

hazy saddle
#

The Microsoft version of virtio

viral bison
urban mulch
#

You can do NVMe over deranged shit like UART

viral bison
#

πŸ’€

hazy saddle
#

The thing should still be usable for most things

viral bison
#

btw, we could prob get away with AGP or PCI trl

hazy saddle
#

So like we don't want the disk to be slow af

viral bison
#

maybe that too

#

idk if the fpga is that capable tho

urban mulch
#

ISA is simpler than either AGP or PCI

viral bison
#

cool

#

more cursed stuff

hazy saddle
#

Then you can have a 100mbps nic in theory

viral bison
#

finally found a fucking pinout

urban mulch
hazy saddle
#

And the m68k we will use is about as powerful as a pentium so

hazy saddle
#

But is it as fucked up

viral bison
#

i need the exact model we'll be going for btw

hazy saddle
#

The Motorola 68060 ("sixty-eight-oh-sixty") is a 32-bit microprocessor from Motorola released in April 1994. It is the successor to the Motorola 68040 and is the highest performing member of the 68000 series. The 68060 is the last development of the 68000 family for general purpose use, abandoned in favor of the PowerPC chips. Two derivatives we...

#

The one with MMU and FPU

viral bison
#

ok, which model πŸ’€

hazy saddle
#

Any clock speed should be fine

urban mulch
hazy saddle
#

I'm on the toilet rn

viral bison
#

the full chip name

hazy saddle
#

Give me a second then

viral bison
#

like MC68040FE40A

hazy saddle
#

fuck these are expensive

#

😭

#

MC68060RC50 / MC68060RC66

#

thoes ones have the MMU and FPU

#

they are all pin compatable though

viral bison
#

how expensive?

hazy saddle
#

these lack an FPU but could still work but eh
MC68LC060RC50
MC68LC060RC66
MC68LC060RC75

hazy saddle
viral bison
#

πŸ’€

hazy saddle
#

without an FPU its fine though

viral bison
#

but we would prob need the fpu

hazy saddle
#

it supports emulation

clear bison
hazy saddle
#

also the FPU on these aparently werent good

clear bison
#

Fuck

#

Wrong message

clear bison
hazy saddle
#

i mean atp emulation wouldnt be that bad?