#EvalynOS
1 messages Β· Page 31 of 1
I also tried an old kernel build
It just fucking died
π
The docs also say this
But the docs are fucking ass
And its hard to tell if it applies to only the page
Or only the MSR?
Clanker says it applies to both and it seems to work so
π
@wraith star https://github.com/EvalynGoemer/evalynOS
Here you go
Il be pushing my changes after I sleep
But I did end up managing to confirm the hyperv shit π
https://github.com/EvalynGoemer/evalynOS/commit/cfa14dc4fdb5a91ab24326947b343dec7d4c94ce
https://github.com/EvalynGoemer/evalynOS/commit/db95130a87a71acc62d1405c52253c27925e8607
done

i should sleep soon
tomorrow may be another break day
But I'm probably going to implement x86 scheduling
I am really considering getting a buddy allocator at some point too
That would be nice for certain things
what do you mean by x86 scheduling? (after you have slept)
the schedular + x86 context switch functions && related helpers
i wonder if i should consider 32 bit support
i can use recursive page tables on 32bit platforms
which would help a good bit
in fact you should use them on 64-bit π

though riscv cant support them sadly
id probally hide the fact paging is recurrsive from the arch generic parts
eg virt -> phys
there's probably a trick to emulate them
il still probally still only do i686 systems with apic/ioapic though
Yeah do AVR 
Wdym it isn't real
avr is horrific
not von neumann = not real

holy shit
bare in mind, this isa is being used on cpus in microcontrollers
Well you're using u64's in a weird 8/16-bit crap
That's what you get
why do they even use AVR btw

because they wanna sell you bullshit that makes them as much money as possible
Probably because at the time it was probably cheaper to use that
Did risc-v even exist when avr started being a thing lol?
u had mips
rip MIPS u were awesome
now they replaced it with stupid RISC-V
loongarch is what risc-v should've been
Is that really suited for shitty microcontrollers
why do people here like loongarch so much
like ive never seen anyone speak so fondly of loongarch aside from this discord server
it's nice to work with
fuck it man why not
I know there are very stripped down MIPS variants but like
in what way
It's like risc-v but actually well done
it just looks like mips to me
the dmw thing just looks like kseg on steroids
risc-v aimed to be the "new MIPS" but loongarch did that way better
imo, all these ISAs try to do basically the same shit but are driven mainly by what infrastructure they have
people will use something if everyone else uses it
IBM are still going strong in banking systems and shit
https://www.qemu.org/docs/master/system/ppc/pseries.html
https://openpowerfoundation.org/specifications/linuxonpower/
https://www.ibm.com/support/pages/ibm-power-virtualization-best-practices-guide
https://www.redbooks.ibm.com/redpapers/pdfs/redp4194.pdf
https://files.openpower.foundation/s/ZmtZyCGiJ2oJHim
https://wiki.raptorcs.com/w/images/f/f5/PowerISA_public.v3.1.pdf
This document is intended to address IBM POWER processor virtualization best practices to attain best logical partition (LPAR) performance. This document by no means covers all the PowerVMβ’ best practices so this guide should be used in conjunction with other PowerVM documents.
Atleast it's easy to test with and I actually have some working i686 hardware in a small laptop
Are GPUs risc-v???
why do that when you can use risc-v for free
Are you sure they're not risc-v cores for gpu management and shi like that?
I think when I redo my paging reworks il also do recursive mappings
i will probally have an hddm slab and a virt slab implementation
Where the HHDM one is for small objects to reduce overhead on them and for where it's not a slab for a specific object later in the runtime process
I do rely on the hhdm for small slabs but I don't particularly like it because it wouldn't really be portable to 32 bit
thast why two allocator impls
one for 32bit one for 64bit
that or i do what linux does and have a small hhdm for thoes allocs
I'd just have a ifdef
yeah
issue is id probally archtecture them alot diffrently
since one will heavily use the pfndb
-# trying to come up with a funny way to force evalyn to do i486 support
i think i got a i486 like 20 meters away from me :3
yoooooooo
wanna try and run my os? :3c
my i486 is about 150km/95miles away from me currently :c
why would you do this to someone π
cuz it's fun :3
most annoying part (for me) is lowk the fact that cmpxchg8b doesn't exist on i486 (it's from i586)
i686 is as far a I would go
Linux dosnt even support 486 anymore
And 32bit support would be a side project later
And most definitely be a fork I'd maintain a bit seperate while working on and off it
no fair :c
do m68k
Perhaps
Hey @hazy saddle
Have you considered supporting the 286?
Itβs really fun
No stupid paging, no way to go from protected to real mode without a warm reset

No 32 bit addressing iirc
you are lucky we arent in od3
Aww what? You donβt like segmentation
Evalyn is paid off by big paging
and you are lucky i like you too much to not mute you even for a joke ;3
im paid off by big anti-non64bit
You have muted me over a joke before tho
if i do m68k
i would want to make my own PCB for it tbh
And get one that has an MMU
And make a board for it
Connect a serial port up to it
How much ram do these usually have too 
Because I'm worried about some of my data structures not being the most efficient with ram usage in all cases
they are pretty expensive on digikey, lol
and also very expensive on ebay π
Xtensa would be very based
not thatttt bad
it's 35 bucks here π
i think the main issue would be the rest of the PC
i mean, i could make the pcb for ya
with this stuff it's not that bad
the frequencies are pretty slow
issue is id want both socketable ram and a cpu
and a 16550 UART + a firmware flash chip and some readable and writable storage
PGA is socketable
oh
same for qfp
and the 68040 has no DIP version
i can make you some pcb now if you want
only ones lacking an MMU have one
ah
would be nice
though idk how easy 512mb ram would be to put there
k, gimme a list of features
if you want socketable then pretty easy
you would need to order a second pcb tho
so you can get ram sticks
- m68k 68040
- 512m ram
- 256m of some presistent flash storage
- 4m of flash for firmware to hold dtb and boot routines
- one or two 16550 UARTs
- paddr 0 being reserved / always returning zeros if possible
- if you feel crazy maybe could even use an rp2350 to drive an HDMI display and have some shared vram for this to give an emulated text mode VGA thing

why not vga, lol
that should be enough to port my kernel to
the rp2350 can handle DVI/HDMI easily
i mean, i can just remake a whole gpu 
hmm, true, that is a good idea
a lot of fpgas are cheap AF
k, time to find a socket for it, lol
this is a PGA π
ok i hope the socket is not crazy hard to solder
i'll try to make it as cheap as possible
I also wonder if debian could boot on this too
fuck
its also big endian

well that will be fun
don't think they are produced anymore
it's not like 6502
Atleast the sockets for the firmware and the main storage chip would be chill
those yes
wait, tf it means 179 PGA on the mpu??
the largest connector i have are either 176 or 225 pins
yeah they were discontinued a few years ago
oh god i hate that datasheet
why the fuck did they use a non standard shape
ok @hazy saddle the PGA socket needs to be ordered somewhere else
damn 
You also probably can hard wire two of the physical addresses to zero / ignore them
And only have 1gb paddr space
Which is fine for the specs
it still could not fit on a 17x17
the footprint is different
π
21 bucks for shipping from the US
and it's the only one i found
At least it will still be cheaper than a normal PC because the ram and ssds
π π
those connectors are so rare
i mean, i have a few riscv cpus if you want with mmu
i also wonder if you will need space for a cooler on the thing
a fan would suffice
still would need a mount and some heatsink
so, we need to find a socket i can use in the pcb
else the cpu will have to be soldered
i can still design the pcb for it tho
and then we'll have to be lucky
I wonder if there are any QFP m68ks online?
Also
The Motorola 68060 ("sixty-eight-oh-sixty") is a 32-bit microprocessor from Motorola released in April 1994. It is the successor to the Motorola 68040 and is the highest performing member of the 68000 series. The 68060 is the last development of the 68000 family for general purpose use, abandoned in favor of the PowerPC chips. Two derivatives we...
Is this one any better?
Like in availability
lemme check the package
No FPU though
yes, one has
Oh yeah maybe
yep
fast research
and google is shit anyway
look at what i found
these will need to be soldered on tho
That may be acceptable given the price here
Especially if they have the MMU
We may need one of these chips
It has UARTs and a timer
@viral bison
Could be nicer to have a modern timer
16550 UARTs are the gold standard though if we can use thoes
somthing like this for the memory map could be good? the 0th page would have to be firmware due to being reset vector stuff
{PADDR BIT 31 && 30 = [0, 0]} 0x00000000 - 0x003FFFFF [FIRMWARE] (4 MB)
{PADDR BIT 31 && 30 = [0, 1]} 0x40000000 - 0x5FFFFFFF [RAM] (512 MB)
{PADDR BIT 31 && 30 = [1, 0]} 0x80000000 - 0x83FFFFFF [MMIO] (64 MB)
{PADDR BIT 31 && 30 = [1, 1]} 0xC0000000 - 0xCFFFFFFF [STORAGE] (256 MB)
what arch is this?
m68k
ooo
May be making a custom PCB for it
Could be fun
Probably will have an FPGA for address shit and interfacing with external hardware
i also had the most evil idea
make the frimware implement UEFI
could also just use a m68k core and have it all in the fpga :^)
Not as cool is it though 
And these are probably than an FPGA capable of running the full thing
Verses just needing to handle a flash chip and some memory mapping and some UART/timers or whatever else the FPGA will do
It could easily embed the UART and IRQ controller and timer shit
i think the biggest problem is unless you're making your own pcb, it's hard to find dev boards that have enough io broken out
I mean apparently @viral bison can do PCB stuff
for some reason the largest io header i saw was 40p with 34 usable ios
on a xilinx fpga dev board
I did see one that was like 300 bucks from AMD and had CM5 connectors on the bottom
So it would have enough IO
But uhhh

Expensive
Lol
the one i have was like 100 bucks from mr aliexpress
another problem with fpgas is that there are very few fpgas that aren't bga
Almost none that are actually good
BGA isnt an issue if the PCB company can assemble thoes parts
and it basically forces you to have >2 layers
What do you think of an rp2350 acting as a VGA text mode buffer device for this too
i mean if you're getting an fpga why not move as much stuff to it
generating a vga signal is ez
with a bit of impedance matched routing you can even get hdmi dvi with not that much extra logic if you pick the ios right :^)
I want HDMI output spesisifcaly
Well dvi but mm
You can easily get eDP too
Hdmi is a pita
Bc it's hard to find the ics
haven't looked into dvi but hdmi was ez on xilinx
I mean if you are designing hardware you know alot more about that than me π
no ics needed, just set the io standard to TMDS_33, then do encoding in fabric
I just want something usable for making software on that's not impossible to build in 2026+
Oh yeah if you have a fpga it' ez
i don't even use OSERDES i just have a shift register and DDR buffers :^)
If we put alot of it into the FPGA it could also do a regular framebuffer too 
Connect external ram
like, on an artix 7 100t a 640x480 8bpp fb would take 60% of all available block rams
true but that then requires some more careful design to be able to feed it fast enough
Yeah
Yeah you don't get to not connect external RAM to an FPGA
You can't fit almost anything in them
Oh wait
Something like DDR3 would allow for enough ram for the framebuffer and the system ram
If you don't have ext ram
I misread
Depende on what you're using the FPGA for
if you want just a plain framebuffer sdr sdram would be just enough
well ig depends on resolution
Well anything CPU-related, as we're discussing here, would kiiiiinda need it
but ddr3 would be easier to source and be socketable i presume?
If you want you know more than 0 memory for it
i mean, you can still buy sdr sdram chips
if you want it to be dimm modules then sure
DDR3L is the most common way I see of FPGAs with ext RAM
soldered
but then that's even harder to design for
socketable is nice but it may have to be soldered. how much capcity/speed can SDR reach?
200MHz clock is probably max of max (on my fpga board i have 166MHz-rated ram that runs fine at 200MHz), capacitywise probably max 64MB per chip or so?
the board i have has a single 32MB chip
with a 16 bit data bus
Yeah. You'll run into the FPGA fabric not keeping up above that
yeah
well i think you can find 233MHz rated chips, and the extra 33MHz might be doable?
but i think that's basically the max sdr sdram was rated for by the manufacturers, and it's pretty rare even then
i mean thats plenty for a small FB
FPGAs aren't really rated for a specific clock speed. That depends on your design.
yeah
There's typical numbers though. The fancier the FPGA, the higher that gets.
You can expect a small Artix-7 to reach abouts 100MHz and 200MHz if you really pipeline the snot out of everything, for example.
i mean my kinda subpar design runs at 200MHz on artix 7
although just barely
but that's anecdotal
Yeah but that's prob not on one of the small chips right
yeah 100t
Making them slightly faster on average
i also wonder if the FPGA could handle DMA for the storage aswell along with memory mapping it 
ive never really dipped into them much
you can configure them as you like, so most likely yes
given you can fit the whole cpu inside them
True
I want to fit as much as possible to the point it's just the physical CPU and the FPGA acting as a south bridge managing the ram and all the peripherals
Yes
it can work
You could probably reuse alot of this design for the riscv stuff too couldn't you?
idk, riscv has ethernet and more
But using other devices on the FPGA
You still need some shit for SBI
And other things
also wdym with managing the ram?
Being the memory controller?
hmm, i tought the m68k had it integrated, lol
anyway, time to come up with a plan for the implementation then
For something of that epoch yeah
It did?
ok that would be interesting
i'm not getting 512 megs of sram for cheap, you can say bye to that XD
we'll try ddr3 via the fpga
yeah true
lol
they prob did
i am very useful to this conversation
it isn't really hard to drive an sram
so yeah we'll have to make a ddr3 to sdram interface π
i mean, the cpu runs at 33 / 25 MHz
so the ddr3 will def be fast enough to act as sram
not really
Apparently some m68k embedded variants had an integrated memory controller, but the usual ones used an external one
Most of what i found had DRAM controller actually
i mean problem is that it's likely for the older dram standards
like fpm/edo or whatever
yeah, we'll prob need a ddr3 to sram interface
and that needs an fpga with a lot of IO
that doesn't really work since without a specially design controller you don't have predictable delays
unless you mean sram with a valid/ready interface or thereabout
(which works for the m68k due to it having dtack natively)
although at that points it's basically just a ddr3 controller with a m68k bus interface no?
i mean that's basically how it's done, sub m68k bus interface for some other bus protocol
Yeah probably EDO
well this will certainly be fun to work on

hopefully sombody else can help with FPGA stuff 
but making the firmware and the kernel port should be fun
speaking of which i need to stop feeling lilke crap and finish sched stuff
i can do some fpga stuff
(tho i deeply hate vhdl)
I did hear there are some apparently nicer HDLs?
Should we use an SD card at this rate though
And just provide a controller the m68k can use
i mean, it's def possible
we can instead of an fpga use a couple of MCUs acting as bridges also
especially ST's ones
We probably do want an FPGA for managing the memory bus though
that have a flexible mem controller
Since that needs to be high speed
ST can reach like 100MHz+ mem speeds on that mem controller
Atleast for DRAM, MMIO access can be slower ofc
Yes but being the middleman between the CPU running at 40mhz
So you get 10 instructions to send a reply if you don't want a wait state on the memory there
depends if you use DMA + FMC i think
we can go the easy path with st, or harder path with fpga
You'd still have to decode the address aswell. Read 32GPIOs too
Is the GPIO that fast on there?
you can use fmc to interface 2 mcus / mpus
Wait wtf π
lol
What's the fmc again
flexible mem controller
Like whats the spec sheet / docs
you make the bus act as a memory 
anyway just read up the docs on the FMC
they explain everything
So could you say have the micro act as a memory bus for both and handle ddr3
And have other devices emulated and also do DMA
no, ddr3 def not
an mcu cannot use it
an mpu yes
if you want ddr3 we have to go with a fpga
ddr3 might be the cheaperst i think
shifters are pretty easy/cheap
they won't be an issue
it's basically just 2 transistors
Then we need an FPGA
This seems it's mostly only for slave devices
it 100% can
it's 32 bit
Yeah wouldn't that cause issues? There is only 256m of banks
Isn't that DDR something else??
it is
the mp1 is expensive AF
- bga
i'm gonna stay away from that mpu, lol
also, mp2 exists and it's 64 bit
How much is it, you did get them from free apparently π
Can thoes do this?
they do have FMC too
Using a full CPU also feels like cheating
then fpga route?
Probably
And the FPGA would allow having 16550 UARTs on the memory bus
And other fun stuff
And an IRQ controller and a high resolution timer and an interrupting timer
Also it seems to do non LPDDR3
ye
Could we do a sodimm?
π₯
if you build this and ship me one il make a ton of ze firmware and work on the fpga things with you

We need one flash for firmware
One SD card for the main storage
We could do flash for both?
SD may be nicer though
i mean its just SDIO?
lvds in this context is signalling, not video output i'm pretty sure
i mean bitrate is a generic value for a serial stream
vga driver is very simple anyway
tho i think LVDS can easily be used for display anyway
fuck wait
that one does not have the DDR3 interface
we need the better version
lemme check
it's x2 more expensive π
@hazy saddle
but has like double the cells
and way more gpios
yeah, lol
And it potentially means we could cream maker peripherals
PCIe controller
And connect am nvme
π

ethernet 
Well
or usb
Plug in an Ethernet card
or that, yeah
I mean
You could design it to have two PCIe slots
And an m.2
And then plugin USB and Ethernet
m.2 is just pcie
tho we need at least 1 lane per device
pcie on a m86k?

Sure π
I mean that's not horrid
No that was a genuine question
π₯
i can always route them
and not place any comps
ok fuck
no pcie for us
we need a dedicated PHY
I mean we need some PHYs for the UART
pcie is not that simple
π
Idk im throwing partly far fetched ideas since you said Ethernet
ok usb or ethernet, but not that π
attach a bluetooth chip over sdio and get internet over it from a phone 
i mean, it also works
We could do PS/2 foe the keyboard and maybe an esp32 to act as a network controller??
ps2 is ez af
Indeed
Why are we trying to design a m68k as if it were a modern computer π
why not 
It's horrible
i mean, this interface can be exchanged for every cpu that has a 32 bit bus anyway
it's fun
You'll reconsider what fun means once you implement all of this crap using a HDL
good project for uni XD
i mean, the ddr3 controller should come pre-done afaik
so it's just a matter of interfacing it
I mean UART + PS/2 + DDR3 + A VGA framebuffer shouldn't be horrid
The other stuff is a stretch
(plus the timer and IRQ controllers etc)
What UART btw
16550
π
Yes but more legacy chips to gather is worse, the FPGA will be implementing as much as possible with just a physical m68k
If we have an FPGA alot can just be handled there
Wow this is NOT something that you would think of in combination with M68K 
Bad larp
Was it even meant to be larp
Historical butchery
- that fpga could in theory work with every 32 bit processor that has a 32 bit buffer
It would be quite funny though. Along with UEFI compatable firmware 
This will just be a fucking Frankenstein of bullshit
also, we could in theory get 1080p+ DP video out
what unholy nonsense are you puttin on there that runs """""""""UEFI"""""""""
I present to you the Bullshitosch Amiga 7000
Custom firmware that implements the same interfaces to run a bootloader 
Are you porting Limine to 32-bit and m68k as well now?
Maybe 
π
Though I am just going to make my own loader for it anyways :p
I did say that too
This is m68k not x86 or some random MIPS workstation aiming for x86 card compat
π
You wana help make the FPGA shit to do this shit π
And just fucking make the most cursed m68k board possible
Ala wheat force
let's put a fucking athlon instead of that m68k 
i mean, it will have high changes of working
Amigatosch ST dev board
The point is the m68k
I'm still proud of just how many people I fooled with that
Yeah but m68k first
Please touch some actual m68k hardware for the love of god π
No 
We need to make an abomination
nope :3
it would be funny to put a real m86k on the board tho
even if it isn't the main cpu as like an i/o controller or something lol
That's the point
That's the FPGA
fpga != real m86k
If you end up making it find one of those commodore amiga forums and post your crap there
I'm sure the folks there are gonna LOVE your crap

Port an x86 emulator and run @sterile plank 's Java OS on it

I'll do some wacky FPGA shit sure but it's still your project
Ofc ofc
Diamond master handles pcb and assembly
You do FPGA
I handle the software

Bonus points if it is a Xilinx one since I have xp with it
Wow that's a bad idea.
?
You don't want random no name in FPGA space
docs seem pretty solid tbh
It's also only 31K LUTs??? You could just get an Artix-7 50T and it'd be better
"only"
it's the one that has the most π
in that price
the artix 7 is expensive
31K LUTs is not going to be enough for a core with proper MMU by my estimates
The FPGA isn't running the m68k
oh
That makes things a lot simpler
Is it gonna be on just like a parallel bus
I can get you a VGA controller and PS2 I/O easy with that.
data + address pins all to the bridge
NS16550 compatible UART I can do too
we have LVDS on that fpga too
What other I/O we adding?
for eDP
SD card, DDR3, flash
and idk what else evalyn wants
maybe usb
What controls the DDR3
DDR3 should have a dedicated block already
USB really isn't needed
in the fpga
Nuclear bomb trigger
SD card flash and the DDR should be eveything needed for a working machine
So it fucking explodes when you manufacture it
ehhh right.... and how fast is the m68k? Can its bus be stalled?
yes afaik
the m68k is like 40MHz max
but the qfp that we want are like 25Mhz or 33 MHz
lmao why are we putting DDR3 on something that runs at 25MHz
cheap
no
i mean, that fpga works with ddr2 too
75MHz with a 68060
DDR3 is going to make your PCB very expensive
heh, not really
Can be overclocked too
You need very fancy PCBs to do DDR3 right
we gonna need 6 layers already
and it's very cheap if the dimensions are contained
6L comes with fancy features already
I used 8 layers last time I designed with DDR3L
How much better would ddr2 be 
And I hope you've found some friends willing to teach you how to hook it up in a way it won't explode due to noise
DDR2L*
oh there is a server with professionals
they work on this stuff
DDR2 would be the realistic choice
this only has LPDDR2 max
Given that we're running a 25MHz m68k that doesn't expect more than like 32MB of physical RAM from its time period
also, the server if you wanna go and see: https://discord.gg/9dKZvP8hk
Not really better more so cheaper
True true
I do wonder how bad performance may be
Well my point is you don't need a fucking impedance matched PCB with length tuning on all the traces for DDR2
Should be fine even with a micro kernel
DDR3 is nominally 2.8+GT/s
And it's still fast enough
DDR2 is going to be more than fast enough
impedance matching comes for free anyway
Isn't this an abomination anyways
???? no it doesn't
or well, impedance control
You need to have your PCB manufactured with impedance control and then you need to put the right resistors and capacitors in the right places
Make it be a last gen m68k running at 75MHz and give it 64MB 
you can use the fab calculator to impedance match traces
and they will try to keep them as close as possible
Didn't the m68k 60 series only do up to 40mhz?
i don't think you need inline resistors for ddr3
I think the model we picked is the best one with an MMU and FPU and being non PGA
The Motorola 68060 ("sixty-eight-oh-sixty") is a 32-bit microprocessor from Motorola released in April 1994. It is the successor to the Motorola 68040 and is the highest performing member of the 68000 series. The 68060 is the last development of the 68000 family for general purpose use, abandoned in favor of the PowerPC chips. Two derivatives we...
50-75MHz
Ah neat
Max CPU clock rate
I wonder if @viral bison can find one that could work for this
You could definitely overclock it too

if you can find a non bga one sure
prob no
at the rate we're going
You're overly confident in how cheap an unassembled 6-layer PCB will be
esp one as big as we'll need
pretty cheap
there's no way
did literally everything I'm talking about get cheaper by half since a year ago?
oh so it literally did get cheaper by a significant amount in just one year
You'd be shelling out like β¬70 for that a year ago iirc
Probably overpriced but
https://www.amiga-shop.net/en/Amiga-Hardware/Amiga-replacement-parts/Socket-for-68060-processor-PGA-206::1460.html
and it will be funnyβ’
Here it is the socket
better than other things tbf
I've definitely seen it at less than 10 euros before
is there a footprint for this?
π
If that's your reaction to "make the footprint yourself", you shouldn't be making this PCB
well, time to find the pinout first
we may also want to not use VGA text open, my kernel may very much not like that
if we can help it atleast
"VGA text open"? what?
Well weren't we putting the crtc in the FPGA anyway
my kernel wants full colors and unicode that FT does
we can make it do anything the fuck we want
yeah
i was just noting the change
In fact this makes my job easier
What framebuffer specs should we have
If we did use a 1gb ddr3 chip we could do 1080p π
Ddr2*
I have a ready to use CRTC that only needs hooking up to memory
And it's fully configurable
So basically we can make it do anything really
i think this could be the most cursed mk68 based machine
for sure
you want to do displayport?
We could expose the video controller as configurable?
I don't even have any DP monitors π
Where you give it a physical memory address and the resolution and bpp
easier to interface to the current fpga
it will get first converted to eDP
and then it should be 1:1 compatible with normal DP afaik
cupcakes
Also @urban mulch should I make the firmware larp as a 90s x86 BIOS that does a POST and a ram counter and other stuff

ofc
what about a PC speaker
also be prepared for your OS to be hella slow, it's gonna run at like 1/60 of what it usually does 
I2S
It's a micro kernel so should be fineeeeeee
no that makes it worse actually
non
(that's the joke)
we do PC speaker for the shits
what interface does it even use?
ah
Sometimes you can't even change the pitch of the beep
lol, so it's not even a real speaker
nope
why not i2s tho
while we're at it, we might as well add a derangedly modern interface somewhere, just to fuck with people
Though I could make a monolithic kernel and just save micro kernel shit for later since I'm gonna have a tagged release before I do any of those major decisions
Nvme
meanwhile i'm fucking with xhci on my os
NVMe over one of the alternate interfaces 
and it's causing random opcodes exceptions π
The Microsoft version of virtio
we cannot do pcie / nvme on this fpga
that's the joke
You can do NVMe over deranged shit like UART
π
I was thinking we connect an esp32 to the UART for wifi
The thing should still be usable for most things
btw, we could prob get away with AGP or PCI 
So like we don't want the disk to be slow af
What about ISA
ISA is simpler than either AGP or PCI
PCI could be nice though if we want real networking though
Then you can have a 100mbps nic in theory
finally found a fucking pinout
Just use esp-hosted instead, way easier
And the m68k we will use is about as powerful as a pentium so
i need the exact model we'll be going for btw
The Motorola 68060 ("sixty-eight-oh-sixty") is a 32-bit microprocessor from Motorola released in April 1994. It is the successor to the Motorola 68040 and is the highest performing member of the 68000 series. The 68060 is the last development of the 68000 family for general purpose use, abandoned in favor of the PowerPC chips. Two derivatives we...
The one with MMU and FPU
ok, which model π
Any clock speed should be fine
yeah smartass, there's multiple of this one too
the full chip name
Give me a second then
like MC68040FE40A
fuck these are expensive
π
MC68060RC50 / MC68060RC66
thoes ones have the MMU and FPU
they are all pin compatable though
how expensive?
these lack an FPU but could still work but eh
MC68LC060RC50
MC68LC060RC66
MC68LC060RC75
π
without an FPU its fine though
but we would prob need the fpu
it supports emulation
I think that's way overkill
also the FPU on these aparently werent good
Not really "weren't good" more so just outdated compared to the rest of the chip
i mean atp emulation wouldnt be that bad?
