EvalynOS | Operating System Development | Page 29

haughty acorn Jun 12, 2026, 4:09 AM

#

im 99% sure id have much less driver issues if i tried linux now lmao

clear bison Jun 12, 2026, 4:10 AM

#

amdgpu drivers 💀?

hazy saddle Jun 12, 2026, 4:10 AM

#

haughty acorn im 99% sure id have much less driver issues if i tried linux now lmao

If you ever get a new machine try out Linux a bit because you know you wana wipe the OEM parition anyways

haughty acorn Jun 12, 2026, 4:10 AM

#

but im lazy and id rather just leave the windows that came on this laptop on it lmao

hazy saddle Jun 12, 2026, 4:10 AM

#

clear bison amdgpu drivers 💀?

Yes actually that's an ongoing project lmfao

clear bison Jun 12, 2026, 4:10 AM

#

Hell naw

haughty acorn Jun 12, 2026, 4:10 AM

#

hazy saddle If you ever get a new machine try out Linux a bit because you know you wana wipe...

unlikely to happen soon unless i luck into enough money to get a fred machine lmao

hazy saddle Jun 12, 2026, 4:10 AM

#

clear bison Jun 12, 2026, 4:11 AM

#

Put me behind 3 lead doors away from that bullshit 💀

haughty acorn Jun 12, 2026, 4:11 AM

#

i might see if my dad has any old laptops he doesnt need tho, if he does im taking one and putting arch on it and then not using arch on it most of the time anyway because itll be an osdev test bed

hazy saddle Jun 12, 2026, 4:11 AM

#

clear bison Put me behind 3 lead doors away from that bullshit 💀

Well when it's finished it will be portable and maybe integrated into lil

#

Idk if @haughty acorn would wana work on it though

#

It will be C++ or C I think?

#

Probably C++

#

https://tenor.com/view/family-guy-joe-joe-taken-away-gif-17520860855595872089

Tenor

haughty acorn Jun 12, 2026, 4:12 AM

#

i had enough in c++ in 2012 and then kept working on that project until like 2014 lmao

hazy saddle Jun 12, 2026, 4:12 AM

#

hazy saddle It will be C++ or C I think?

Though some of the external tooling could be in zig

#

Since we are working on some other helpers for disassembly and other shit

haughty acorn Jun 12, 2026, 4:13 AM

#

if any of you know MultiMC, you can find a link to my twitter in the about menu of that program

#

because i worked on it

hazy saddle Jun 12, 2026, 4:13 AM

#

Oh that's cool as shit

#

I use a fork called PrismLauncher

#

hey yeah its there

haughty acorn Jun 12, 2026, 4:15 AM

#

most of what i do nowadays for multimc is get pinged as part of the moderator role when people ignore the multimc discord's rule about not asking for help for forks lmao

hazy saddle Jun 12, 2026, 4:15 AM

#

lmfaoooooo

haughty acorn Jun 12, 2026, 4:15 AM

#

hazy saddle hey yeah its there

yup thats me

hazy saddle Jun 12, 2026, 4:15 AM

#

how hard is it to read yaaar

haughty acorn Jun 12, 2026, 4:15 AM

#

i also get pinged when people start using slurs or trying to sell scams lmao and thats far more common

haughty acorn Jun 12, 2026, 4:15 AM

#

hazy saddle how hard is it to read <a:yaaar:1352763344142073946>

apparently harder than you or i thought lmao

hazy saddle Jun 12, 2026, 4:16 AM

#

tbf it happens here but to less extents

#

and its more so people not listening

#

trl

haughty acorn Jun 12, 2026, 4:16 AM

#

mhm

#

but yeah trying to get Qt5 and mingw and whatever editor i was using before clion or vscode existed all working together to work on multimc is a part of why i have such cranky old woman yells at cloud energy sometimes lmao

#

that and constantly watching modding people fighting each other

hazy saddle Jun 12, 2026, 4:18 AM

#

i used to do MC modding

#

i made some of the most hacky shit that should have never worked

#

i have had some plans to get back into it

#

but large backlog of ideas lol

hazy saddle Jun 12, 2026, 4:19 AM

#

hazy saddle i have had some plans to get back into it

wanted to make one for a pack that used immersive portals to make an infinitly tall world you can fall though, and every vertical segment shuffles its self as you go through it

#

so as you explore the world shifts behind you

haughty acorn Jun 12, 2026, 4:19 AM

#

nice

#

i used to be more involved in mc modding (albeit from the multimc side and the user side moreso than making mods) but i saw so many fights and community trying to rip itself apart so often that i just got. melancholy about it. and stopped

hazy saddle Jun 12, 2026, 4:20 AM

#

I hate the fragmentation with mod loaders

#

Neo forge and fabric is plenty

#

Then there is like 5 other random loaders that pop in and out for no reason

haughty acorn Jun 12, 2026, 4:21 AM

#

thats not a new problem lmao

hazy saddle Jun 12, 2026, 4:21 AM

#

Mmmm yes let's needlessly fragment the modding ecosystem more for no reason and make it worse for everyone

haughty acorn Jun 12, 2026, 4:21 AM

#

goes back to flowerchild

hazy saddle Jun 12, 2026, 4:21 AM

#

haughty acorn thats not a new problem lmao

Yeah but it was getting better at some points

#

Alot probably was due to forge and lexmanos being kind of a dick iirc?

#

I never interacted with him that much

#

And wasn't a hugeee scale moder but

haughty acorn Jun 12, 2026, 4:22 AM

#

hazy saddle Alot probably was due to forge and lexmanos being kind of a dick iirc?

neoforge exists because they tried to put a woman on the forge team and lex was such a dick the woman went to quit, and then cpw came out of retirement and did a hostile takeover of the forge discord server to yeet lex from things lmao

hazy saddle Jun 12, 2026, 4:23 AM

#

That's based as shit

#

Iirc lex did other things too in the past that contributed?

haughty acorn Jun 12, 2026, 4:23 AM

#

yeah

#

hes always been a dick

#

the first unnecessary modloader split happened in late may-early june 2013 btw

#

its just that forge had such a monopoly that until fabric happened all of the splits were people going off on their own to do no-modloader stuff after being in fights and getting pushed away

#

the way i describe my feelings on mc modding stuff nowadays is its like a veteran walking out on an old battlefield they fought on and getting flashbacks to how things went down and friends were lost

hazy saddle Jun 12, 2026, 4:26 AM

#

I wish I was ever ingrained enough into a large community to witness stuff like that

#

I've had a few things happen but nothing to large extents

#

Like the Xbox server doing stupid shit to a good mod and then covering up the entire thing

#

🥀

haughty acorn Jun 12, 2026, 4:27 AM

#

watching communities fall apart like that isnt fun. being in a community is nice though, so its usually worth that risk

hazy saddle Jun 12, 2026, 4:27 AM

#

Yeah the falling apart isn't fun but sotimes smaller dramas can be Entertaining

#

I do quite like this community though

#

Everyone here is cool

#

I wouldn't want anything to happen here

#

hug

haughty acorn Jun 12, 2026, 4:28 AM

#

ive watched the mc modding community tearing itself apart again and again for over a decade now. theres a different community that i literally had to take sides in a massive fight. and now im simultaneously scared to get invested in communities again but also cherish the ones i can be a part of

hazy saddle Jun 12, 2026, 4:28 AM

#

yaaar

#

Why cant the dramas be stupid and funny

#

And not ruining the entire thing

#

I am very young tho so I'm yet to get into things very big™

haughty acorn Jun 12, 2026, 4:29 AM

#

mhm

#

one of the guys i always liked in the mc modding community recently got a terraria dev armor set so at least chicken bones is goin in a good direction lol

hazy saddle Jun 12, 2026, 4:31 AM

#

Oooo that's cool

#

I should try and get back into playing modded Minecraft

#

But it's lost its spark for me sadly

#

wahhgone

#

I should start making dinner though and going to sleep

#

Might take a break from working on it tomorrow

#

And then work on refactors if I'm feeling up to it

#

I Wana sleep before 1:30 because I slept at 4am yesterday

#

yaaar

full fern Jun 12, 2026, 4:39 PM

#

hazy saddle But it's lost its spark for me sadly

#

Gtnh scratches the same itch on my brain as osdev

haughty acorn Jun 12, 2026, 5:48 PM

#

full fern Gtnh scratches the same itch on my brain as osdev

gregtech... now that's a name I've not heard in a long time... a long time...

#

https://tenor.com/view/starwars-obi-wan-now-thats-a-name-ive-not-heard-in-along-time-gif-11814407

Tenor

#

you know you've been in a community too long when you start unironically doing that obi wan gif lmao

hushed oracle Jun 12, 2026, 8:02 PM

#

full fern Gtnh scratches the same itch on my brain as osdev

I've build a fusion reactor on a 1.6.4 server, but then they wiped it while I was on a school trip (which I didn't want to go to) nooo

hazy saddle Jun 12, 2026, 11:48 PM

#

full fern

Funnily enough I did try and play gtnh

#

Couldn't get into it fully

#

wahhgone

#

I probably would like to try again

#

But I'd need good friends to do it with

hazy saddle Jun 13, 2026, 12:37 PM

#

hmmm

#

today i shall do that refactor perhaps

#

Clueless

#

arch/{arch}/arch among other things

#

arch/generic wont need an extra arch subfolder though as its meant to be included by other things anywhere

#

though i wonder if i can just phase it out

#

and add a misc folder for some things under utils?

#

whuch i alr do have

#

i can put the panic boilerplate there

#

i also am consering doing my riscv port a bit earlier perhaps

#

after LA64 paging and irqs maybe?

#

will then need to refactor 3 paging codes though

#

yaaar

#

since il have to rework them once i have PFNDB and better OOM handling

hazy saddle Jun 13, 2026, 12:59 PM

#

Fuck it we ball

#

https://tenor.com/view/fuck-it-we-ball-cat-dna-ballin-gif-2085555445816338978

Tenor

#

Im going to port riscv before the other refactors

#

Since it won't be that bad since alot of the paging code can just be reused when I refactor it after regardless

haughty acorn Jun 13, 2026, 1:27 PM

#

hazy saddle arch/{arch}/arch among other things

why not make the root platform instead of arch? feels just as reasonable esp if there'll be stuff outside the arch subfolders and makes the paths look less weird not having the word arch twice

hazy saddle Jun 13, 2026, 1:28 PM

#

haughty acorn why not make the root platform instead of arch? feels just as reasonable esp if ...

Yeah I could do it that way

#

Then it's #include paging/whatever

#

Then what should I do for things I want in the root level there though?

#

Like panic I probably want to be able to do #include arch/panic.h

#

And not just panic

#

Also instead of including arch/generic/whatever the arch specific header will include the required generic header for you

#

So you just do #include arch/paging/paging.h

#

And that includes the generic paging header too

#

Maybe?

#

Idk that sounds worse

floral kettle Jun 13, 2026, 1:33 PM

#

I just have arch/paging.{h,hpp} for the arch-specific paging stuff like page flags + an arch/paging_internals.{h,hpp} for some internal stuff the generic paging impl uses (like the level count, size of a level + some other misc things like that)

hazy saddle Jun 13, 2026, 2:06 PM

#

i think i can do this. arch spesific things will shadow generic includes.
then the arch specific implementation pulls in the generic header which will contain the generic interfaces & other defines?

-I src/arch/${ARCH}
-I src/arch/generic

#

wait no i think ive got it

#

    -I src/arch/                          \
    -I src/arch/${ARCH}                   \

#

Then code does include generic/paging/paging.h

#

But that solves nothing really

#

wahhgone

#

The other option I guess is making the generic files ifdef every architecture and including the architecture backend for them :/

#

Which would only need to be done for like a few of them tbf

#

Just the ones that have inline assembly

#

the only files like that are
interrupts.h
halt.h
mmio.h

#

il do it like this
merge interrupts.h and halt.h into intrin.h
put that and mmio and panic into arch/generic/lib/
and then intrin.h and mmio.h have to get updated for any arch port to ifdef && include the right backend header

#

Other things won't be static inline in headers so they won't need ifdef soup

#

And relegating ifdef soup such a pattern it ends up working

wraith star Jun 13, 2026, 2:22 PM

#

stop overthinking it and start writing meme

hazy saddle Jun 13, 2026, 2:22 PM

#

So true

#

😭

#

I just don't wana have to come back and redo this again

hazy saddle Jun 13, 2026, 2:47 PM

#

i think ive solved it

#

bigbrain

#

#define STRINGIFY_IMPL(x) #x
#define STRINGIFY(x) STRINGIFY_IMPL(x)
#include STRINGIFY(arch/ARCH/lib/mmio.h)

#

Then arch just gets passed as a -DARCH =

#

Then the generic headers can just do that bullshit

hushed oracle Jun 13, 2026, 2:48 PM

#

Bruh

hazy saddle Jun 13, 2026, 2:49 PM

#

hushed oracle Bruh

What Clueless
It works

floral kettle Jun 13, 2026, 2:49 PM

#

but why, this seems way more cursed than just having arch/<arch>/include/arch/paging.h + -Iarch/<arch>/include

hazy saddle Jun 13, 2026, 2:50 PM

#

floral kettle but why, this seems way more cursed than just having `arch/<arch>/include/arch/p...

less refactoring work
the directory names look nicer
I don't really want an include folder

#

It is very fucking cursed though

sterile plank Jun 13, 2026, 2:51 PM

#

i dont understand overengineering

floral kettle Jun 13, 2026, 2:52 PM

#

hazy saddle - less refactoring work - the directory names look nicer - I don't really want a...

does any of that matter if you have like 3 arch specific headers used from generic code?

hazy saddle Jun 13, 2026, 2:53 PM

#

floral kettle does any of that matter if you have like 3 arch specific headers used from gener...

Well people get mad at me with whatever option I pick. I talked to wux about just hard coding the ifdefs for the few headers and they said that wasnt good so shrug
This one at least automates that work with some macro BS and lets me keep everything which ticks all the boxes on this refactor

gentle quest Jun 13, 2026, 2:54 PM

#

hazy saddle ```c #define STRINGIFY_IMPL(x) #x #define STRINGIFY(x) STRINGIFY_IMPL(x) #includ...

Bruh

hazy saddle Jun 13, 2026, 2:55 PM

#

PSP1G_pspTrollar and since this is pissing everyone off it makes me want to keep it too /hj

haughty acorn Jun 13, 2026, 2:55 PM

#

hazy saddle Well people get mad at me with whatever option I pick. I talked to wux about jus...

just -I the architecture and include based on a known path smh

tender mantle Jun 13, 2026, 2:55 PM

#

Keep over engineering

hazy saddle Jun 13, 2026, 2:55 PM

#

haughty acorn just `-I` the architecture and include based on a known path smh

I have considered this but it has other downsides

haughty acorn Jun 13, 2026, 2:55 PM

#

hazy saddle I have considered this but it has other downsides

like what?

tender mantle Jun 13, 2026, 2:55 PM

#

Most programmers stop right before it’s perfect

hazy saddle Jun 13, 2026, 2:55 PM

#

haughty acorn like what?

Makes the folder paths look ugly

tender mantle Jun 13, 2026, 2:55 PM

#

Who cares

hazy saddle Jun 13, 2026, 2:56 PM

#

arch/arch name/arch

hazy saddle Jun 13, 2026, 2:56 PM

#

tender mantle Who cares

I CARE
I am the one who asked

tender mantle Jun 13, 2026, 2:56 PM

#

All of this stems from you using Kate btw

haughty acorn Jun 13, 2026, 2:56 PM

#

hazy saddle arch/arch name/arch

thats why i suggested platform/something/arch

tender mantle Jun 13, 2026, 2:56 PM

#

If you used a decent editor this wouldn’t be a problem :p

hazy saddle Jun 13, 2026, 2:56 PM

#

haughty acorn thats why i suggested platform/something/arch

Wait this is what you meant

haughty acorn Jun 13, 2026, 2:56 PM

#

yeah?

hazy saddle Jun 13, 2026, 2:56 PM

#

I thought you meant it the other way 😭

tender mantle Jun 13, 2026, 2:56 PM

#

platform/archname/arch is just arch/archname/arch but fancy

haughty acorn Jun 13, 2026, 2:57 PM

#

didnt realise it was unclear but i woke up sick to my stomach so i was struggling to communicate

hazy saddle Jun 13, 2026, 2:57 PM

#

How would that work?

haughty acorn Jun 13, 2026, 2:57 PM

#

tender mantle platform/archname/arch is just arch/archname/arch but fancy

and also doesnt include the word arch twice which helps

hazy saddle Jun 13, 2026, 2:57 PM

#

Ah same thing but fancy lol

tender mantle Jun 13, 2026, 2:57 PM

#

I guess

#

You know

#

At this point

#

Just hash all the folder names

#

Who needs them

hazy saddle Jun 13, 2026, 2:57 PM

#

haughty acorn and also doesnt include the word arch twice which helps

You still have a folder with one child though which KATE does collace

#

Sourcehut actually doesn't collace that lmao

tender mantle Jun 13, 2026, 2:58 PM

#

it’s 1 extra click oh no

hazy saddle Jun 13, 2026, 2:58 PM

#

Which is another reason I want to avoid that

haughty acorn Jun 13, 2026, 2:58 PM

#

hazy saddle You still have a folder with one child though which KATE does collace

youd put other stuff in the arch's main folder, like arch-specific peripherals and shit

tender mantle Jun 13, 2026, 2:58 PM

#

hazy saddle Which is another reason I want to avoid that

at the cost of insane over engineering

floral kettle Jun 13, 2026, 2:58 PM

#

ye

haughty acorn Jun 13, 2026, 2:58 PM

#

the arch subfolder would be more like the asm subfolder name linux uses for everything and be the stuff that generic needs to include

tender mantle Jun 13, 2026, 2:59 PM

#

floral kettle ye

Yeah see this is fine

haughty acorn Jun 13, 2026, 2:59 PM

#

yeah

tender mantle Jun 13, 2026, 2:59 PM

#

include folder in src is questionable but fine

hazy saddle Jun 13, 2026, 2:59 PM

#

So platform/x86_64/arch has the generic headers
And then it can have other things there etc not under arch

haughty acorn Jun 13, 2026, 3:00 PM

#

tender mantle include folder in src is questionable but fine

i havent used a language with headers since 2015 and multimc puts headers next to cpp files instead of in a separate include folder lol, cant speak to that part

haughty acorn Jun 13, 2026, 3:00 PM

#

hazy saddle So platform/x86_64/arch has the generic headers And then it can have other thing...

yeah

hazy saddle Jun 13, 2026, 3:00 PM

#

That could work but then I loose the generic folder and other things.
I'm probably either talking myself into the cursed macro solution but I guess I dislike the other ways of doing things. My brain likes having it this way tbh yaaar

tender mantle Jun 13, 2026, 3:01 PM

#

haughty acorn i havent used a language with headers since 2015 and multimc puts headers next t...

I guess private headers maybe? But imo it’s just ugly as fuck

haughty acorn Jun 13, 2026, 3:01 PM

#

(at the end of the day do what you like, just dont be surprised if other people dont want to work with the codebase when doing that macro shit)

tender mantle Jun 13, 2026, 3:01 PM

#

Headers suck so much

haughty acorn Jun 13, 2026, 3:01 PM

#

tender mantle I guess private headers maybe? But imo it’s just ugly as fuck

multimc is an executable only with zero public api so it worked for us

tender mantle Jun 13, 2026, 3:01 PM

#

None of this would of been a problem if you used rust :^)

haughty acorn Jun 13, 2026, 3:01 PM

#

or zig

tender mantle Jun 13, 2026, 3:01 PM

#

haughty acorn multimc is an executable only with zero public api so it worked for us

Fair fair

#

Or hell fucking javascript does it better

floral kettle Jun 13, 2026, 3:02 PM

#

tender mantle include folder in src is questionable but fine

I just wanted to keep it inside the arch-specific folder and the separate folder means that I don't have to add the main arch dir to the include path (+ it doesn't look as ugly as having arch/x86_64/arch folder to me)

tender mantle Jun 13, 2026, 3:02 PM

#

floral kettle I just wanted to keep it inside the arch-specific folder and the separate folder...

Fair enough, it’s all preference anyway

#

I tend to not even notice arch/x86_64/arch

haughty acorn Jun 13, 2026, 3:03 PM

#

literally the important thing is to have a system and stick to it

tender mantle Jun 13, 2026, 3:03 PM

#

Yeah

haughty acorn Jun 13, 2026, 3:03 PM

#

whats the system? idk i aint you. but make one and stick to it

tender mantle Jun 13, 2026, 3:04 PM

#

Pure vibes “yeah this feels like it belongs here”

haughty acorn Jun 13, 2026, 3:04 PM

#

my os has hal/arch/%ARCH%/ for the path to arch specific stuff

#

and not-arch-specific code for stuff like interrupts etc lives in hal/

hazy saddle Jun 13, 2026, 3:09 PM

#

well congrats

#

everyone hates this

#

so now im using it

#

PSP1G_pspTrollar

#

#

ts is too funny

#

😭

tender mantle Jun 13, 2026, 3:13 PM

#

Welp whatever works for you I guess

rancid viper Jun 13, 2026, 3:17 PM

#

solution: stop using the C preprocessor and write your own

sterile plank Jun 13, 2026, 3:19 PM

#

stop using C, write rust /j

haughty acorn Jun 13, 2026, 3:19 PM

#

hazy saddle so now im using it

in my thing of "pick a system and stick to it" you could take "stick to it" as the same as commit to the bit lol

#

so if you do this then commit to the bit

hazy saddle Jun 13, 2026, 3:20 PM

#

rancid viper solution: stop using the C preprocessor and write your own

Well then I have the same retarded system but worse

#

Because I have my own pre processor

wide mica Jun 13, 2026, 3:20 PM

#

To me it seems like you're overthinking it

hazy saddle Jun 13, 2026, 3:20 PM

#

So I might aswell work within it

wide mica Jun 13, 2026, 3:20 PM

#

I quite like where I ended up personally

hazy saddle Jun 13, 2026, 3:20 PM

#

wide mica To me it seems like you're overthinking it

Oh 100%

#

But I think I'm finnaly content with this solution

hazy saddle Jun 13, 2026, 5:49 PM

#

i think ive also killed two birds with one stone

#

arch/intrin/* contains the fucky headers that auto redirect to the arch folder coresponding in arch/${ARCH}/intrin
and then arch/${ARCH}/intrin can addininaly have arch spesific intrinsics like CPUID portio MSRs/CSRS etc

#

And that feels like a much nicer place to put them

#

Because they basically are just intrinsics / wrappers around raw instructions

#

The only one that's borderline is CPUID on x86 since I do some more advanced wrappings but eh

#

Panic may? Just continue to stay at the top level though. Or I shove it into a panic subdir

haughty acorn Jun 13, 2026, 5:58 PM

#

hazy saddle `arch/intrin/*` contains the fucky headers that auto redirect to the arch folder...

oh this is an excellent solution

hazy saddle Jun 13, 2026, 6:00 PM

#

haughty acorn oh this is an excellent solution

Thank you ^^

#

Only took me two weeks to think of this properly 😭

#

At least it was worth it

#

mmLol

#

I also wonder if I should document my kernel and the public API functions and other architecture stuff

#

Hmm

#

Maybe after I get it to the MVP state I'm working to?

#

I'd probably start with the utils folder for that stuff

#

Since that's the most important stuff to document as it has alot of the data structures and locks etc

#

maybe generic panic can be moved there too?

hazy saddle Jun 13, 2026, 7:14 PM

#

i think il only move portio into the intrins since its basically just that

#

the other files have some other stuff that may not fit

#

and then arch/cpu looks really empty otherewise

#

it may end up with cpulocal being the only thing there

#

if/when i move smp to its own folder

#

actually CPU local may be an intrinsic type thing

#

since its a pointer de reference on a spesific register in many archetectures

#

eg la64 has one

#

and x86 is similar but fancy

#

https://git.evalyngoemer.com/evalynOS/evalynOS-old/src/branch/dev/kernel/src/utils/cpulocal.h

Evalyn's Git Server

evalynOS-old/kernel/src/utils/cpulocal.h at dev

#

other arhctectures would have to define thier own macros that do so similar crap

#

Hmm

#

when i do cpu local stuff then i will probally the other things into intrin with it

#

In any case I think stuff is proper for these refactors enough

#

Il clean this up and get it commited tomorrow

#

Then work on getting the bare bones of the riscv port working

#

And then exception handling on both

#

And the refactor with those after that

#

Since I wanted to move thoes arround a little

#

But I need them more complete on non x86 platforms for that

hazy saddle Jun 14, 2026, 12:13 PM

#

cc: @wraith star

📎 0000-evalynos-arch-abstraction-refactor.patch 📎 0001-evalynos-acpi-ubsan-fix.patch

#

The sourcehut repo is out of date

#

But the main home server should be fine to apply these on

wraith star Jun 14, 2026, 12:15 PM

#

okay,lemme compile this

hazy saddle Jun 14, 2026, 12:15 PM

#

You can probably skip the jinx steps if you just put the limine and OVMF shit in the right place btw

#

The make file for the kernel build skips jinx by default

wraith star Jun 14, 2026, 12:17 PM

#

how do i do that?

#

i see its validating and retrieving some stuff

#

i ran make bootstrap

hazy saddle Jun 14, 2026, 12:17 PM

#

then you dont need any manual steps

#

make bootstrap just takes ages lol

#

Eventually it will properly build the entire distro tho™

wraith star Jun 14, 2026, 12:17 PM

#

does it do that yet?

hazy saddle Jun 14, 2026, 12:18 PM

#

hazy saddle make bootstrap just takes ages lol

Nope it just compiles limine and pulls down ovmf

wraith star Jun 14, 2026, 12:18 PM

#

ah okau

#

good

hazy saddle Jun 14, 2026, 12:18 PM

#

Just mentioned as of now you can skip it if you want to

wraith star Jun 14, 2026, 12:24 PM

#

okay done, built

#

hm, i just have a black screen with some weird resolution

#

hazy saddle Jun 14, 2026, 12:27 PM

#

Huh?

#

When does this happen

#

Btw

wraith star Jun 14, 2026, 12:27 PM

#

after pressing enter

hazy saddle Jun 14, 2026, 12:27 PM

#

Do you have clang22

#

mmLol

wraith star Jun 14, 2026, 12:27 PM

#

nope

#

i use gcc

hazy saddle Jun 14, 2026, 12:27 PM

#

Ahh

#

I don't exactly support gcc

wraith star Jun 14, 2026, 12:27 PM

#

oh wait nvm

hazy saddle Jun 14, 2026, 12:27 PM

#

PSP1G_pspTrollar

wraith star Jun 14, 2026, 12:27 PM

#

its using clang

hazy saddle Jun 14, 2026, 12:27 PM

#

And I require clang 22

#

For defer shit

wraith star Jun 14, 2026, 12:28 PM

#

let me update my system

#

god i hate cuda nooo

#

every time i have to update i have to download 4gb of cuda garbage

hazy saddle Jun 14, 2026, 12:28 PM

#

This is why I uninstall the ROCM shit if I haven't used it in a while

#

It's so annoying

#

Not that ROCM works anyways but

#

PSP1G_pspTrollar

young hamlet Jun 14, 2026, 12:30 PM

#

That and SMRRs help Prevents cache poisoning

gentle quest Jun 14, 2026, 12:32 PM

#

wraith star hm, i just have a black screen with some weird resolution

Are you going to implement something for evalynos?

wraith star Jun 14, 2026, 12:32 PM

#

nope

#

theres some weird smp bug

#

i want to see what is it

clear bison Jun 14, 2026, 12:33 PM

#

They're reporting a bug

gentle quest Jun 14, 2026, 12:33 PM

#

Ah

clear bison Jun 14, 2026, 12:33 PM

#

Well i think this is more bizarre than a simple bug

hazy saddle Jun 14, 2026, 12:33 PM

#

SMP init only dies on KVM + SEABIOS

#

💀

wraith star Jun 14, 2026, 12:33 PM

#

i have also suffered from smp bugs

hazy saddle Jun 14, 2026, 12:33 PM

#

clear bison Well i think this is more bizarre than a simple bug

My kernel has had so many bizarre random ass fucking bugs

#

yaaar

wraith star Jun 14, 2026, 12:33 PM

#

most commonly its forgetting to set some cr4 bit

hazy saddle Jun 14, 2026, 12:34 PM

#

wraith star most commonly its forgetting to set some cr4 bit

I've had these

wraith star Jun 14, 2026, 12:34 PM

#

or some assumption about the segment registers

hazy saddle Jun 14, 2026, 12:34 PM

#

But I managed to fix them

#

And I set NX and la57 etc

tender mantle Jun 14, 2026, 12:34 PM

#

this is so random 🥀

hazy saddle Jun 14, 2026, 12:34 PM

#

I do have a nice way to set registers via an assembly macro though and a bit field for what things need diddling

#

If that does happen to be the case

hazy saddle Jun 14, 2026, 12:35 PM

#

tender mantle this is so random 🥀

That's every single major evalynOS bug

#

It's never something simple

clear bison Jun 14, 2026, 12:35 PM

#

Maybe I'll test it in my machine too

hazy saddle Jun 14, 2026, 12:36 PM

#

Seems to be a BIOS issue atlwast

#

I only have UEFI systems to test at home

tender mantle Jun 14, 2026, 12:36 PM

#

I have a bios system iirc

hazy saddle Jun 14, 2026, 12:37 PM

#

Go my minions

clear bison Jun 14, 2026, 12:37 PM

#

hazy saddle Seems to be a BIOS issue atlwast

So it crashes when you do i440fx + seabios?

hazy saddle Jun 14, 2026, 12:37 PM

#

Debug my random bullshit

#

yaaar

tender mantle Jun 14, 2026, 12:37 PM

#

give iso

hazy saddle Jun 14, 2026, 12:37 PM

#

clear bison So it crashes when you do i440fx + seabios?

I think it's on q35 aswell

#

clear bison Jun 14, 2026, 12:38 PM

#

clear bison So it crashes when you do i440fx + seabios?

Or are you trying something cursed like q35 seabios 💀

hazy saddle Jun 14, 2026, 12:38 PM

#

clear bison Or are you trying something cursed like q35 seabios 💀

That is what atie had it crash ob

clear bison Jun 14, 2026, 12:38 PM

#

I don't think that's supposed to work, isn't seabios just for i440

#

?

hazy saddle Jun 14, 2026, 12:38 PM

#

it crashes on that too tbf

gentle quest Jun 14, 2026, 12:40 PM

#

clear bison I don't think that's supposed to work, isn't seabios just for i440

Huh

#

Of course not

tender mantle Jun 14, 2026, 12:40 PM

#

hazy saddle

triple fault

#

now im curious

clear bison Jun 14, 2026, 12:41 PM

#

gentle quest Of course not

Well after looking at the code a few times it seems to me like it is

gentle quest Jun 14, 2026, 12:41 PM

#

?

#

What code

clear bison Jun 14, 2026, 12:41 PM

#

Seabios's code

gentle quest Jun 14, 2026, 12:41 PM

#

It has q35 chipset specific code even

#

Idk what you're talking about tbh

hazy saddle Jun 14, 2026, 12:41 PM

#

seems to die somwhere here??

tender mantle Jun 14, 2026, 12:41 PM

#

what qemu args cause it to die?

hazy saddle Jun 14, 2026, 12:42 PM

#

    mov eax, [x86_ap_trampoline_cr3 - x86_ap_trampoline + ebx]
    mov cr3, eax

gentle quest Jun 14, 2026, 12:42 PM

#

Maybe the cr3 is bad

hazy saddle Jun 14, 2026, 12:42 PM

#

qemu-system-x86_64 -enable-kvm -cdrom evalynOS.iso -m 1G -smp 2 -cpu host -chardev stdio,id=debugcon -device isa-debugcon,chardev=debugcon -d int,cpu_reset -no-reboot -no-shutdown -D qemu_log.txt

tender mantle Jun 14, 2026, 12:42 PM

#

does it die without the patches?

hazy saddle Jun 14, 2026, 12:42 PM

#

gentle quest Maybe the cr3 is bad

why would that only happen on this platform?

gentle quest Jun 14, 2026, 12:43 PM

#

hazy saddle why would that only happen on this platform?

Probably because you rely on some cpu features being pre enabled like nx

hazy saddle Jun 14, 2026, 12:43 PM

#

EBX is ending up zero here

gentle quest Jun 14, 2026, 12:43 PM

#

Which they aren't on APs

tender mantle Jun 14, 2026, 12:43 PM

#

evalyn

wraith star Jun 14, 2026, 12:43 PM

#

dw, the problem was that the limine version i copied was too old

tender mantle Jun 14, 2026, 12:43 PM

#

istg

hazy saddle Jun 14, 2026, 12:43 PM

#

gentle quest Probably because you rely on some cpu features being pre enabled like nx

well paging isnt enabled there for one. and i already solved that issue a while back

gentle quest Jun 14, 2026, 12:43 PM

#

Oh

tender mantle Jun 14, 2026, 12:43 PM

#

did I not tell you already to fix that

hazy saddle Jun 14, 2026, 12:43 PM

#

tender mantle Jun 14, 2026, 12:43 PM

#

or is it something else?

hazy saddle Jun 14, 2026, 12:44 PM

#

luna

#

its somthing else

gentle quest Jun 14, 2026, 12:44 PM

#

hazy saddle

What about the global bit

tender mantle Jun 14, 2026, 12:44 PM

#

hazy saddle its somthing else

nooo

hazy saddle Jun 14, 2026, 12:44 PM

#

EBX is zero

hazy saddle Jun 14, 2026, 12:44 PM

#

gentle quest What about the global bit

oh shit

tender mantle Jun 14, 2026, 12:44 PM

#

gentle quest What about the global bit

that requires something?

gentle quest Jun 14, 2026, 12:44 PM

#

Yes

wraith star Jun 14, 2026, 12:44 PM

#

the aps reach the trampoline

#

so yes

hazy saddle Jun 14, 2026, 12:44 PM

#

do i even use the global bit is the queston??

wraith star Jun 14, 2026, 12:44 PM

#

cr4 bit probably

tender mantle Jun 14, 2026, 12:44 PM

#

things I did not know 😭

#

how the fuck does my os even boot

gentle quest Jun 14, 2026, 12:45 PM

#

Well do u even set the global bit on pts

tender mantle Jun 14, 2026, 12:45 PM

#

iirc yes

hazy saddle Jun 14, 2026, 12:45 PM

#

i dont

#

mmLol

gentle quest Jun 14, 2026, 12:45 PM

#

tender mantle iirc yes

Do u use the limine ap thing

tender mantle Jun 14, 2026, 12:46 PM

#

yeah I use global

tender mantle Jun 14, 2026, 12:46 PM

#

gentle quest Do u use the limine ap thing

iirc I mostly nuke all cr flags

wraith star Jun 14, 2026, 12:46 PM

#

well , enabling those bits is not enoigh apparently

#

anyways, i gtg eat, if you dont solve the problem by then ill look harder

hazy saddle Jun 14, 2026, 12:47 PM

#

tbf EBX == 0

#

for some reason

hazy saddle Jun 14, 2026, 12:47 PM

#

hazy saddle ```x86asm mov eax, [x86_ap_trampoline_cr3 - x86_ap_trampoline + ebx] mov...

which isnt good

#

mmLol

wraith star Jun 14, 2026, 12:47 PM

#

hazy saddle tbf EBX == 0

is this with kvm enabled?

hazy saddle Jun 14, 2026, 12:47 PM

#

yes

wraith star Jun 14, 2026, 12:47 PM

#

because when the cpu triple faults

#

thats what you see always

#

with kvm

tender mantle Jun 14, 2026, 12:47 PM

#

yaeh I never set it lol

#

gg

hazy saddle Jun 14, 2026, 12:47 PM

#

other registers are filled?

wraith star Jun 14, 2026, 12:48 PM

#

those are the register values after reset

#

in kvm when a cpu triple faults qemu sees it as if it reset

#

with tcg this does not happen

hazy saddle Jun 14, 2026, 12:48 PM

#

tbf is that EDX value

wraith star Jun 14, 2026, 12:48 PM

#

i think its some cpu revision thing

#

check the sdm

hazy saddle Jun 14, 2026, 12:49 PM

#

okay here it works

#

EBX is correct

young hamlet Jun 14, 2026, 12:49 PM

#

wraith star i think its some cpu revision thing

It is

tender mantle Jun 14, 2026, 12:49 PM

#

then it's probably flags bullshit

clear bison Jun 14, 2026, 12:49 PM

#

wraith star i think its some cpu revision thing

It's technically something like initial CPUID

young hamlet Jun 14, 2026, 12:49 PM

#

Should be what you get from cpuid[1].eax iirc

hazy saddle Jun 14, 2026, 12:50 PM

#

okay but

#

#

this dies

#

trl

young hamlet Jun 14, 2026, 12:50 PM

#

Like atie said though I wouldn’t trust this triple fault message lol

hazy saddle Jun 14, 2026, 12:50 PM

#

yes

#

BUT

#

thats where it dies

#

goddamnit

#

mov eax, [x86_ap_trampoline_cr3 - x86_ap_trampoline + ebx]

young hamlet Jun 14, 2026, 12:51 PM

#

Gdb

hazy saddle Jun 14, 2026, 12:52 PM

#

weko that will be annoying with relocated code but yeah

young hamlet Jun 14, 2026, 12:52 PM

#

hazy saddle `mov eax, [x86_ap_trampoline_cr3 - x86_ap_trampoline + ebx]`

What’s the GDT descriptor values at that time

hazy saddle Jun 14, 2026, 12:52 PM

#

#

and thoes things get relocated before getting sent down

#

for the gdtr etc

tender mantle Jun 14, 2026, 12:55 PM

#

tender mantle how the fuck does my os even boot

oh the cpu just ignores the global bit on ptes if it's not set

#

:P

young hamlet Jun 14, 2026, 12:56 PM

#

How do you know the base is correct

#

Have you tried hardcoding the base aswell instead of calculating it on the fly

hazy saddle Jun 14, 2026, 12:58 PM

#

well my breakpoint isntworking :p

hazy saddle Jun 14, 2026, 12:58 PM

#

young hamlet Have you tried hardcoding the base aswell instead of calculating it on the fly

it calculates it on the BSP

tender mantle Jun 14, 2026, 12:58 PM

#

use hardware breakpoints

hazy saddle Jun 14, 2026, 12:58 PM

#

and patches the trampoline

#

I AM

tender mantle Jun 14, 2026, 12:58 PM

#

oh gg

hazy saddle Jun 14, 2026, 12:58 PM

#

I AM USING HARDWARE BREAKPOINTD

tender mantle Jun 14, 2026, 12:58 PM

#

jesus okay chill

hazy saddle Jun 14, 2026, 12:58 PM

#

young hamlet Have you tried hardcoding the base aswell instead of calculating it on the fly

and the base is zero

young hamlet Jun 14, 2026, 12:58 PM

#

hazy saddle it calculates it on the BSP

I mean in your AP code

hazy saddle Jun 14, 2026, 12:59 PM

#

????

young hamlet Jun 14, 2026, 12:59 PM

#

Because that’s the first time you touch ebx right

hazy saddle Jun 14, 2026, 12:59 PM

#

thats just a

    mov ebx, cs
    shl ebx, 4

#

which is perfectly valid

young hamlet Jun 14, 2026, 12:59 PM

#

Fairs

hazy saddle Jun 14, 2026, 1:01 PM

#

and it is picking a proper space to relocate to

#

#

being the second free lomem page

#

Hmm

#

this should be fine aswell

#

????

clear bison Jun 14, 2026, 1:04 PM

#

hazy saddle being the second free lomem page

In what address do you start your AP trampoline

hazy saddle Jun 14, 2026, 1:04 PM

#

i allocate it on demand and patch on the BSP

clear bison Jun 14, 2026, 1:04 PM

#

Because if you're doing so in like 0x00000 that doesn't sounds very good to me

#

There's the IVT still there when you start

hazy saddle Jun 14, 2026, 1:05 PM

#

nah i avoid the first page alltogether

clear bison Jun 14, 2026, 1:05 PM

#

And since you're in real mode at that point it still matters

hazy saddle Jun 14, 2026, 1:05 PM

#

i allocate via this bullshit mmLol

clear bison Jun 14, 2026, 1:05 PM

#

hazy saddle nah i avoid the first page alltogether

Ah

hazy saddle Jun 14, 2026, 1:06 PM

#

Also would it if you don't get any interrupts?

#

Since that would kill me regardless

#

And it dies in protected mode

#

For some god forsaken reason

#

what happens if i skip prot mode?

clear bison Jun 14, 2026, 1:07 PM

#

Maybe it's just some random NMI bullshit

hazy saddle Jun 14, 2026, 1:08 PM

#

nop still dies

#

on the same instruction too

#

trl

clear bison Jun 14, 2026, 1:09 PM

#

Weird

hazy saddle Jun 14, 2026, 1:09 PM

#

INB4 QEMU bug

#

mmLol

rancid viper Jun 14, 2026, 1:09 PM

#

what does it die on

hazy saddle Jun 14, 2026, 1:10 PM

#

mov eax, [x86_ap_trampoline_cr3 - x86_ap_trampoline + ebx]

rancid viper Jun 14, 2026, 1:10 PM

#

how does it die

hazy saddle Jun 14, 2026, 1:10 PM

#

Triple faults

rancid viper Jun 14, 2026, 1:10 PM

#

ok but what exception

hazy saddle Jun 14, 2026, 1:10 PM

#

QEMU log dosnt even say

#

🥀

rancid viper Jun 14, 2026, 1:10 PM

#

can u paste qemu log

gentle quest Jun 14, 2026, 1:10 PM

#

hazy saddle INB4 QEMU bug

In kvm?

#

That would be a cpu bug

hazy saddle Jun 14, 2026, 1:11 PM

#

truke

#

trl

#

qemu-system-x86_64 -enable-kvm -cdrom evalynOS.iso -m 1G -smp 2 -cpu host -chardev stdio,id=debugcon -device isa-debugcon,chardev=debugcon -d int,cpu_reset -no-reboot -no-shutdown -D qemu_log.txt

rancid viper Jun 14, 2026, 1:11 PM

#

I mean with kvm u wouldnt get the exception in log anyway

hazy saddle Jun 14, 2026, 1:11 PM

#

📎 qemu_log.txt

tender mantle Jun 14, 2026, 1:11 PM

#

gentle quest That would be a cpu bug

well it died on real hardware as well :P

rancid viper Jun 14, 2026, 1:12 PM

#

hazy saddle

is this with kvm?

hazy saddle Jun 14, 2026, 1:12 PM

#

rancid viper is this with kvm?

Yes this only happens in KVM

rancid viper Jun 14, 2026, 1:12 PM

#

can u run it w tcg? or does it only manifest on kvm?

#

ah then log is useless yeah

hazy saddle Jun 14, 2026, 1:12 PM

#

And only with SEABIOS

rancid viper Jun 14, 2026, 1:13 PM

#

if issue still persists, in an hour or two when I am home, I can debug

clear bison Jun 14, 2026, 1:13 PM

#

Well GDB time it seems

hazy saddle Jun 14, 2026, 1:13 PM

#

clear bison Well GDB time it seems

GDB hardware breakpoint isn't even working

#

🥀

#

#

That address is where it gets relocated to

clear bison Jun 14, 2026, 1:16 PM

#

Maybe it's because it's never actually getting there

urban mulch Jun 14, 2026, 1:20 PM

#

hazy saddle GDB hardware breakpoint isn't even working

Are you sure that's actually a HW breakpoint

#

Because QEMU could very much just pretend

tender mantle Jun 14, 2026, 1:20 PM

#

hbreak does a hw breakpoint iirc

urban mulch Jun 14, 2026, 1:20 PM

#

That's not the point

#

The point is that QEMU might secretly not be

tender mantle Jun 14, 2026, 1:21 PM

#

I doubt it

urban mulch Jun 14, 2026, 1:21 PM

#

Because this isn't debugging on actual hw

#

I would not at all be surprised

tender mantle Jun 14, 2026, 1:21 PM

#

welp only one way to check

#

yeah it does use KVM_SET_GUEST_DEBUG

wraith star Jun 14, 2026, 1:29 PM

#

; setup CR3
mov eax, [x86_ap_trampoline_cr3 - x86_ap_trampoline + ebx]

#

this is where it faults

hazy saddle Jun 14, 2026, 1:33 PM

#

yes we found that

#

Hmm

wraith star Jun 14, 2026, 1:42 PM

#

ah okay mvm

#

Nvm

urban mulch Jun 14, 2026, 1:45 PM

#

but setting the breakpoint on that insn doesn't work?

hazy saddle Jun 14, 2026, 1:47 PM

#

urban mulch but setting the breakpoint on that insn doesn't work?

It's relocated to a place in physical memory and a breakpoint was set to the start of the trampoline where it gets relocated to on that config

#

No dice

urban mulch Jun 14, 2026, 1:48 PM

#

The fact that it is the AP startup is probably fucking with the breakpoint

#

I wouldn't be surprised if the virtual AP init had bugs that means breakpoints are broken in KVM

wraith star Jun 14, 2026, 1:50 PM

#

bruh

#

ds is 0x00

#

you did not reload segment registers

#

now it goes all the way up to the far jump to long mode

hazy saddle Jun 14, 2026, 1:51 PM

#

wraith star you did not reload segment registers

Isn't that technically not required mmLol

urban mulch Jun 14, 2026, 1:51 PM

#

yes it is

wraith star Jun 14, 2026, 1:51 PM

#

youre in protected mode

#

you have

hazy saddle Jun 14, 2026, 1:51 PM

#

yaaar

#

Damn I striped that code out for code size

#

Because it worked on everything I tested it on

urban mulch Jun 14, 2026, 1:51 PM

#

hazy saddle Damn I striped that code out for code size

WTF

wraith star Jun 14, 2026, 1:52 PM

#

suprisingly using 0x10 as data segment index works

urban mulch Jun 14, 2026, 1:52 PM

#

Stop overoptimizing early

wraith star Jun 14, 2026, 1:52 PM

#

when at that offset you gave 64 bit code

hazy saddle Jun 14, 2026, 1:52 PM

#

urban mulch WTF

I thought the other segments were ignored yaaar

urban mulch Jun 14, 2026, 1:52 PM

#

Especially for size when you're only saving INDIVIDUAL BYTES!!!!

#

Completely counterproductive

wraith star Jun 14, 2026, 1:52 PM

#

pls bring back the 32 bit data register lol

#

and usei t

#

dq 0 ; Null entry
dq 0x00cf9b000000ffff ; 32-bit code
dq 0x00cf93000000ffff ; 32-bit data
dq 0x00af9b000000ffff ; 64-bit code
dq 0x00cf93000000ffff ; 64-bit data

floral kettle Jun 14, 2026, 1:53 PM

#

there is no separate 64-bit data anyway

#

32-bit data is the same as 64-bit data

urban mulch Jun 14, 2026, 1:53 PM

#

Let me put it simply: Do Not Optimize before you clearly have a problem and identified where it is

wraith star Jun 14, 2026, 1:54 PM

#

floral kettle there is no separate 64-bit data anyway

yeah but for good measure

#

meme

floral kettle Jun 14, 2026, 1:54 PM

#

its literally the same value lol

wraith star Jun 14, 2026, 1:54 PM

#

i know, i see lmao

floral kettle Jun 14, 2026, 1:54 PM

#

unless you set the long mode bit which is ignored on everything except the code segment

urban mulch Jun 14, 2026, 1:57 PM

#

Long live the GDT, possibly the ugliest cruft left over from segmentation

hazy saddle Jun 14, 2026, 1:57 PM

#

welp the data segment being valid works

#

mmLol

urban mulch Jun 14, 2026, 1:57 PM

#

no shit sherlock

hazy saddle Jun 14, 2026, 1:58 PM

#

no need to be rude :p

urban mulch Jun 14, 2026, 1:58 PM

#

you were basically just hoping whatever the reset value was was correct before

wraith star Jun 14, 2026, 2:07 PM

#

also

hazy saddle Jun 14, 2026, 2:08 PM

#

well sorry that i wanted to spend some time hyper optimizing something when i wasnt feeling well and was bored and diddnt catch this crash in a BIOS path lmao mmLol

wraith star Jun 14, 2026, 2:08 PM

#

in the trampoline, is the hhdm mapped?

hazy saddle Jun 14, 2026, 2:08 PM

#

esp when bios crap had other issues

hazy saddle Jun 14, 2026, 2:08 PM

#

wraith star in the trampoline, is the hhdm mapped?

yes

#

also it works now

#

#

#

this was the extent of the bugs

#

mmLol

#

i can probally skip loading es/fs/gs but then il get yelled at mmLol

#

@wraith star @tender mantle @vocal estuary

📎 evalynOS.iso

#

thaks for all the help

#

this should patch it

tender mantle Jun 14, 2026, 2:11 PM

#

I’ll check on that pc later

wraith star Jun 14, 2026, 2:11 PM

#

yeah, now it works lol

#

good job

hazy saddle Jun 14, 2026, 2:12 PM

#

It worked on like the 3 real machines I tested it on

#

yaaar

#

And tcg and OVMF kvm

#

Maybe I should add a BIOS target to my make file

#

So I can do extra testings on thoes paths

wraith star Jun 14, 2026, 2:13 PM

#

yes

hazy saddle Jun 14, 2026, 2:13 PM

#

I think after I get all ts committed

#

I'm gonna work on some LA64 stuff

#

Then work on CPU local for both architectures

wraith star Jun 14, 2026, 2:13 PM

#

yes

hazy saddle Jun 14, 2026, 2:14 PM

#

On LA64 it will be a CSR that holds the base that needs to get reloaded on any context switch change

#

To the thread pointer

hazy saddle Jun 14, 2026, 2:14 PM

#

hazy saddle On LA64 it will be a CSR that holds the base that needs to get reloaded on any c...

Privilege change*

#

Or thread migration?

#

Idk when exactly I need to reload the register

#

yaaar

hazy saddle Jun 14, 2026, 2:50 PM

#

@hushed oracle how do you handle this on LA64 and riscv? I know there is a special ABI register for this along with one of the scratch registers.
But my brain is blanking on how to properly do it mmLol

hushed oracle Jun 14, 2026, 2:57 PM

#

I don't switch it trl

#

It has my per-CPU struct where I change the current running thread pointer to the TCB because 1 stack per CPU

#

But it's a scratch register which you can change, yes

hazy saddle Jun 14, 2026, 2:58 PM

#

I mean for when I should reload the GPR

#

The scratch registers has that CPUs point of truth yes

hushed oracle Jun 14, 2026, 2:58 PM

#

And the csrwr instruction has a bad name, and it actually swaps the GPR and CSR

#

So you can use it as a scratch register

#

And their NMIs have separate entry point...

hazy saddle Jun 14, 2026, 2:59 PM

#

Issue is it's probably slow right? So I want to keep it in the unused elf ABI GPR or whatever

#

Until I'm at a stage I don't know it's valid

hushed oracle Jun 14, 2026, 2:59 PM

#

hazy saddle On LA64 it will be a CSR that holds the base that needs to get reloaded on any c...

You only reload it on task switching

#

Userspace doesn't have access to CSRs

#

And their TLS pointer is one of the GPRs

#

So you don't have to do anything special or swapgs like on x86

hazy saddle Jun 14, 2026, 3:00 PM

#

Not the CSR the GPR. Which I guess would be the same? Load that CSR into a GPR on every task switch

hushed oracle Jun 14, 2026, 3:00 PM

#

You can do that, yeah

hazy saddle Jun 14, 2026, 3:01 PM

#

hazy saddle Not the CSR the GPR. Which I guess would be the same? Load that CSR into a GPR o...

and because running tasks can't migrate it should just work??

hushed oracle Jun 14, 2026, 3:01 PM

#

Then when you return from an interrupt, it just restores all GPRs

hushed oracle Jun 14, 2026, 3:01 PM

#

hazy saddle and because running tasks can't migrate it should just work??

I guess

hazy saddle Jun 14, 2026, 3:01 PM

#

Since whenever you switch it loads properly

hushed oracle Jun 14, 2026, 3:01 PM

#

The compilers don't touch that register

hazy saddle Jun 14, 2026, 3:02 PM

#

I'd also have to load it at interrupt entry from userspace

hazy saddle Jun 14, 2026, 3:02 PM

#

hushed oracle The compilers don't touch that register

Yeah which is why I'd wana use it right? And I can also have a similar thing with gp on riscv

hushed oracle Jun 14, 2026, 3:02 PM

#

There is only 1 entry point

hushed oracle Jun 14, 2026, 3:02 PM

#

hazy saddle Yeah which is why I'd wana use it right? And I can also have a similar thing wit...

I think GP is only a thing on RISC-V

#

TP is exactly the same between two

hazy saddle Jun 14, 2026, 3:03 PM

#

Yeah but isn't it a similar concept to this given on la64 it's just unused?

hushed oracle Jun 14, 2026, 3:03 PM

#

And interrupt handling is also basically the same, just with slightly different CSRs

hazy saddle Jun 14, 2026, 3:03 PM

#

true

#

Yeah I was gonna start that soonerish

hushed oracle Jun 14, 2026, 3:03 PM

#

hazy saddle Yeah but isn't it a similar concept to this given on la64 it's just unused?

You don't have to do anything special for it in kernel

hazy saddle Jun 14, 2026, 3:04 PM

#

I just am trying to make sure I know how CPU local works on RISCs

#

Since GS: is really nice

hushed oracle Jun 14, 2026, 3:04 PM

#

hazy saddle I just am trying to make sure I know how CPU local works on RISCs

It's just a GPR

hazy saddle Jun 14, 2026, 3:05 PM

#

Yeah exactly, and then I just reload the GPR on certain spots eg task switch and syscall/interrupt entry etc

hushed oracle Jun 14, 2026, 3:05 PM

#

yeah, i.e. you don't do anything special

#

I mean if you mean for kernel, you can also probably just tread it as a saved register (I think it is a saved register actually per ABI)

hazy saddle Jun 14, 2026, 3:06 PM

#

I meant more so for making sure that the register dosnt explode on task switches and when they migrate cores and other things

#

I probably want to avoid it ever being touched by things like that?

#

And it getting re loaded after a task switch completes on the new stack

hushed oracle Jun 14, 2026, 3:07 PM

#

I don't know, it depends on your kernel's design

hazy saddle Jun 14, 2026, 3:08 PM

#

yaaar

#

Fair

#

I guess il deal with the millions of bugs when I do this

#

mmLol

#

And struggle hard

hushed oracle Jun 14, 2026, 3:10 PM

#

Idk I haven't had task switching bugs for like 3 years now trl

hazy saddle Jun 14, 2026, 3:10 PM

#

wahhgone

#

Welp

#

Hopefully I can get help when it fucks up

hushed oracle Jun 14, 2026, 3:10 PM

#

I feel like it's only a problem when you don't know what you're doing

hazy saddle Jun 14, 2026, 3:11 PM

#

Yeah

#

I'm comfortable with x86 stuff

#

Since I've done it before

hushed oracle Jun 14, 2026, 3:11 PM

#

RV/LA are much simplier

hazy saddle Jun 14, 2026, 3:11 PM

#

And have went through that nightmare

#

true

hushed oracle Jun 14, 2026, 3:12 PM

#

Like x86 has a bunch of weird bs that you have to deal with

hazy saddle Jun 14, 2026, 3:12 PM

#

Though on x86 I get single cycle cpu local stuff and it's in a permanent register I don't have to worry about too bad mmLol

#

By abusing the address calculations shit

hushed oracle Jun 14, 2026, 3:12 PM

#

On RV/LA it's a GPR, so basically the same but with less limitations

#

Like no need to do gs:0 weirdness or whatever

hazy saddle Jun 14, 2026, 3:13 PM

#

Yeah so it should be mostly the same except instead of a swapgs is a rdcsr ig?

hushed oracle Jun 14, 2026, 3:14 PM

#

yeah

#

or rather wrcsr

#

You do wrcsr of tp to the scratch csr (idr its name), then you can save it from there (if you don't want to clobber any registers)

#

But also the ABI gives you a scratch register which you can clobber as a kernel

#

Which you can't use as userspace

hazy saddle Jun 14, 2026, 3:16 PM

#

hushed oracle But also the ABI gives you a scratch register which you can clobber as a kernel

Yeah that was me plan

#

Which also makes nested interrupts easier

hushed oracle Jun 14, 2026, 3:16 PM

#

yeah

hazy saddle Jun 14, 2026, 3:16 PM

#

hushed oracle Which you can't use as userspace

Crap true

#

Userspace may be using that

hushed oracle Jun 14, 2026, 3:17 PM

#

Like it's on you if you use it as userspace

hazy saddle Jun 14, 2026, 3:17 PM

#

Inb4 some software like QEMU wants it

#

Does anything on rv use gp?

hushed oracle Jun 14, 2026, 3:17 PM

#

I don't like the idea of it since you can then know when you've been preempted and stuff, but like it's probably totally fine

hazy saddle Jun 14, 2026, 3:17 PM

#

hazy saddle Inb4 some software like QEMU wants it

I know it wants fs

hushed oracle Jun 14, 2026, 3:18 PM

#

hazy saddle Inb4 some software like QEMU wants it

No, noone can use it

hazy saddle Jun 14, 2026, 3:18 PM

#

hushed oracle I don't like the idea of it since you can then know when you've been preempted a...

Hm?

#

How would I handle it with the wrcsr case

urban mulch Jun 14, 2026, 3:19 PM

#

hazy saddle Does anything on rv use gp?

The only valid place to store cpulocal on RISC-V is sscratch

#

Again, it's the only place that makes sense because of how RISC-V exceptions work

#

It is explicitly intended to be used for this

hazy saddle Jun 14, 2026, 3:20 PM

#

Yes of course, but isn't there some GPR it has to go into when you use it? Or in every case you use it you have to do a CSR operation to get the value and then use it

hushed oracle Jun 14, 2026, 3:20 PM

#

urban mulch The only valid place to store cpulocal on RISC-V is `sscratch`

LA is basically the same but with different names

urban mulch Jun 14, 2026, 3:20 PM

#

No it's a CSR operation you can read it into literally any register you want

#

RISC-V never assumes a specific register

hazy saddle Jun 14, 2026, 3:21 PM

#

I mean on every single CPU local operation do you have to load it from the CSR?

urban mulch Jun 14, 2026, 3:21 PM

#

At most the compressed instructions assume regs 0-15

hazy saddle Jun 14, 2026, 3:21 PM

#

Isnt that slow / serializing etc?

urban mulch Jun 14, 2026, 3:21 PM

#

Not necessarily

hushed oracle Jun 14, 2026, 3:21 PM

#

hazy saddle I mean on every single CPU local operation do you have to load it from the CSR?

Never

urban mulch Jun 14, 2026, 3:21 PM

#

There is NO guarantee about serializing on CSR ops

#

With the sole exception of writing to satp of pmp*

hazy saddle Jun 14, 2026, 3:22 PM

#

hushed oracle Never

So when do I need to load from the scratch registers

hushed oracle Jun 14, 2026, 3:22 PM

#

hazy saddle So when do I need to load from the scratch registers

When you enter the kernel

urban mulch Jun 14, 2026, 3:22 PM

#

When you want to access the CPU-local data

hushed oracle Jun 14, 2026, 3:22 PM

#

urban mulch When you want to access the CPU-local data

But you can just use tp

#

Once you load it once

urban mulch Jun 14, 2026, 3:23 PM

#

Still has to be in sscratch while in usermode

hushed oracle Jun 14, 2026, 3:23 PM

#

Yes

urban mulch Jun 14, 2026, 3:23 PM

#

But yes you can cache it there if you don't use tp already

hazy saddle Jun 14, 2026, 3:24 PM

#

true so I could on every entry into kernel space load it into tp. Which should work across thread migrations etc? Since tp either won't get touched there or it has to re enter into kernel space on the new core when it does???

#

And I can cache it in gp on riscv too ig? Or tp too

urban mulch Jun 14, 2026, 3:25 PM

#

hazy saddle <:true:1276366887755714591> so I could on every entry into kernel space load it ...

Don't put it in GP

#

TP is fine

hazy saddle Jun 14, 2026, 3:26 PM

#

What even is gp? Also I presume I don't really even need tls on my kernel because CPU local does most of that job anyways

urban mulch Jun 14, 2026, 3:26 PM

#

My opinion is just use relaxation relative to GP because they must've added that for a reason

urban mulch Jun 14, 2026, 3:26 PM

#

hazy saddle What even is gp? Also I presume I don't really even need tls on my kernel becaus...

Again, it's the address of the __global_pointer$ symbol, to which there could be implicit references

#

(Unless you do -mno-relax)

#

Just put it in TP though, especially if you weren't using TP yet already

hazy saddle Jun 14, 2026, 3:27 PM

#

urban mulch My opinion is just use relaxation relative to GP because they must've added that...

I still have no idea what tf relaxation is

hazy saddle Jun 14, 2026, 3:27 PM

#

urban mulch Just put it in TP though, *especially* if you weren't using TP yet already

Yeah that works out

#

Idk if I'd even really want tls regardless in general

urban mulch Jun 14, 2026, 3:27 PM

#

hazy saddle I still have no idea what tf relaxation is

Stuff close to __global_pointer$ needs only 12-bit signed offset

tender mantle Jun 14, 2026, 3:28 PM

#

hazy saddle I still have no idea what tf relaxation is

it just puts symbols near __global_pointer$ so they can be accessed via the gp register (I assume)

urban mulch Jun 14, 2026, 3:28 PM

#

Whereas most symbols use either an absolute or PC-relative or GOT/PLT address

tender mantle Jun 14, 2026, 3:28 PM

#

like how -2gb on x86 has optimizations for access afaik

urban mulch Jun 14, 2026, 3:29 PM

#

Idea is that things likely to be accessed more often (and that are small) go into .sdata, .srodata or .sbss, sections which are near __global_pointer$, so that you need one less instruction to access them

#

And since you were over-optimizing your x86 shit, why disable this?

hazy saddle Jun 14, 2026, 3:30 PM

#

Yeah exactly

urban mulch Jun 14, 2026, 3:30 PM

#

But you can disable it and then gp would be unused

hazy saddle Jun 14, 2026, 3:30 PM

#

I can just use tp for this

#

And then on la64 its the reserved register

#

And I reload it on any kernel entry via a swap of the CSR

#

Though don't I need to check if it's already been swapped before?

urban mulch Jun 14, 2026, 3:31 PM

#

Yeah so LA64 has basically the same thing

urban mulch Jun 14, 2026, 3:32 PM

#

hazy saddle Though don't I need to check if it's already been swapped before?

You can't permanently swap this

#

You do that only temporarily to have somewhere to put that register you have to save while loading the CPU-local data

#

That's why I have scratch space here:

/// Architecture-specific CPU-local data.
#[repr(C)]
#[derive(Default)]
pub struct ArchCpuLocal {
    /// Stack pointer to use for interrupts; NULL to use current stack ptr.
    pub irq_stack: *mut (),
    /// Scratch space used by the trap and interrupt handlers.
    pub scratch: [usize; 3],
}

hazy saddle Jun 14, 2026, 3:33 PM

#

So how's that helpful for not clobbering tp?

#

I'm sorry for not understanding any of this yaaar

urban mulch Jun 14, 2026, 3:34 PM

#

See this:

riscv_exception_asm:
    .cfi_return_column 64
    .cfi_signal_frame
    .cfi_register 64, sepc
    # Get the cpulocal ptr.
    csrrw t0, sscratch, t0
    # Normal save of T1.
    sd t1, 24(t0)
    # Restore sscratch to be cpulocal ptr again.
    csrrw t1, sscratch, t0
    # T1 used to save old value of T0.
    sd t1, 16(t0)

I am saving t0 to sscratch temporarily, saving t1 to ArchCpuLocal::scratch, then swapping back and moving the old value of t0 into there too.

#

Now I have the old t0 and t1 preserved, the CPUlocal in t0 and t1 usable as scratch

#

Later on these are copied back onto the stack, but the stack has not been loaded here yet

#

A simpler sequence happens in reverse to load the context before doing sret:

    # Restore the last regs.
    ld sp, 8(t0)
    ld t1, 24(t0)
    ld t0, 16(t0)
    
    # All done, return from exception handler.
    sret

hazy saddle Jun 14, 2026, 3:38 PM

#

But what happens in the case of an NMI where then scratch is in a middle state with invalid data?

urban mulch Jun 14, 2026, 3:38 PM

#

RISC-V has no NMI

#

And if it does it's always fatal so don't bother returning anyway

hazy saddle Jun 14, 2026, 3:39 PM

#

Ah that's interesting

urban mulch Jun 14, 2026, 3:39 PM

#

Otherwise you have the RNMI extension, which gives you a different vector than the standard stvec

hazy saddle Jun 14, 2026, 3:39 PM

#

I think LA64 HAS NMIs though similar to that extension???

urban mulch Jun 14, 2026, 3:39 PM

#

IMO NMIs have no place in modern CPUs

#

Unless they're fatal

#

For example, a machine check on x86 when trying to access vacant physical memory right?
On RISC-V you get an access (not page!) fault instead

#

Which is synchronous instead of being an NMI

hazy saddle Jun 14, 2026, 3:41 PM

#

Interesting

#

How does the NMI extention work with handling these btw?

urban mulch Jun 14, 2026, 3:42 PM

#

You also have these for other failures

hazy saddle Jun 14, 2026, 3:42 PM

#

Okay but yeah the scratch registers stuff should work out in other cases

urban mulch Jun 14, 2026, 3:42 PM

#

Which are, again, synchronous

urban mulch Jun 14, 2026, 3:42 PM

#

hazy saddle How does the NMI extention work with handling these btw?

NMI can go through stvec but unless you have the RNMI extension there is no standard how how NMIs work

#

And again, it's only supposed to be for fatal things, so chances are the firmware catches it and resets the machine

#

Oh

#

S-mode can't catch NMIs anyway

#

So don't worry about them

#

It's always into M-mode

hazy saddle Jun 14, 2026, 3:46 PM

#

Ah so I don't have to deal with them myself ever

#

Good

#

Now about them on LA64 @hushed oracle mmLol

#

If that works all properly then I should be good to go

tender mantle Jun 14, 2026, 3:47 PM

#

ugh

hazy saddle Jun 14, 2026, 3:47 PM

#

Being with the proper handling on exception entry and task switching it should all work

tender mantle Jun 14, 2026, 3:47 PM

#

I should just rewrite my kernel for riscv atp lol

#

the grass might be greener :^)

hazy saddle Jun 14, 2026, 3:48 PM

#

Or

#

Support both

tender mantle Jun 14, 2026, 3:49 PM

#

nah drop x86

hazy saddle Jun 14, 2026, 3:49 PM

#

And don't do another rewrite for the love of god

hazy saddle Jun 14, 2026, 3:49 PM

#

tender mantle nah drop x86

If you do that you are helping me with my riscv port :p

#

And la64 one too

tender mantle Jun 14, 2026, 3:49 PM

#

no lol

#

yeah def not lol

hazy saddle Jun 14, 2026, 3:49 PM

#

I'm not letting you rewrite your kernel

#

For the millionth time

#

Istg

tender mantle Jun 14, 2026, 3:49 PM

#

the great part about it being my kernel is you have no control over that

#

tho if I was to support another arch

#

idk what it would be

#

anything but aarch64 :^)

hazy saddle Jun 14, 2026, 3:51 PM

#

tender mantle idk what it would be

LA64

#

mmLol

tender mantle Jun 14, 2026, 3:51 PM

#

ehhhh

#

50/50 on it

hushed oracle Jun 14, 2026, 3:51 PM

#

urban mulch That's why I have scratch space here: ```rs /// Architecture-specific CPU-local ...

I have basically the same thing

tender mantle Jun 14, 2026, 3:51 PM

#

on one hand it looks cool

#

on the other the docs are straight ass afaik

hushed oracle Jun 14, 2026, 3:54 PM

#

hazy saddle Now about them on LA64 <@350748255929499649> <:mmLol:251441267496583169>

It's a separate entry point, which also disables paging (since you can't refill tlb)

hazy saddle Jun 14, 2026, 3:54 PM

#

yaaar

#

So what do you do on NMIs

hushed oracle Jun 14, 2026, 3:55 PM

#

I don't handle them trl

#

But idk you handle them as normal?

#

I guess you can even enable paging and stuff and jump to a normal entry point, if you really want that

#

(after you normalize the CSRs)

hazy saddle Jun 14, 2026, 3:56 PM

#

Issue is

#

How the fuck can you get a stack

#

Or like

#

Do anything properly

#

I guess you can use one of the secondary scratch registers

hushed oracle Jun 14, 2026, 3:57 PM

#

They give you a different scratch register

#

Yes

hazy saddle Jun 14, 2026, 3:57 PM

#

And have that as for NMI

hushed oracle Jun 14, 2026, 3:57 PM

#

They're not secondary, you get a scratch register per entry point

#

One for interrupts, one for tlb refill, one for NMIs

tender mantle Jun 14, 2026, 3:58 PM

#

see thankfully I'm not evalyn so I don't give a fuck about handling nmis or mces lol

#

🙏

hushed oracle Jun 14, 2026, 3:58 PM

#

tender mantle see thankfully I'm not evalyn so I don't give a fuck about handling nmis or mces...

Same

tender mantle Jun 14, 2026, 3:58 PM

#

(she's gonna force me one day)

hushed oracle Jun 14, 2026, 3:58 PM

#

nooo

hazy saddle Jun 14, 2026, 3:58 PM

#

hushed oracle <:nooo:750466870993223750>

dont think you are being spared from this too

hushed oracle Jun 14, 2026, 3:59 PM

#

gdtdoesnotwork

hazy saddle Jun 14, 2026, 3:59 PM

#

okay yeah you have MERRSAVE

tender mantle Jun 14, 2026, 4:00 PM

#

see

hazy saddle Jun 14, 2026, 4:00 PM

#

which can be the exat same as SAVE1

tender mantle Jun 14, 2026, 4:00 PM

#

the good thing about evalyn forcing me to do it

hazy saddle Jun 14, 2026, 4:00 PM

#

but for NMIs

#

PSP1G_pspTrollar

tender mantle Jun 14, 2026, 4:00 PM

#

is that I can just beg her to implement it

hazy saddle Jun 14, 2026, 4:00 PM

#

tender mantle is that I can just beg her to implement it

https://tenor.com/view/family-guy-joe-joe-taken-away-gif-17520860855595872089

Tenor

#

You still aren't safe from the helping me debug it part

tender mantle Jun 14, 2026, 4:01 PM

#

yes I am lol

#

I have no idea about loongarch64

hazy saddle Jun 14, 2026, 4:01 PM

#

Oh please

#

You will just have Claude fix it

tender mantle Jun 14, 2026, 4:01 PM

#

🥀

#

shut the fuck up

hazy saddle Jun 14, 2026, 4:01 PM

#

Only because you asked nicely

tender mantle Jun 14, 2026, 4:01 PM

#

I don't use ai in my kernel tyvm

rancid viper Jun 14, 2026, 4:01 PM

#

luna and claude sitting in a tree

tender mantle Jun 14, 2026, 4:02 PM

#

rancid viper luna and claude sitting in a tree

you're so lucky this isn't osdev3

hazy saddle Jun 14, 2026, 4:02 PM

#

Thank you @hushed oracle and @urban mulch
I should be able to handle this properly on RV and LA64 now PSP1G_pspTrollar

rancid viper Jun 14, 2026, 4:02 PM

#

tender mantle you're so lucky this isn't osdev3

the perfect crime

hazy saddle Jun 14, 2026, 4:02 PM

#

Hopefully this doesn't all fall apart in two seconds when implement it

#

pain

tender mantle Jun 14, 2026, 4:02 PM

#

(it will)

hazy saddle Jun 14, 2026, 4:03 PM

#

Il probably store a physical pointer in the machine error thing

hushed oracle Jun 14, 2026, 4:13 PM

#

Haven't had issues with it trl

#

You're writing a microkernel so there is less surface for bugs trl

clear bison Jun 14, 2026, 5:01 PM

#

hazy saddle Damn I striped that code out for code size

Saving like 10 bytes btw 🥀🥀🥀

hazy saddle Jun 14, 2026, 5:02 PM

#

clear bison Saving like 10 bytes btw 🥀🥀🥀

And an extra 8 for the GDT entry

haughty acorn Jun 14, 2026, 5:09 PM

#

the most premature of optimization

tender mantle Jun 14, 2026, 5:11 PM

#

Think about it tho

#

With those extra 18 bytes

#

You can store a whole 1.7 page structs

#

Assuming your page struct is small as shit

hazy saddle Jun 14, 2026, 5:18 PM

#

tender mantle Assuming your page struct is small as shit

I get 1/4th a page struct

#

Because I align them to a cache line

vocal estuary Jun 14, 2026, 5:19 PM

#

Bouta test now

tender mantle Jun 14, 2026, 5:19 PM

#

Same

hazy saddle Jun 14, 2026, 5:19 PM

#

bigbrain

vocal estuary Jun 14, 2026, 5:19 PM

#

This computer is 1GB of RAM

urban mulch Jun 14, 2026, 5:20 PM

#

64B page struct seems a bit big

#

What are you keeping in there

tender mantle Jun 14, 2026, 5:21 PM

#

For my kernel it’s like 24 bytes of data and the rest is padding lol

#

I’m certain I could shrink it as well

urban mulch Jun 14, 2026, 5:21 PM

#

Mine is exactly 32 bytes

hazy saddle Jun 14, 2026, 5:21 PM

#

urban mulch 64B page struct seems a bit big

Aligning it for cache line purposes for locking it cleanly

vocal estuary Jun 14, 2026, 5:23 PM

#

It seems my PC can't detect it

#

What flashing tool did you use

hazy saddle Jun 14, 2026, 5:23 PM

#

dd

vocal estuary Jun 14, 2026, 5:23 PM

#

hmmm

hazy saddle Jun 14, 2026, 5:23 PM

#

The ISO supports both bios and UEFI boot

vocal estuary Jun 14, 2026, 5:27 PM

#

HAHA

#

GOT IT THIS TIME

#

lets see how it runs

#

wide mica Jun 14, 2026, 5:35 PM

#

urban mulch 64B page struct seems a bit big

Most OSes do that

hazy saddle Jun 14, 2026, 5:40 PM

#

vocal estuary

Seems like it's not even getting into limine

vocal estuary Jun 14, 2026, 5:43 PM

#

Could be an issue on my end

hazy saddle Jun 14, 2026, 5:44 PM

#

I think older hardware needs a custom limine without certain things?

#

I've seen this happen on older machines

#

With ISOs I give

#

You need to make your own ISO / USB with limine on it

vocal estuary Jun 14, 2026, 5:45 PM

#

...oh shit

#

I will... first I'ma see if I can get FreeDOS on here

haughty acorn Jun 14, 2026, 5:45 PM

#

urban mulch Mine is exactly 32 bytes

same

hushed oracle Jun 14, 2026, 5:45 PM

#

I have a GRUB build of my OS trl

#

(if you want to try something different)

haughty acorn Jun 14, 2026, 6:03 PM

#

urban mulch Mine is exactly 32 bytes

windows page struct is an odd 48 bytes for some fuckin reason lmao

vocal estuary Jun 14, 2026, 6:04 PM

#

Idk if this is just my issue

#

Every ISO and image I’ve flashed has failed

#

A2 Oberon, EvalynOS (actually has the USB get detected, unlike others), Haiku, Windows XP Home, FreeDOS. All failed

vocal estuary Jun 14, 2026, 9:46 PM

#

I'm gonna try running it tomorrow, I got a better USB

hazy saddle Jun 15, 2026, 12:58 PM

#

inorder to properly compete with 16bit shrekOS evalynOS is now capable of printing out shrek

wraith star Jun 15, 2026, 1:00 PM

#

someone give evalyn 604849 upvotes!!!

hazy saddle Jun 15, 2026, 1:00 PM

#

(I'm taking a break today and I just shoved this into a PNG to ascii converter similar to the ralsei art on panic)

wanton grove Jun 15, 2026, 1:01 PM

#

hazy saddle inorder to properly compete with 16bit shrekOS evalynOS is now capable of printi...

send to me shrek ascii art

hazy saddle Jun 15, 2026, 1:01 PM

#

No get your own

#

(I'm taking a shit rn)

wanton grove Jun 15, 2026, 1:02 PM

#

idc

hazy saddle Jun 15, 2026, 1:02 PM

#

wraith star someone give evalyn 604849 upvotes!!!

I wonder if I should post this on #showing-off

#

PSP1G_pspTrollar

wanton grove Jun 15, 2026, 1:02 PM

#

hazy saddle I wonder if I should post this on <#1437649502717874267>

post it to reddit

#

with title

#

shrekos with fred

hazy saddle Jun 15, 2026, 1:02 PM

#

64bit ShrekOS

#

Maybe next April fool's

#

@wanton grove

📎 kernel.c

wanton grove Jun 15, 2026, 1:12 PM

#

meoww

hazy saddle Jun 15, 2026, 1:14 PM

#

that has ze ascii art

hazy saddle Jun 15, 2026, 1:15 PM

#

vocal estuary I'm gonna try running it tomorrow, I got a better USB

have you tested it?

vocal estuary Jun 15, 2026, 1:15 PM

#

hazy saddle have you tested it?

i'm at school, and I really wanna test it because if I'm unable to in the next 4 hours I'ma crash out

wanton grove Jun 15, 2026, 1:21 PM

#

vocal estuary i'm at school, and I really wanna test it because if I'm unable to in the next 4...

school in summer

vocal estuary Jun 15, 2026, 1:21 PM

#

wanton grove school in summer

Nope... school hasn't even ended yet 😭

viral bison Jun 15, 2026, 1:38 PM

#

vocal estuary Nope... school hasn't even ended yet 😭

BRUH

#

do you have ACs at least?

vocal estuary Jun 15, 2026, 2:03 PM

#

viral bison do you have ACs at least?

Yeah we do

viral bison Jun 15, 2026, 2:03 PM

#

vocal estuary Yeah we do

lucky

hazy saddle Jun 15, 2026, 5:30 PM

#

ended up getting heavily side tracked

#

PSP1G_pspTrollar

#

i think? this is finished

#

for riscv exception handling

#

im probally gonna setup the riscv port soon

#

and add in that

#

and then work on the LA64 version

#

yaaar

#

i will also have to work on cpu local and shit

#

but for RV i can just shim it enough mmLol

#

since il only be on one hart

#

and it can use the static copy in the BSS for the BSP's cpu local

vocal estuary Jun 15, 2026, 7:20 PM

#

vocal estuary i'm at school, and I really wanna test it because if I'm unable to in the next 4...

Didn't get anything with this new USB.

hazy saddle Jun 15, 2026, 7:22 PM

#

vocal estuary Didn't get anything with this new USB.

question

#

what happens if you manually install limine on it?

vocal estuary Jun 15, 2026, 7:22 PM

#

hazy saddle what happens if you manually install limine on it?

I'ma try that

hazy saddle Jun 15, 2026, 7:22 PM

#

and not use an ISO

hushed oracle Jun 15, 2026, 8:40 PM

#

Have you tried a different bootloader?

clear bison Jun 15, 2026, 8:55 PM

#

hazy saddle i think? this is finished

Da hell

hazy saddle Jun 15, 2026, 8:59 PM

#

clear bison Da hell

riscv exception handling??

#

ive been working on it a bit more :p

clear bison Jun 15, 2026, 9:00 PM

#

hazy saddle riscv exception handling??

The part in which you save and restore registers is so long lol

hazy saddle Jun 15, 2026, 9:00 PM

#

well there are 32 GPRs

#

and two of the temps i have to regrab from the cpu local when saving

#

the newer version only uses 2 temps vs 3 aswell

clear bison Jun 15, 2026, 9:01 PM

#

I don't get what's your obsession with overoptimizing ts

hazy saddle Jun 15, 2026, 9:01 PM

#

😭

clear bison Jun 15, 2026, 9:01 PM

#

1 more load or store ain't gonna make a difference

hazy saddle Jun 15, 2026, 9:01 PM

#

The one register being saved took like 4 seconds to be clear

#

I just had to move one thing somewhere else

#

To reuse another temp

#

And I'm stopping myself from more optimizations that have to do with instruction ordering

hazy saddle Jun 15, 2026, 9:03 PM

#

clear bison 1 more load or store ain't gonna make a difference

Think of the saved nano seconds tho

#

wahhgone

clear bison Jun 15, 2026, 9:04 PM

#

hazy saddle Think of the saved nano seconds tho

Ts ain't that code i used on an Arduino to have high speed bidirectional transfers via a parallel port 💔🥀

hazy saddle Jun 15, 2026, 9:05 PM

#

😭

#

Fair

#

In other news though

#

42 stars

#

The number of the life the universe and eveything

clear bison Jun 15, 2026, 9:06 PM

#

6x7=42 so 6-7 is the meaning of life

#

Top 10 math facts nobody knew about

sterile plank Jun 15, 2026, 9:07 PM

#

clear bison 6x7=42 so 6-7 is the meaning of life

https://tenor.com/view/67-6767-676767-cat67-cat-gif-18345003009543756801

Tenor

hazy saddle Jun 15, 2026, 9:07 PM

#

clear bison Top 10 math facts nobody knew about

https://tenor.com/view/kirby-meme-kirbydeath-funny-death-gif-15170895036830279366

Tenor

clear bison Jun 15, 2026, 9:08 PM

#

hazy saddle https://tenor.com/view/kirby-meme-kirbydeath-funny-death-gif-1517089503683027936...

https://tenor.com/view/knuckles-gif-26722749

Tenor

gilded fjord Jun 15, 2026, 9:13 PM

#

clear bison 6x7=42 so 6-7 is the meaning of life

6-7 is -1 tho

#

not 42

clear bison Jun 15, 2026, 9:13 PM

#

gilded fjord 6-7 is -1 tho

https://tenor.com/view/an-iq-too-high-raven-crow-tiktok-gif-3869671553367641450

Tenor

gilded fjord Jun 15, 2026, 9:13 PM

#

nah

#

I'm low IQ

hazy saddle Jun 15, 2026, 9:14 PM

#

gilded fjord I'm low IQ

Debatable

clear bison Jun 15, 2026, 9:15 PM

#

gilded fjord I'm low IQ

Gravitons exist

#

I'm waiting for your response, dw

gilded fjord Jun 15, 2026, 9:15 PM

#

clear bison Gravitons exist

we don't know, actually

clear bison Jun 15, 2026, 9:17 PM

#

Lame

urban mulch Jun 15, 2026, 9:26 PM

#

hazy saddle In other news though

Don't worry I ruined that for you

hazy saddle Jun 15, 2026, 9:27 PM

#

urban mulch Don't worry I ruined that for you

😭

kindred stirrup Jun 16, 2026, 7:39 AM

#

gilded fjord I'm low IQ

if you were low IQ you wouldn't have been able to get a bachelor's in physics

hazy saddle Jun 16, 2026, 7:49 AM

#

I really hate to see it when you think low of yourself lukflug

gilded fjord Jun 16, 2026, 8:35 AM

#

hazy saddle I really hate to see it when you think low of yourself lukflug

You're right, I'm sorry

sterile plank Jun 16, 2026, 8:36 AM

#

Lukflug deserves more love

hazy saddle Jun 16, 2026, 8:43 AM

#

gilded fjord You're right, I'm sorry

its okay hug

magic saffron Jun 16, 2026, 9:33 AM

#

sterile plank Lukflug deserves more love

luvflug

fiery tangle Jun 16, 2026, 1:36 PM

#

https://cdn.discordapp.com/attachments/1474483792373612669/1516432649760149705/image.png?ex=6a329f75&is=6a314df5&hm=4b1cca9bd61a29d403d3347fa27502f8cc5dd538a593bcde8fe5cb5312f12e1d&

rancid viper Jun 16, 2026, 3:00 PM

#

gemini decided to straight up lie

#

lmao

#

oh, it mentions kvm in the third paragraph

#

4028suseyes

hazy saddle Jun 17, 2026, 7:23 PM

#

#

shhhh

floral kettle Jun 17, 2026, 7:24 PM

#

poggers

hazy saddle Jun 17, 2026, 7:24 PM

#

I just need to wire in the exception handling shit I was working on the other day

#

And then work on CPU local some sched shit

#

Maybe some paging shit

#

But things are coming together

hazy saddle Jun 17, 2026, 7:27 PM

#

hazy saddle I just need to wire in the exception handling shit I was working on the other da...

Oh and loongarch64 exception handling since they were both super similar besides slightly different CSR sementics

floral kettle Jun 17, 2026, 7:30 PM

#

at least you are making more progress than I am with my own kernels KEKW I just keep on rewriting and then getting tired of writing the gdt/idt/paging/mm/sched/lapic/hpet/acpi/other basic stuff a billion times (and not being able to decide what I actually want the kernel to be compatible with)

hazy saddle Jun 17, 2026, 7:30 PM

#

My plan is to get every thing to a state I'm perfectly happy with

#

Eveything very good

#

But for a minimal state

#

Eveything documented everything very nice and proper and cleaned up

#

All the nice doxygen comments and whatever else

#EvalynOS