EvalynOS

[hazy saddle]

i was considering having a struct that defines what bits to set and how.

the radix/next level part would be a macro

[hazy saddle]

how many levels to traverse even

i may end up making it mostly seperate per arch

[slate meadow]

I thought about that too but figured the details between archs make this less worth

[hazy saddle]

and that way i dont lock myself in too hard to radix trees either

[hazy saddle]

atleast for the 4 limine support all doing radix trees iirc it wouldnt be bad

[slate meadow]

I have a split with the pmap (origin from mach), providing a generic implementation for radix based MMUs

that would allow me to provide the same interfaces for other architectures

[hazy saddle]

yeah maybe maybe

when i design it i may do a bit more diffrent

and make some shared abstractions for radixing

but alot of it can be fully spesific since my makefile supports that

and for IRQs il have exceptions be arch spesific but syscalls & device IRQs will not get an archtecture frame besides ones that require it

and they can have a spesific impl

and the prototype would prolly take in a void* to be generic etc

i think fork is one of the few that needs that and cant just be absracted to a return tuple and a set o' args

[slate meadow]

iirc i implemented fork generically in my previous iteration, had some kind of _arch_ctx pointer passed and had CONTEXT_IP/SP macros to access the correct fields

[slate meadow]

https://codeberg.org/Yakdist/Yak/src/commit/ff4549b19110985254d79027a35a88aa4d2c77ae/kernel/arch/x86_64/include/yak/arch-pagemap.h

I wanted to rewrite the kernel so much of it is incomplete, iirc the arrays approach was inspired by keyronex. This is the architecture specific part for x86 as an example

this scheme made it quite portable

[round shoal]

tf is fred support? also,qemu maintainers itself are vibecoding

[rancid viper]

x86 commitees new spec

https://www.intel.com/content/www/us/en/content-details/779982/flexible-return-and-event-delivery-fred-specification.html

[hazy saddle]

https://evalyngoemer.com/blog/2026/04/11/implementing-fred/

Making articles

https://tenor.com/view/dancing-family-guy-peter-gif-20560406

[neon karma]

osdev wiki article when

[hazy saddle]

I made one but I need to fix it

Also I was bribed to make this one

@urban mulch is gonna make a hack a day article on this

So I’m getting my two minutes of fame

and they get money from making it

[urban mulch]

1.0213765 nanoseconds of fame

[hazy saddle]

real

[hazy saddle]

doing a lil cooking

This way it’s very easy for FRED to convert

[urban mulch]

Hi, why are these packed

[hazy saddle]

Just so the compiler don’t add padding?

Even though it technically shouldn’t

[urban mulch]

You need to learn more about struct layout

Becuase this wouldn't get padding

[hazy saddle]

It shouldn’t

[urban mulch]

And also you want it 8-byte aligned

Not 1

[urban mulch]

I'm telling you it won't because I know for sure it won't.

[hazy saddle]

i removed it

[hazy saddle]

me when fred is so back baby

[soft snow]

FREEEEDDD

our beloved ❤️

[hazy saddle]

I wonder how many kernels I could send patches to for adding it

It’s really fucking easy tbh

Esp if you don’t rework the legacy paths as much

Which I did here

still on SIMICS too

Once I have more crap hopefully I won’t need to patch it more?

Other than the obvious userspace and syscall support

But it shouldn’t like magically only handle one interrupt etc

[gentle quest]

how do i run simics

[hazy saddle]

#resources message

[gentle quest]

how is it so annoying to run lmao

[hazy saddle]

annoying to figure out how to make it work

and its slow as shit unless you are on an intel CPU with thier custom hypervisor driver

It’s ~2x slower than TCG

for refernce

[gentle quest]

lol

yeah i managed to get it up

no SMBIOS and no hypervisor bit set also

[hazy saddle]

Sick

[gentle quest]

its undetectable

thanks for your guide

[hazy saddle]

Other than the fact it’s slow as shit

And no problem

Have fun implementing FRED

Want me to push my local changes so you can take some inperation

[gentle quest]

by the time i get to that you will have that code pushed trust me

[hazy saddle]

Fair fair lmao

[hazy saddle]

This is the main reason I want QEMU to have it with the crappy patches

So when I’m testing it’s easy easier to validate I didn’t duck it up

There are several commits where it dosnt work

And now it magically works again

[gentle quest]

its such a weird project overall

u download a few weird files, set up some weird project, run some weird bat, run some weird commands inside of it

its the least intuitive project i think ive seen ever

[hazy saddle]

I know right 😭

And apparently they change it a ton

I had a friend who used it like a year before this whole thing

[gentle quest]

why does it even exist?

[hazy saddle]

They couldn’t even figure it out

[gentle quest]

like what is its purpose

why cant they use qemu

[hazy saddle]

QEMU dosnt support FRED and ig they never sent patches and its meant to be like THE MOST accurate emulator

It’s for validating a lot of crap

[gentle quest]

so its like designed for accuracy?

[hazy saddle]

They also used to have itanium on here but it was paid only iirc

[hazy saddle]

Yes

and it’s like university or corporation software

So it’s obtuse as shit

With the documentation being worse than many fandom wikis

[gentle quest]

yeah its hilariously bad

like it almost feels like it was designed for the most obtuse software competition

[hazy saddle]

It legit took me more time

To figure out the software

Than it took to implement the damn thing

Oh also can your kernel run on bochs?

They “support” FRED

But it crashes every kernel I’ve tried on it

[gentle quest]

yeah ofc

[hazy saddle]

💀

It cannot boot astral or Linux or mine

[gentle quest]

their fred impl or other unrelated stuff?

[hazy saddle]

Unrelated stuff

[gentle quest]

i couldnt boot linux on it also

[hazy saddle]

Linux tripped on IOAPIC

Mine and astral tripped on some FPU stuff iirc

[gentle quest]

my kernel doesnt do much atm so yeah it does boot

maybe that will change later

[hazy saddle]

Imagine you implement FRED and then they manage to muck that up too

💀

[gentle quest]

yeah

[hazy saddle]

I feel like the main point of bochs is i686

[gentle quest]

perhaps

its also nice for debugging low level code like bootloaders and stuff

also it prints a lot of useful usb errors

[hazy saddle]

True true

SIMICS also iirc has USB error reports etc

[gentle quest]

can u even customize hardware there?

[hazy saddle]

You can but the documentation is again ass

I found about the fred comp class thing

From a LKML post

💀

[gentle quest]

i get that as well

but its definitely not my code doing it

do u know what its even talking about?

[gentle quest]

lol

[hazy saddle]

It’s some technical violations of spec or some crap

[gentle quest]

by uefi firmware?

[hazy saddle]

Prolly the firmware they provide

Yeah

It is firmware so

[gentle quest]

yeah

it says .lan

so i guess its network related

[hazy saddle]

Yeah

When do you think you will wana implement FRED

Or I can go talk is cheap myself and do to for you

[gentle quest]

nahh i wanna learn how it works so i can do it myself

[hazy saddle]

Fair fair

[gentle quest]

not sure yet

[hazy saddle]

Feel free to ping for any questions though

[gentle quest]

i kinda want hardware to test it on

[gentle quest]

thanks

[hazy saddle]

You can get a panther lake laptop

They aren’t tooo expensive (for a laptop)

And should support it

[gentle quest]

imagine getting one and then finding out it doesnt support it

lmao

[hazy saddle]

I mean you can just return it

Nobody is gonna stop you

What the FRED police?

[gentle quest]

fair

[hazy saddle]

Zen6 will also have it later this year

If you wanted to wait that long

I also wonder if there is anyone in this server with a pantherlake machine already?

Could use that for testing

Tbf it’s not a bad idea to add support early

Since you may wana rework the IDT and panic paths too etc

Because the FRED stack layout is a little diffrent

So it’s nice to have it atleast blocked out early

[gentle quest]

yeah

[hazy saddle]

So it’s a minor patch to fix if there is hardware issues

[gentle quest]

ig

[hazy saddle]

Plus the spec is finalized since mid last year

And is in the SDM full and proper etc

[eager roost]

i need to ask u one thing

tf is this code:

[urban mulch]

image

[eager roost]

still it looks like a war crime

[urban mulch]

cry about it

[eager roost]

hhehehehehehehehhehehe

heheeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeheheheheheh

[hazy saddle]

It prints the ralsei on panic

[eager roost]

kewl

very kewlč

[hazy saddle]

The ralsei here

[eager roost]

its on the generic arch

[hazy saddle]

Yes

Because it’s arch independent

But still part of the panic

That folder also includes the headers to include for panicking

[eager roost]

oh, also it looks like idk

[wanton grove]

skill issue

[eager roost]

dont ask me how its an EXE

just dont

[hazy saddle]

your terminal is just shite

[eager roost]

yes

[hazy saddle]

i just use alot of modern ANSI

[eager roost]

probabbly

[eager roost]

and my terminal is modern windows terminal??? it dont connect

[hazy saddle]

use a linux terminal

https://apps.kde.org/konsole/

that should suppirt winshit too

[wanton grove]

some terms can just have unimplemented some ansi codes

[eager roost]

man

i wish to switch to linux

but cant

[hazy saddle]

I use the 32bit true color ANSI sequences

And the block characters

[hazy saddle]

i made it do things in a loop and it works

so i know its fully right

ans in SIMICS too

[urban mulch]

Friedrich von x86-64

[hazy saddle]

FRED

🔛 🔝

We must spread the word of FRED

[gentle quest]

Do you need a TSS if doing FRED?

Or does stack level 0 replace that

[hazy saddle]

IIRC yes

though i set it regardless

let me test

this isnt crashing

so yes with FRED you do not need a TSS

though it cant hurt besides a little bit of wasted mem

depending on how its setup

[gentle quest]

Yeah looks like you dont

[round shoal]

freeeeeeeeeeeeeeeeeeeeeeeeeeeeeedddddddddddddddd

[hazy saddle]

Actually I need to recheck the spec

IIRC they also disable cpl3 port IO?

FRED is honestly a little bit of x86S coming true in a few ways

But being properly gated behind a feature bit the OS enabled

[hazy saddle]

It seems the TSS can still be used for that

[tender mantle]

Which is now its only use

Until ofc Intel kills that

[restive spire]

do you know what time it is? yes, it's FRED-o-clock!

[round shoal]

ahhhh not konsole

[hazy saddle]

https://git.evalyngoemer.com/evalynOS/evalynOS/commit/bacc496f419446d3831da990acd7fe04517c67ea

got things pushed

cc: @restive spire if you wana check this to see what your doing diff

Your thing won’t build so you may have to fix that

[twilit glen]

What's FRED?

[hazy saddle]

https://www.intel.com/content/www/us/en/content-details/819481/flexible-return-and-event-delivery-fred-specification.html

Lowkey

I am gonna have to change my TSS and GDT and IDT things to be under CPU local

Not sure the best way to do that rn

No no it should be fine?

I just need a way to set it up on APs

Ehhh

I’m thinking too far ahead rn

My functions are already abstracted enough to not make it too bad a rework

[hazy saddle]

Uhhh but yeah FRED is basically an IDT replacement

And it makes crap a lot nicer to deal with

Go check my commit and the specs for more

I also have a blog post related to this on my site

[round shoal]

how tf u installed qemu-fred

[hazy saddle]

Patches

And compiling from source

And putting it in /opt/qemu-fred

And making a symlink

[round shoal]

and simics

?

[hazy saddle]

#resources message

[slate meadow]

do you have the patches available somewhere

[hazy saddle]

Be warned they are kinda fucky and only work with my kernel and Linux since they don’t cover all edge cases of the spec

But if you implement it standardly it will be fine

And if it works it will work good in SIMICS atleast

Let me go grab them

.

[slate meadow]

thanks, i‘ll give it a shot

[hazy saddle]

@slate meadow let me know how it goes and if you need help

Also make sure to try and get SIMICS to work to fully validate it

But the patches make it way faster to iterate

[slate meadow]

yeah i was going to try it via qemu first and then see what simics says

[hazy saddle]

That’s the way

It took me longer to make SIMICS work

Than it did to make the driver

💀

[restive spire]

installing simics wasnt difficult on windows

install the whole package set

then create a new project

then it will give you option to go to a command prompt, in the comand prompt type simics then:

run-command-file targets\qsp-x86\qsp-usb-boot.simics cpu_comp_class = "x86-experimental-fred" disk0_image = "Z:/retrorocket/cmake-build-debug/usb.img"

(replace with path to your usb img)

[hazy saddle]

installing isnt bad on linux

[restive spire]

then run

[hazy saddle]

its just annoying to find the right commands

[restive spire]

i asked GPT to tell me them 😄

intels docs are a nightmare for simics

like its designed for their internal engineering team

[hazy saddle]

it basicaly is

[haughty acorn]

damn i was gonna go in and put a star react on this thread but i cant because the original message is deleted smh

[hazy saddle]

Original message is deleted?

You can also click right here

[haughty acorn]

it doesnt appear for me and in the forum view it says original message is deleted

[hazy saddle]

Damn

💀

Maybe check mobile?

[hazy saddle]

I think your discord is broken lmfao

Oh also welcome to hell

[haughty acorn]

oh lmao mobile worked

[hazy saddle]

There is quite a history to my kernel

[haughty acorn]

discord is broken moment

[hazy saddle]

So many fucking bugs in the early days

[haughty acorn]

ok i restarted discord and now it works on desktop too

[haughty acorn]

this is all kernels

[hazy saddle]

True

But I had like

Zero locks before

💀

Legit

None

[tender mantle]

don't need locks if you run everything on the bsp!

[hazy saddle]

This was without smp too

lol

[tender mantle]

well

okay

[hazy saddle]

Also me when syscall/sysret is broken but ONLY on amd systems

[tender mantle]

you still need to disable preemption and [insert way to disable deferred interrupt stuff]

[tender mantle]

:3

intel stupid

[haughty acorn]

ive a friend whose os project is running single-core without true user/supervisor separation and has working widgets and gui stuff and all that lol

[hazy saddle]

Also

My old kernel

No proper VFS

[tender mantle]

oh great 🥀

[hazy saddle]

💀

[tender mantle]

atleast it can play bad apple ig

and ran bash 😭

[hazy saddle]

And run doom

[haughty acorn]

theyre running on some weirdo architecture microcontroller that doesnt even have virtual memory lol

[tender mantle]

oh

could of started with that 😔

[haughty acorn]

fair lol

[hazy saddle]

Is this the rp2040 person?

[haughty acorn]

but its a full fledged desktop computer

[haughty acorn]

i dont think so? might be

[hazy saddle]

That is arm but there are some fancy boards

[haughty acorn]

the project has its own discord server and isnt in a thread here

[hazy saddle]

https://www.adafruit.com/product/6200

[haughty acorn]

ok apparently the project isnt on cpus that dont have vmem but is meant to run on like 16mb of ram total which makes vmem a bit harder and less useful

but yeah bottom line you dont actually need full synchronization or smp or whatever to make a functioning os, just to make a "normal" os lol

[hazy saddle]

https://git.sr.ht/~evalyn/EvalynOS

now you all must email patches

Idk how it works either

So we both balling 💀

[hazy saddle]

mailing list works

https://sr.ht/~evalyn/EvalynOS/

I now have a mailing list for my general projects

I don’t think this will need more

I can now add my other repos laterrr

And then maybe il add an issue tracker if anyone cares

I got kmail working with my email hosting

And I can send from the alias for source hut for these etc

Was a bit annoying but it works

And it like sends

[clear bison]

Mailing list ❌
Ignored list ✅

[floral kettle]

this is how you make sure that nobody contributes to the project

mailing lists are just so annoying to use when compared to pr's, for an example the fact that if you need to edit a patch you need to send a new revision sucks (or tracking messages that belong to one patch and reviewing stuff too)

[gentle quest]

Yeah

Stuff like patchew makes it more bareable tho

[coarse oasis]

from now on managarm patches must be submitted by uploading the git-format-patch output files on our discord

[wooden maple]

I only accept patches by physical mail.

send them to my PO box, I'll check it once every 6 months

I'll cut out the changed line and glue it into the right place into my paper code roll

[restive spire]

hello Elon how's that kitchen sink doing 😁

[hazy saddle]

The old thing is still up. I just also setup the repo there because I ended up paying for an account there
Tbf most people send patches files anyways so email is just an extra step 💀 (not like anyone is even sending them which is fine)

[hazy saddle]

I will just take in PRs from git and then push to where they are needed etc

I just wanted to have them as an option for old people

[hazy saddle]

i think now is the tine i should setup paging crap

its really easy

ive just been putting it off

[signal plaza]

I've been wondering why I had to go to EvalynOS-old to steal your virtual memory code

[hazy saddle]

my new paging code will be better

so wait a bit before robbing me

same for like everything

my rewrite is to like make things better

[signal plaza]

It's not stealing if it's open-source

[hazy saddle]

and support SMP and arch ports etc

[signal plaza]

I mostly use it as a way to understand what the docs I'm reading about something are trying to say

Although some stuff is 100% yoinked

[hazy saddle]

💀

did you follow the licence

the paging code is just a duplicated mess rn tho

so it would be easier to understand regardless

[signal plaza]

https://github.com/TheMowgliMan/Serpyntyne/blob/main/kernel/src/util/align.h

[hazy saddle]

as im gonna properly use tricks etc

no pragma onces

[signal plaza]

Yeah. Most yoinked stuff is yoinked in spirit but I rewrote it by hand (although I still give credit in particularly bad instances). Where I actually copy-pasted I included a copy of the license

[signal plaza]

I don't use those lol

[hazy saddle]

tbh for below 1mb allocs i think il use a bitmap

its like 4 uint64s worth of stuff

and if i use the CPU extentions and other things

its cheap af

[hazy saddle]

(256 pages)

@signal plaza when are you planning to do paging

because i can whip out the way improoved code later

[signal plaza]

I'm doing it right now

[hazy saddle]

il even make it arch genericable

ahh then just take it

but abstract the functions for the next level

[signal plaza]

I'm trying to do this one without stealing from anybody although ur still a reference for doing the hhdm lol

Also gotta rewrite my very stolen pmm

[hazy saddle]

HHDM is just take limine memory map and map it to phys + hhdm offset

i recreate the limine one

then i parse my kernels own elf file

to remap it

[signal plaza]

That's true

[signal plaza]

I noticed that you did that. I don't /really/ want to include parsing elf in the kernel, so if it's what it actually does I'm thinking of using the executable file feature to find the kernel and either remap it directly or copy it somewhere

Although I may just have to parse elf idk

[hazy saddle]

i just parse the elf for the permissions

so i can remap it

that way if my linker script changes its fine

[signal plaza]

I see

[hazy saddle]

and i dont need a ton of extra symbols

its alot easier and its very minimal elf parsage

[signal plaza]

Alright, I'll be keeping that in mind 🤔

[hazy saddle]

Opinions chat?

[floral kettle]

I'd make the perms itself a bitmask and separate cache mode from it but that's just a personal preference ig

[hazy saddle]

They are a bit mask so I can put them into the function but the giant switch case makes checking it more optimized i think? Because I don’t check all the individual bits and it can go down to the panic/assert when anything fails

So I could do PAGE_RW | PAGE_UC when calling the function elsewhere

[floral kettle]

the other option is to put symbols to the begin/end of the sections that have different protection and then use those to calculate the offset of the section from the phys base (e.g. &start_text - &kernel_start) and size (&end_text - &start_text)

[hazy saddle]

I found that to personally be a bit annoying at times but it does mean you can skip elf loading in the kernel albeit the stuff just for permissions for each section is like very minimal and just needs you to drop an elf header and iterate through it

[floral kettle]

well yeah you just have to iterate the phdrs (though you do still need to do the virt section addr to offset calculation too to be able to map it)

[hazy saddle]

me when paging works

I just need to make the HHDM also use 1gb/2mb pages

And it’s done

[gentle quest]

Do you have prints for gdt init?

[hazy saddle]

Ofc

But they scroll fast after the memmap

It’s tradition at this point

I’m gonna do loongarch64 paging later™ too

Should me mostly the same™.

Nah but I should probably get interrupts first there

well exceptions atleast*

[gentle quest]

[hazy saddle]

Don’t worry whenever I port wine (in 7 trillion years) il do an IDT init okay log

And every AP will print it too

[gentle quest]

U mean LDT?

[hazy saddle]

ahh yeah fuck

My goal rn is just to get to APs and scheduling to be stable

So once I start adding actual features

I don’t have stack corruption issue #7001 coming up every time

[gentle quest]

My goals are simpler

Like get tsc calibrated

[hazy saddle]

I’m just gonna steal my old kernels source code for that

Because I know that stuff is half decent after I clean it up

they worked

🗣️ 🔥

timw to test real hardware

Oh and implement ummap and the page table dig functions

[gentle quest]

Get some fred hardware

[hazy saddle]

I’m not that rich

When I get a job though I will

[gentle quest]

Nice

[hazy saddle]

I plan to build a new PC with a zen6 cpu

And make my old PC a server

[hazy saddle]

Since this is also a bit more exact on what it’s mapping

I can safely reuse HHDM for MMIO stuff

Since they aren’t part of the memory map I map

So shouldn’t have page size miss matches?

[hazy saddle]

Which I guess isn’t the best but it’s handy if I wanted to do certain things pre vmem

Also I need to do it like this to avoid random MCEs on old servers

Because of fucking corse

Its x86

@signal plaza for context

That’s all the elf parsing you need

Then you never need to manually edit your linker script and paging code

If you add more stuff

Etc

And you just drop in a header for the definitions

Oh and the alignment macros you stole

You may find it useful to add ones that are for usize and some for explicit sizes

If you do cross architecture stuff*

[signal plaza]

Oh yeah that looks really simple will probably just do that lol

[hazy saddle]

The elf header is also really basic

the reason its so simple is its already loaded

you just need to copy paste from where its loaded

and parse the elf for the permissions

https://git.evalyngoemer.com/evalynOS/evalynOS-old/src/branch/dev/kernel/src/elf/elf_structs.h

[signal plaza]

I plan to eventually, but that's a problem for Later Me™ because I gotta write a whole freaking python interpreter after vmm and smp scheduling 💀

Ahh I see

[hazy saddle]

Why don’t you want elf loading in the kernel anyways btw?

[signal plaza]

It smells like something that the Kernel Python is perfect for

My OS is basically going to be a little python interpreter and the necessary infrastructure to run it. So a python program can load the elf script and register the process, rather than the C kernel

[hazy saddle]

Ooooooo that’s neat

But yeah having a very minimal elf support for the self remapping is just cool and neat

[signal plaza]

Whether you want to consider that a priveleged user process or part of the Kernel is up to you lol

[hazy saddle]

And makes things simpler imo

[signal plaza]

Thanks!

[hazy saddle]

If it’s not running in ring3 it’s kernel code even if interpreted

Do you plan to add inline assembly extensions @signal plaza

So you can do like asm(“rdmsr whatever whatever”)

(You can skip a lot of encodings and only support the few you need)

[signal plaza]

Probably. Although most of the critical ASM stuff will probably be available as C functions in the Kernel, which I plan on being able to be used with import serpyntyne.kernel as kernel or similar

The big problem with inline ASM in python is going to be figuring out machine state when they're executed. Might have to create a clean CPU environment with blanked registers before execution in some restorable manner, like in a syscall or something. This is going to be complicated a lot if I also add any amount of JIT compilation

[hazy saddle]

You just need to calculate the size of the instruction. Put it into some memory and put a ret after it. Then call into the start of the instruction

Wouldn’t need to be fast JIT for the little inline assembly you need

More like a tiny assembler

[signal plaza]

Ahh! That makes a lot of sense. Don't know how I didn't think of that lol

[hazy saddle]

And if an inline assembly block is multiple instructions. You just chain them together like an assembler

It’s still not easy

But it’s not a full JIT compiler

[signal plaza]

I should probably make a thread for my OS rather than hijacking yours

[signal plaza]

Yeah

[hazy saddle]

Eh I’m giving you pointers based on my code

I don’t mind lol

[signal plaza]

That's what we were doing earlier, now we're just talking about my design for this os 💀 anyways I created a thread lol

[hazy saddle]

Nice

Il check it out later

I need to eat lunch and finish up this code

[hazy saddle]

????

[urban mulch]

frederich von x86-64 pog?

[hazy saddle]

no

the text

its corrupted

some how

[urban mulch]

oof

what should have happened instead? I just see a random number

[hazy saddle]

the caps

and double printing

[urban mulch]

I would imagine this is actually a race condition. Do you lock your logging?

[hazy saddle]

i dont have any scheduar

💀

[urban mulch]

Yeah but interrupts

[hazy saddle]

and at that point its at an infinite loop

[urban mulch]

What I think may be happening is:
Starts printing "got test vector 0xFA"
But is interrupted with "GOT VECTOR 0xfa VIA FRED!!!"

And the result is smooshed together

[hazy saddle]

thats not the control flow though?

FRED prints that before calling the function which prints the next line

wait

could it be the frame buffer being WC?

[urban mulch]

check your FB attrs ig

[hazy saddle]

let me try SIMICS

[urban mulch]

well

if anything SIMICS is gonna be accurate

[hazy saddle]

yeah

im using vibe coded QEMU patches rn

💀

[urban mulch]

lol

[hazy saddle]

i sure hope i uhh

dont have corruption issues

💀

thats simics

[urban mulch]

Check your FB attrs

[hazy saddle]

oh god UC is so fucking slow

[urban mulch]

AFAIK QEMU info mem should tell you

Framebuffers should be write-combining

[hazy saddle]

same behavior for some reason

with it set to WC

[urban mulch]

Double check what the emulator thinks it is

[hazy saddle]

#define X86_64_PTE_WC (X86_64_PTE_PCD | X86_64_PTE_PAT)
that reolves to this

which IIRC is correct for limine?

[urban mulch]

It's not about Limine, Limine is only telling you where the FB is

[hazy saddle]

it also defines the bits

that you need to set for WC

in the PAT

[urban mulch]

And you're using flanterm, yes?

[hazy saddle]

yes

and it is locked

[urban mulch]

Hmm

What were to happen if you just did logs in a loop

Like don't cause the FRED interrupt for now

[hazy saddle]

it happens with IDT too

[urban mulch]

Print two separate things and don't have interrupts

then we can see if it's the interrupt causing problems or not

[urban mulch]

well

[urban mulch]

There's your answer

[hazy saddle]

not my problem

[urban mulch]

Your FB is not mapped correctly

[hazy saddle]

oh crap

large pages dont support cache params

thats why

[urban mulch]

I don't know how x86 paging works so you may need to check the wiki but I wouldn't be surprised if you needed to poke in the CR for example

[urban mulch]

lmao ofc

why not

just another x86ism

[hazy saddle]

the bits are used for other things

[urban mulch]

then uh

disable hugepages

[neon karma]

you use other bits

[hazy saddle]

the same bit for cache

[urban mulch]

for this

[hazy saddle]

yes

[urban mulch]

IIRC the bit you set for PAT is one of the ones that goes unused as the lower 9 phys addr bits?

[neon karma]

that's not true

pat bit is 12 with larger pages

[hazy saddle]

its the same one that makes it a large page innit?

[neon karma]

instead of 7

[hazy saddle]

oh

💀

[urban mulch]

@hazy saddle yeah for hugepages the PAT bit is actually bit 12

well

at least now we know the problem

And uhh
Frederich von x86-64

[hazy saddle]

il just make it do 4kb pages for the FB

lol

[urban mulch]

why

[hazy saddle]

lazy

[urban mulch]

just check where to put the PAT bit

[urban mulch]

Translation: I will run into this same problem again later

[hazy saddle]

where else am i mapping lage WC/UC pages

other than FB

oh maybe large DMA shit

[urban mulch]

Oh I dunno, for other types of driver perhaps?

[hazy saddle]

that means i need to add a size hint here

[urban mulch]

you do

Shouldn't really be a problem though, the paging code should be responsible for this type of translation anyway

Though I find it... interesting... you use a switch case here

[hazy saddle]

it can goto default on failure?

easier ig

idfk

[urban mulch]

bur

this is not

how you should do this

cmon

you should know better than to completely hardcode flag conversions like this

[hazy saddle]

i know, i can check bits indivdually and add the flag etc

[urban mulch]

yes that's what you should do

[hazy saddle]

i can do this for large pages here

[urban mulch]

yem

[hazy saddle]

it still does it

wait

no im dum

wait???

wtf

[urban mulch]

physical_address.jpg

or rather

pmap_shenanigans.jpg

[hazy saddle]

my screenshot tool

is too fucking slow

there we go

oh wait

the PTE mask

is removing it

[urban mulch]

lmal

[hazy saddle]

im so dumb

[urban mulch]

um

you're not using the flags you made

you discard them and make them again

[hazy saddle]

i fixed that alr

[urban mulch]

show src

[hazy saddle]

between this

[urban mulch]

okay can you show info mem?

[hazy saddle]

no

i was making bit 12 off

with the PTE mask

i think

no

[urban mulch]

you're not anding it with flags tho

[hazy saddle]

i wasnt

[urban mulch]

please just show info mem from qemu

[hazy saddle]

info tlb but yeah

[urban mulch]

It says P but not whatever bit for uncached

[hazy saddle]

im doing WC?

wait no

the PS bit

isnt used for WC

?

[urban mulch]

PS bit == PAT bit for 4K pages in terms of position

[hazy saddle]

yes

[urban mulch]

PS bit is always 1 for hugepages

[hazy saddle]

why am i do dumb

and why wont it work

#define X86_64_PTE_WC (X86_64_PTE_PCD | X86_64_PTE_PAT)

[urban mulch]

Quoth the wiki:

You will need to modify the PAT if you want Write-Combining cache, which is very useful for framebuffers.

[hazy saddle]

limine does this for you

btw

[urban mulch]

Hmm maybe you want the PWT bit?

[hazy saddle]

wait is PAT not on TCG maybe?

by default*

[urban mulch]

what happens if you don't switch away from limine pmap

[hazy saddle]

same thing

i tested that

[urban mulch]

then it's not your pmap code that's the problem

[hazy saddle]

and same for 4kb pages only

its just whatever

idc

its fine ig

future me problem

[neon karma]

do you load your own pat

[hazy saddle]

i use limines

this is an issue for future me

im too tired

[hazy saddle]

though how should i guard against invalid combos

without making a mess

And the codegen is just a jump table verses a giant computation chain

[hazy saddle]

And this lists all valid cases and it’s not that bad

[hazy saddle]

fine i made it be normal

and me when i set bits wrong

💀

the FB is so much faster

and not doing that

well not on KVM

Okay so my idea for this

I won’t handle having a page be split into smaller ones to map and unmap etc

Or to deallocate PTEs when needed

Since there is so much virtual address space

Il reserve a chunk of it for 2mb pages

So when I need to use them I can still unmap and remap them nicely

And it won’t interfere with things

And I won’t use 1gb pages since I CBA to make a PMM that works well with them

https://klipy.com/gifs/shannon-sharpe-v1

You call it a skill issue

I call it a talk cheap send patches over email

[marble ridge]

you got this

i believe in you

[hazy saddle]

Aw :3

Thank you

Il add support later perhaps if it becomes a major issue though

Not like I can even allocate a 2mb page rn 💀

I’m gonna clean this up and push tomorrow I think

[hazy saddle]

It’s all working

And i have unmap (which calls map)

And get pte and get paddr

This should be
Complete enough™ paging code before I need to make one to simply clone and destroy a page table thing

Which thoes should be easy given I have the proper functions implemented

I think this is pretty decent

And there should be no bugs™.

This is still way better than old kernel

My old kernel did not map the frame buffer as WC

💀

My old kernel also didn’t support 5 level paging

Because I didn’t abstract shiitttt

But now I have some things abstracted properly

[hazy saddle]

https://git.sr.ht/~evalyn/EvalynOS/commit/3fb99da

That is a paging done!

Now I can either work on my slab allocator and vmem stuff

Or I can make my loongarch64 port not a stub fest

[wanton grove]

when you will do vfs

[hazy saddle]

i need to still make the slab the vmem get SMP working and get some scehduling and thread reaping and user programs

[hazy saddle]

@signal plaza how did your paging code go

Did you wana steal some of my new paging codes that’s somewhat decent and im proud of (but could use maybeeee a few tweaks to make it more uniform and extra checks but eh it will work way better than before atleast)

(I read your project thread just now about the stealing my code XD)

[signal plaza]

Fairly well. I got the page map function written but I gotta rework the pmm before I can go on bc it's abysmal

[hazy saddle]

Steal my PMM

You will need a bootstrap one anyways for a buddy allocator

My plan is to use the free list to bootstrap and start a new allocator up

But if that’s not compiled in

It will run the standard freelist

[hazy saddle]

Did you also make map and unmap and dig pte and resolve page functions

this also perhaps may be better as a macro @signal plaza

[round shoal]

how to join u

in fred

i use wsl cuz some random mf decided to spill water

[hazy saddle]

You can run SIMICS on windows

[signal plaza]

inline __attribute__((force_inline))

[hazy saddle]

or just

static inline

:p

[signal plaza]

I will after the pmm, the pmm I had is genuinely making me mad lol

[hazy saddle]

I’m just gonna use a freelist for normal memory

And a bitmap for the lower 1mb

Since it’s only for 1mb of ram in 4kb pages

That’s 4 64bit ints lol

[signal plaza]

Lol

[hazy saddle]

I don’t really need other allocation classes for the most part

[signal plaza]

The solution I've come up with is probably not the best but it's better than the old one

[hazy saddle]

What is it

[signal plaza]

#1493736428713152662 message

Like a bitmap of freelists lol

[hazy saddle]

Why bitmaps

😭

[signal plaza]

So that each freelist is short enough that sorting it is not prohibitively expensive

Not really a bitmap, it's an array, but it was more fun to say

[hazy saddle]

Just use a freelist so you can have O log n 🥀

[slate meadow]

not necessarily

[hazy saddle]

Initial paging tables and PFNdb.

[slate meadow]

sure, if you want a pfndb it's needed

[tender mantle]

wdym if you want a pfndb

[slate meadow]

if you want a virtually contigoous pfndb

[signal plaza]

It should be the same time complexity as a freelist, it's just short enough that I can sort when freeing so contiguous allocations can be faster

Taking more time in the backend to speed up the frontend

[hazy saddle]

I’ve done PFNdb without a bootstrap. It’s a fucking hacky mess and a pain in the ass and it’s slower than a virtually sparse pfndb.

[hazy saddle]

You don’t need to sort a buddy allocator

😭

[signal plaza]

This isn't a buddy allocator 🥀

[hazy saddle]

I know

But why are you just making a worse allocator

[signal plaza]

Oh 💀

[hazy saddle]

That you need to sort

[tender mantle]

this conversation is about as productive as claude getting stuck in a loop

[normal turret]

This reminds me, I need to rework my pfndb init code some

[slate meadow]

i know, way easier to setup a sparse map with one. e.g. looking up regions of phmem/page descriptors would also be an option though

[hazy saddle]

A free list should be very simple. If you need contiguous physical memeory just put on your big person pants and make a buddy allocator

[hazy saddle]

Sure whatever. It’s still a hacky solution when a bump allocator or freelist serves perfectly fine for this

[signal plaza]

Fair

[hazy saddle]

Now go make a buddy allocator

If you need contiguous physical memory for your design

A buddy allocator will work very well

[signal plaza]

Let me see if my idea is as as my old one first

Since I've already sunk a morning into it

[hazy saddle]

im perchance gonna take a break

and work on some riscv toolcain stuff

a dissaselmbler a macro/preprocessor thing and an assembler

and cleanup my emulator a little

[signal plaza]

Btw

Ur osdev calculator is down

[hazy saddle]

No it’s not

@signal plaza I have uptime alerts

I would have gotten a ping

And well what would ya know

It’s working

[signal plaza]

Hm

It's been down since 8:40 am for me

It's 3:40 now

[viral bison]

it's up for me too

what error you getting?

[hazy saddle]

sounds like a your internet issue

nothing i can do

[signal plaza]

I was doing an online class

My Internet is fine

[hazy saddle]

your internet can still be the problem ^^

you ever hear of routing issues

and ISP blocks

[signal plaza]

Huh

I'll check on my tower in a bit but it's working on my phone now. If brave randomly decided to eject webgl again I swear 😠

[hazy saddle]

gzip compressed archives are now supported in old evalynOS. the library is fully portable to other kernels but i need to do a little optimization and hardening on this with @tender mantle since we made it together

It will be ported to the new kernel once i get my heap up and working but its just a teensy single header to add and provide calloc and free for any size and printf for logs. will be releasing under public domain and 0BSD tomorrow

It really does shrink the size of the initramfs quite well

13.2mb to 4.9mb

Oh fuck I need to make documentation

Good thing it’s simple enough to use

[rancid viper]

https://github.com/elysium-os/fil

I done

😓

tho I need to do the crc32 still

wait this is not where I meant to fucking send this

[rancid viper]

based

[hazy saddle]

I just don’t do that rn

Maybe once Luna finishes the better error reporting

[rancid viper]

nah crc32 is thankfully dead simple

[hazy saddle]

Il add the crc32

Because then there is an actual error to give

Etc etc

[hazy saddle]

It’s cool

We both made a library

[rancid viper]

I mean I have like an error enum with 6 diff errors already lol

[hazy saddle]

Lmao

The one we made only needs calloc free and printf

[rancid viper]

nice nice

[hazy saddle]

And Luna is probally gonna switch to a bump allocator per block so it only needs one allocation

And then uses that as a temp heap etc

Which should make it a bit faster than it already is

Along with maybe optimizing the bit extraction thing

[rancid viper]

I was able to eliminate all platform dependencies

but I did end up

doing this

u can pass a function pointer for expanding the output buffer if u want

[hazy saddle]

Ahh

To be fair if your needing to unzip an initramfs

You probably have a working heap anyways

And you can implement 3 functions and create the macros to set them up

[rancid viper]

true, but I am planning to use this to unpack tartarus stage 2

[hazy saddle]

Or just use the standard header files for your kernel like I do

Exactly different goals

Could also probably allocate stuff on the stack too

Wouldn’t be that bad :x

But bump allocating it would make it basicslt the same

[rancid viper]

I think the only thing u guys allocate on the heap is the trees no?

[hazy saddle]

Yes and the output buffer

[rancid viper]

well output buffer presumably too

yeah

u can pack the trees like I did

well it basically becomes not a tree with how I do it

and its dead simple to then allocate on the stack

[hazy saddle]

Maybe Luna can look into that

Though a bump/arena allocator is good too

Should still keep cache locality fineish

[rancid viper]

🙂

I ended up getting the stack usage down to like around ~2k

after this it would really be just minmaxing

I had to implement an ar module for fabricate cuz I have never b4 made a static library with it lmao

💀

[hazy saddle]

Il do benchmarks (using my eyeballs) after changing to an arena allocator and then look into the stack stuff

Just to see if it’s worth going when we can do a cheap fix rn

[hazy saddle]

Lmfao

[rancid viper]

honestly performance wise or anything its probably not

mostly just if u wanna eliminate platform deps from the lib

im now debating whether I do Freestanding Format Library or work on chariot

lol

[hazy saddle]

I think calloc, free, printf is fine enough for me in terms of platform deps

Since it is doing decompression at the very least

You need some dynamic allocations for the output

[rancid viper]

well it depends

if you know the uncompressed filesize you dont

[hazy saddle]

I will do the arena allocator optimization tomorrow though

Myself this time and not be as useless

[rancid viper]

lol

[hazy saddle]

todo for tomorrow

• implement the arena allocator into kgz_arena.c
• make things take in the arena allocator structure to allocate from that
• only use one calloc call for things (32kb should be enough for all the tree crap, if it goes over and its not reset return errors)
• make sure the arena allocator returns zeroed memory
• make things check for nullptr on allocatons to bubble up the error properly
• make the huffman tree stucts properly use the prefix 💀

[soft snow]

I just uzed miniz and make a minimal wrapper for it (130 lines)

[hazy saddle]

yes but this is cooler

NIH

[soft snow]

it does shrink memory quite good though

yeaaa

dont ask

i hate python so much

it needs the source code in the repo source

its crazy

[hazy saddle]

arena allocator is up, it seems to be a little faster

still way less heavy on the heap

which is a plus

I also have added the proper null checking I believe

[hazy saddle]

i did a bit more optimizations

I think this should be good enough

I think whatever left is in huffman tree creation & parsing due to not using a more cache friendly / less pointer heavy format

And some stuff could maybe change arguments to make things less dumb?

[hazy saddle]

Got it being done twice as fast via making it prefill the bitstream buffer and using memcpy where possible in the lz77 stuff and other buffer ops

[hazy saddle]

All that’s left is Luna to finish the huffman tree optimizations and this should be very nice and good

And then maybe add better error handling etc

[neon karma]

afaik limine is adding back gzip decompression

[rancid viper]

why was it gone in the first place

[neon karma]

I don't remember

[soft snow]

when that releases ping me 🙏

i would be eager to throw out my shitty gzip code.

[hazy saddle]

Still not bad to support it myself

[hazy saddle]

I think my project is gonna stay here for the project history and the fact I use it for debugging and code review to catch a few things sometimes + sometimes generating small bits of code that i heavily refactor and make sure works

AI mostly generates fucking garbage though and I have no idea how people make an entire kernel with it 💀

[wanton grove]

old evalynos ?

[hazy saddle]

New one too, there is some AI usage but I still fucking sit down and write a bunch of the code because it’s fun

[wanton grove]

black magic

[soft snow]

A lot of prompting ig

it's crazy though

@quiet rose how

[gentle quest]

Yeah its good for code review, great at catching simple bugs in fact

I would never let it generate anything serious probably