#biscuit

1 messages ยท Page 1 of 1 (latest)

fair belfry
fair belfry
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this is my main problemnow

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PHDR is apparently in the lower half of memory when I try to load my "kernel" with limine and I have no idea how to change it

oblique musk
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using a linker script

deft mural
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also limine supports VGA textmode?

upper quarry
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Bro stole the MIT OS name

fair belfry
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i liked the name ok ๐Ÿ˜ญ

fair belfry
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i'm gonna update that soon

fair belfry
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UPDATE: got it compiling without any errors, but I haven't implemented framebuffers so there's no output for now

fair belfry
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I'm gonna implement rn

fair belfry
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rn I'm writing down GDT related info so I can implement it correctly

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ok starting on gdt implementation

fair belfry
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ok I was confused for a while but I have it I think

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i've made code to establish almost every GDT segment

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except .tss

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so the TSS section needs to be placed where the .tss location is defined in the linker script right

deft mural
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and your segment should be a pointer to it

oblique musk
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tss should be per-cpu so each kernel can have a different rsp0 and ist stacks

deft mural
fair belfry
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I'm going to set up the tss segment a bit later since its a bit more complicated so I'm going to start with IDT

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oh wait nvm

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to set up an IDT i need to have the tss set up so the gate descriptors can point to an offset in the tss

fair belfry
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ok I've implemented some assembly from the gdt tutorial for loading the GDT in so now I just need to check if it is actually loaded in

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can somebody check my code and see if I'm doing it right

fair belfry
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oh wait my brain is fried rn

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wait I'm confused on what the TSS is supposed to do because I'm in long mode and how to set it up to load in long mode

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after tss I can finally move on to IDT

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it shouldn't be that difficult to implement at all it's just that I can't quite understand how to set the tss up

deft mural
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gate descriptors can point to no ist

fair belfry
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oh

deft mural
# fair belfry oh
IST: A 3-bit value which is an offset into the Interrupt Stack Table, which is stored in the Task State Segment. If the bits are all set to zero, the Interrupt Stack Table is not used.

that is the only TSS requiring thing in the IDT

violet basalt
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also rsp0 is only relevant when switching from ring 3 -> 0 (userspace to kernelspace)

fair belfry
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ohh

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so tss isn't required for me rn

violet basalt
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you could just do other stuff right now yeah

fair belfry
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yeah I've set up every GDT segment and I'm probably going to start IDT now

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after I finish up the IDT what would u guys say i should do next

deft mural
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and paging

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the serial and a println!() implementation would also be helpful if you dont have that already

fair belfry
violet basalt
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#curated-resources message

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take a look at this

fair belfry
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starting on idt

fair belfry
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made almost no progress today ๐Ÿ˜Ž

fair belfry
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i made some progress today

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oops

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i mean yesterday

fair belfry
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ok I'm actually gonna make progress today

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I'm pushing away the IDT stuff until I get a println implementation

fallow fiber
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is biscuit a British operating system?

by using this operating system you consent to our use of biscuits.

fair belfry
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ok I actually started on the pixel drawing