#biscuit
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this is my main problemnow
PHDR is apparently in the lower half of memory when I try to load my "kernel" with limine and I have no idea how to change it
using a linker script
there are example linker scripts in here
also limine supports VGA textmode?
Bro stole the MIT OS name
pretty sure not so I'm gonna use framebuffers
i'm gonna update that soon
tysm
UPDATE: got it compiling without any errors, but I haven't implemented framebuffers so there's no output for now
I'm gonna implement rn
rn I'm writing down GDT related info so I can implement it correctly
ok starting on gdt implementation
ok I was confused for a while but I have it I think
i've made code to establish almost every GDT segment
except .tss
so the TSS section needs to be placed where the .tss location is defined in the linker script right
huh you can place it anywhere, depends on your implementation ig, I don't use any special sections you just want a global variable (static) storing a TSS structure
and your segment should be a pointer to it
tss should be per-cpu so each kernel can have a different rsp0 and ist stacks
yeah but they also need a per CPU GDT for that and they currently didnt design it that way
ohh ok
I'm going to set up the tss segment a bit later since its a bit more complicated so I'm going to start with IDT
oh wait nvm
to set up an IDT i need to have the tss set up so the gate descriptors can point to an offset in the tss
ok I've implemented some assembly from the gdt tutorial for loading the GDT in so now I just need to check if it is actually loaded in
can somebody check my code and see if I'm doing it right
oh wait my brain is fried rn
wait I'm confused on what the TSS is supposed to do because I'm in long mode and how to set it up to load in long mode
after tss I can finally move on to IDT
it shouldn't be that difficult to implement at all it's just that I can't quite understand how to set the tss up
no you don't need it for now
gate descriptors can point to no ist
oh
IST: A 3-bit value which is an offset into the Interrupt Stack Table, which is stored in the Task State Segment. If the bits are all set to zero, the Interrupt Stack Table is not used.
that is the only TSS requiring thing in the IDT
also rsp0 is only relevant when switching from ring 3 -> 0 (userspace to kernelspace)
you could just do other stuff right now yeah
yeah I've set up every GDT segment and I'm probably going to start IDT now
after I finish up the IDT what would u guys say i should do next
a PMM
and paging
the serial and a println!() implementation would also be helpful if you dont have that already
yeah I was thinking about that
starting on idt
made almost no progress today ๐
ok I'm actually gonna make progress today
I'm pushing away the IDT stuff until I get a println implementation
is biscuit a British operating system?
by using this operating system you consent to our use of biscuits.
lmao
ok I actually started on the pixel drawing