#MINTIA (not vibecoded)
1 messages · Page 30 of 1
don't tell them they had a mach guy on the NT team
in general in operating systems now to talk about "not unix-like systems" is like talking about "no newton physics"
and, less appreciated but just as true, unix is laced with VMS-isms
the academic discourse in the 80s was constantly comparing the two in deep technical terms and the feature exchange went both ways in ways that are not often appreciated now
there is probably some out there but he so influenced the field that almost anything today is constituted out of his blood and organs
some day i would like to enumerate some of these influences and write a little about it
and when we go to their common ancestor in MULTICS there is even more to say
apparently, that "vibe" quote i posted had the handle lookup bullet point right beside it:
- This centralization of system components in the kernel has proven to be harmful due to the dispatcher lock before Windows 7 and apparently handle lookup cost
its funny because NT had significantly finer grained locks than most contemporary unixes
of which many were dealing with BKLs
also, in the following section:
- On the designers behind Micah (not to be confused with DEC Mica, another operating system Dave Cutler led the development of), Microsoft's codename for the OS/2 personality of Windows NT: "A lot of people that were on the design team had almost zero experience with actually building an operating system" ― Dave Cutler
wtf
their quote of dave actually refers to DEC MICA, btw
nonsense lol
the dispatcher lock was really just a big scheduling lock which disappeared frankly right in time
literally my first reaction, lol
also it had been dramatically shrunk around the year 2000 already
2009 was right around the time all the open source operating systems were vying to get rid of big locks
when the dispatcher lock was removed it mostly covered like blocking and object waits and object signaling
scheduling had been reduced to per-cpu queues around win2k already
how did that goober get the impression that theres some other "micah" thing that refers to the os/2 subsystem
its funny how this is a parallel to ozix being described as "mica's ultrix subsystem" in various places
I DON'T KNOW, LOL
i was genuinely confused when i first read it
i watched the interview several times, and cutler never refers to some OS/2 subsystem codenamed "micah"
micah sitting at the table with mica, nt, vms, and ozix
i honestly think they must've took dave's pronunciation of "MICA" as if he was talking about something else
i'm bad at spelling, jfc, lol
LMAO
i almost wanna file an issue regarding this, but they've yet to respond to the one issue i've already opened
it's about how they said somewhere that "MS split the BASE.DLL into KERNEL32.DLL and NTDLL.DLL upon release" or whatever
which
no
i really don't know how they think that when:
that would be impressive considering ntdll.dll existed in mica
and not only there but in VMS too
it was called mica$fm_share and starlet.olb respectively (starlet being VMS's codename, and the meaning of fm_share is unknown even to dave cutler who said he forgot when asked)
ntdll's original name in the NT workbook was udll.dll and it was spec'd in like 1989
you might also notice there's a LDRDLL.DLL, which was apparently for the OS/2 subsystem, from what i can tell
i had to make a note on my issue report so they don't end up getting any wrong ideas: https://github.com/ElliotKillick/operating-system-design-review/issues/2#issuecomment-3693743978
really, the "split" thing was kinda backwards from what they actually did anyway
the base and console win32 APIs were merged into KERNEL32.DLL, iirc
and NTDLL.DLL doesn't consist of "public" or "private Windows APIs," unless they were referring to NT APIs, i guess
so it has nothing to do with win32 anyway other than that they were implemented on top of the NT APIs
this guy is such a fucking hack
The deadly NtTerminateProcess was first added beginning in Windows NT 3.1 seemingly as an incredibly poor and hasty but deliberate hack posing as a valid design choice.
how is that different from sigkill
jfc
they might've meant NtTerminateThread() somehow?
the main document has a huge rant about its win32 equivalent, TerminateThread()
oh, god, i remember now
this guy hates how NtTerminateProcess(NULL, Status) terminates every other thread in the calling process
that's the "deliberate hack posing as a valid design choice," apparently
because the very first thing RtlExitUserProcess() does is do that
what if you pass the flag and the inner implementation just gets the heap from the PEB anyway???
smss.exe typically has only one DLL loaded (i.e., ntdll.dll), btw
it doesn't rely on much
yet it's there along with four other processes which apparently have "plethora of highly interconnected DLLs" loaded
here's my favorite part:
Microsoft's reasoning behind the return type of
LoadLibrarystems from the 16-bit Windows API (going back to Windows 1.0 when the function was introduced), where libraries became conflated with data files or memory-mapped files meaning "libraries" could exist for the sole purpose of containing data with no code. In the first release of Windows NT (i.e. Windows NT 3.1), Microsoft carried forward this unique mistake while also adding an extension for specifying that a "library" must load only as a memory-mapped file and how to open this file.
https://github.com/ElliotKillick/operating-system-design-review/blob/4459d385d6de333fce3f7b617708a3849f3e908f/README.md#loadlibrary-vs-dlopen-return-type
here's the part of ruediger asche's article that claim was based on:
- A virtual address in the address space of a process.
The concept that makes this implementation possible is the memory-mapped file (or section object). Whereas Windows 3.1 needs to copy data from an executable file into main memory to build code segments or load resources, Windows NT only needs to create a memory-mapped file object that is backed by the executable file instead of the system pagefile.
does he not understand how demand paging an executable works
no
i think he just read up to "load resources" and his brain immediately shut down
plus, none of this has to do with why LoadLibrary() returns a pointer to the module's image in memory instead of its data table entry anyway
after all, it returns an HMODULE, an opaque type, not a PIMAGE_DOS_HEADER
i'm guessing they were conflating all this stuff with LoadLibraryEx()'s LOAD_LIBRARY_AS_DATAFILE flag because they directly link to raymond's blog which talks about it
for the record, technically, in win3.x, LoadLibrary() returned an HINSTANCE
Given any amount of forethought, it is reasonable to expect that Windows' focus on dynamic loading of executable modules—unlike the prevalent static linking of the time—would have ensured a solid design for its core library loading API. Especially since Multics had already pioneered the idea of dynamic linking, used memory-mapped files to share data, and supported dynamic loading years before Microsoft was even founded.
🙃
Indeed, the module handle implementation quirk in the library loader exemplifies an avoidable misstep—one that, like most Windows API oversights, exists as an outcome of Microsoft's expedient development style when creating their core technologies.
oh my god, they spent the first few years of development writing a design workbook
"expedient" is not the word one should use to describe NT's initial development
technically they spent the first like 5 years of development writing a design handbook if you count the entirety of mica as a design exercise for NT
btw have you seen mica's complete original design handbook
its much more thorough than NT's
probably because by NT time period they didnt want to rewrite all at
These folders contain naming conventions, development plans, and working design documents for Mica, including an early draft where Mica is called P.TBD. Mica was a PRISM operating system.
asset 3 is a late stage "chapter overviews" book
asset 4 is the complete design book from 1986
when it was called P.VMS
apparently, safari on iOS did not like that page
Macintosh: First appeared in System 7 (1991) using the Motorola 68k architecture (Apple only shipped Macintosh with their own hardware and not move to Intel 386 until 2006). While Macintosh is a Unix-like OS, Apple developed their own proprietary GUI solution for their operating system.
what
did they skip a bajillion sources regarding apple's OS history
system 7 wasn't the first version, and OS X is being conflated with… classic macintosh?
There were many operating systems written for the Virtual Address eXtension (VAX) instruction set architecture (ISA). These include the original OpenVMS OS (1977) which was not Unix-like and later some Unix-like OSs. VAX was ahead of its time, featuring full 32-bit protected mode support. However, factors such as being closely tied to the non-portable OpenVMS OS, strategic missteps of Digital Equipment Corporation (DEC) like being late to microcomputers with the MicroVAX I releasing in late 1984, the high expense of VAX systems, and competition from other architectures ultimately led to VAX not catching on.
it was originally just called VMS
where is that from
VAX not catching on
bruh
it caught on
big time
MAJOR cash cow
christ
this guy sucks
i hate it when fucking idiots have no idea what theyre talking about and besmirch some cool topic by insisting upon commenting on it even though they dont actually respect it enough to get it right
they're a security researcher, apparently
evidently, they don't understand even the OSes they like enough for that to matter
this one is probably the worst i've read by far: https://github.com/ElliotKillick/operating-system-design-review/blob/4459d385d6de333fce3f7b617708a3849f3e908f/data/windows/the-rise-of-microsoft.md
wait, did they move some stuff around
oh my god, so here's the part that was removed in later revisions: https://github.com/ElliotKillick/operating-system-design-review/blob/c3193467616797ead839cb34e2f43d68473639d2/README.md#an-alternate-reality
and here's a fragment of that part:
This strategy would have been highly feasible seeing as Apple followed a similar timeline starting with Apple DOS, switching to A/UX (based on AT&T Unix), and later switched again to create MacOS based on NeXTSTEP (they purchased this system by acquiring NeXT), which was itself was based on the permissively licesned 4.3BSD Unix.
APPLE DOS??????
why did we skip over the classic mac??????
also, A/UX was a product separate from the classic mac OS that ultimately didn't go anywhere
i'm not really sure why it was brought up as if they made it the basis for their flagship OS
should i call the linux subsystem "mintix"
mintia subsystem for linux
minux
sounds too much like minix
limnux
if you didnt do the renaming this would make so much sense
The large quantity of memory mapped regions in the form of libraries can decrease memory efficiency thus leading to higher turnover in the memory pager and an increased page fault rate. Page faults force the operating system to swap memory from disk I/O thus resulting in excessive storage reads and writes, slowing down performance.
this guy doesnt know that cache exists
actually i feel like he thinks that literally every single page fault will cause disk io
I tried to make the handle table lock free in Managarm but it was a perf regression due to too many objects getting queued for RCU cleanup
Our RCU implementation (particularly the cleanup queue) is not perfect so some perf can probably still be gained but I'd expect it to only be faster in scenarios with a lot of parallelism
some day you will forget about the renaming of limnstation to xrstatino like the rest of the world
the fact NT has done well enough with just a per-process handle table pushlock up til now has motivated me to probably just do the same
prob is for the best to unlock that lock as much as possible though
for example, if it is a multi level table and a table segment needs to be allocated, the lock should probably be unlocked across the allocation and then retaken and then check to see if that segment still needs to be added to the radix tree
so its only held very briefly across lookups
and never while calling into another subsystem
1/5 never forget
i have not been entirely happy with the choice of "xr" but i havent come up with anything better either
limnstation def had to go that was a dumb name
or at least it was a fine name for a project of a different vibe
it was fine when the aesthetic was like quirky sparcstation/sgi type thing and not the COLD HARD STEEL and RIGOROUS ARCHITECTURE of like a DEC box
which is more what it is now
^limnstation vibe
^xrstation vibe
they r different.
unfortunately for old limnstation's vibe, DEC happens to have like 10k+ pages of internal corporate correspondence and documents publicly available today
it was inevitable that it would win all of my mindshare
on windows its one lock?
per process for the entire table
well i was simplifying a bit
or for each entry
the structure seems to have multiple pushlocks but for the handle table structure there seems to be like 1 lock
presumably taken shared during lookups
it turns out that the lookup functions don't take per-table this lock
how do they worm
I don't know
but I can see that handle lookup in the table is lock free up to the point of obtaining the entry, the entry itself has an embedded exclusive bit lock
if the bit is already clear the thread waits through the handle table's HandleContentionEvent
for HandleContentionEvent it uses some kind of futex-like pushlock that I'm not familiar with
it cant be COMPLETELY lock free with no synchronization at all
how does it obtain an entry from the table
This might be a place where epoch based mechanisms like in freebsd shine, in particular they can avoid having a huge chain of pending callbacks
Which has been shown to be more memory efficient and faster in some cases
should install ghidra and check how its done
this feels like it pollutes the kernel with a posixism/unixism for no particular reason. i would add a fd to handle table personally
thats not a particular reason
also what if you wanna have a handle to a timer for example
as part of an implementation of a linuxoid object like timerfd
the one that seems most appropriate based on the name is ExpLookupHandleTableEntry
i can confirm it doesnt take the HandleTableLock
longlong ExpLookupHandleTableEntry(uint *param_1,ulonglong param_2)
{
ulonglong uVar1;
ulonglong uVar2;
uVar2 = param_2 & 0xfffffffffffffffc;
if (*param_1 <= uVar2) {
return 0;
}
uVar1 = *(ulonglong *)(param_1 + 2);
if (((uint)uVar1 & 3) == 1) {
return *(longlong *)((uVar1 - 1) + (param_2 >> 10) * 8) +
(ulonglong)((uint)uVar2 & 0x3ff) * 4;
}
if ((uVar1 & 3) == 0) {
return uVar1 + uVar2 * 4;
}
return *(longlong *)
(*(longlong *)((uVar1 - 2) + (param_2 >> 0x13) * 8) +
(ulonglong)((uint)(param_2 >> 10) & 0x1ff) * 8) + (ulonglong)((uint)uVar2 & 0x3ff) * 4;
}
though its not as if i understood it
how does this impede that
That push lock is used for table expansion in exclusive mode
is the handle table just never shrunk
if you never garbage collect segments of the handle radix tree and only destroy it when the process goes away, then i can see how you could look it up locklessly and only take a lock when expanding (and do all this w/o RCU or equivalent)
sounds dangerous though
IIRC yes
Handle table levels are allocated on demand, then linked into the table, and then retained until the whole handle table is destroyed
Closing handles only returns entries to one of the free lists
i mean
its fine if theres a reasonable handle limit i guess
especially since the handle table is in paged pool
whats the limit btw?
thats my point the limit isnt really reasonable
its like 16 million
so a process could waste like 128 MB
also handle table space is charged to process quota
single address space microkernel
SaaS-OS experiment
pronouncing itanium as if it were a latin word just to feel alive
ee tah nee oom
ITANIVM
he stole your idea
of protection keys
you're just jealous
i think this post was written using an LLM to generate a draft and then they like rewrote it in their own voice
but the LLM style prose remains
its funny how thats a thing people do sometimes and it remains kind of obvious that they did that
unironically i think that is a really cool research space tho
What I mean by restricted AI workflow: I’m using Codex/Claude/DeepSeek as bounded agents that get tiny missions like “prove keyboard window controls” or “fix topbar restore regression,” then build, boot, grep serial logs, and stop if the change would cross kernel/ABI boundaries. So, not vibe coded, but definitely a major help speeding up proofing and debugging. What I've found most useful is feeding my logs into NotebookLM and making little podcasts about the project along the
maybe in the future we'll have microkernels-ish all in ring 0
precisely what is a PDX message layer
object/graph-style file organization
you also have to ask exactly what is meant by "graph-style file organisation"
can you imagine two files that are cyclical? far be from me such a thought
well a tree is a graph 
we are missing a trick
how much cooler might things sound if we name them by superordinate terms?
the youtube channel doesn't inspire confidence
i clicked on one, and it's narrated by an ai voice too
let's hope the hypnotist isn't zack polanski or else we will soon be seeing the worst rule 34 ever heard of
lmao
Korona by Boards of Canada from the Mask100 Sampler. Video is an excerpt from the film "Decasia" by Bill Morrison.
managarm mention
https://youtu.be/o_WWLcEXY4o?t=158 it's just notebook lm meanderings with ai generated visuals, like here it goes "address device command using type 8, actually, scratch that, type 8 on the transfer ring is a transfer no-op, [...], the command ring requires type 11 for the address device command"
hey does anyone know why korona is named korona
but thats a bit unrealistic because typically one doesnt exceed a few hundred thousand handles globally on the system
probably most processes have only 1st level of allocation
More like 256
the weird pseudo- discord-train-of-thought prose thats popular in like SF tech culture will never stop enraging me
JUST WRITE NORMALLY
STOP DOING THIS
its like the 500th abstracted layer of larp
advanced larpatronics
theyre imitating the form of a series of messages sent on an IM platform to seem more casual or more cracked or more authentic or something
its weird
its so so weird and theyve all been doing this for years
its like a bunch of robots
all falling in line
i love how the example code here also is just broken
spawning a thread and passing a pointer to a local that soon goes out of scope
literally nothing in the post is even correct
imo this writing only works if you were an eyewitness and are recalling events rather than just retelling
if i were a larpmaxxer id have written the entire xr17032 architecture manual like that
when the processor is reset
the rs control register is set to zero
forcing it to kernel mode
imagine that for like 200 pages
thats how infuriating this style of non-instant-messaging posting is to me
writing an allocator is a standard project during a cs major here
it has to be a decent one too like it has to pass their benchmarks for fragmentation and performance
cant just do a k&r free list allocator or not merge blocks
that does not pass the benchmarks
why are people always acting like theres a large class of people who both write C and also think malloc() is black magic and have no idea how it could possibly work
im sure such people exist but i dont think its very many
confucius say
1 select
10,000 problem
not sure what to reply to this but anyways
another idea could be that you just implement the linux fd table in the linux subsystem driver or whatever you use
if you plan on implementing it in kernel space
as opposed to a process' normal handle table
Someone just posted this in #resources.
You'd be surprised.
Why are you talking like roboner.
lukflug is 5 punctuation marks and a sprinkle of annoyingness away from roboner at all times
😭
wdym? 😭
wow, I didn't know I was that annoying
They're referring to yeint
ik
top 5 osdev discord moment
A discord theme so bad it is a crime
Stop using light mode || ||
cyborg boner
Curious, i thought using light mode was what annoying people did!
im annoying and proud
i hate this tbh
LOLZ HES USING LIGHTMODE HAHAHAHAHAHAHAHAHAHA IS HE STUPID
like
shut the fuck up john funny
Discord's light mode genuinely blinds me and is unbearable for my eyes
I can cope with light mode of other apps but not Discord's
there are like 20 different light modes
and im not using the 0xFFFFFF one
need to add actual machine types because right now it doesn't have any firmware rom (which can't be added from cmdline like cpus can) but in theory the cpu side of things should work
Weird, i just see 3 free themes + the "change according to system" one
All the other ones are paywalled
oh wow are you going to add all my fake devices also
probably
Nice
this is mostly meant to be a more debuggable alternative to xremu
Does it have tcg accel?
like xremu emulates caches and everything but this has actual gdbstub and watchpoints and everything
yeah
How hard was it to get that working?
not that hard
i copied the loongarch sources (since that's a risc arch with software tlb), removed everything that didn't apply to xr17032, changed some of the exception logic, and voila
Lol
holy
also one thing this will allow me to do is have an xr17032 VM with PCI and VirtIO devices
mintia xhci driver when
finally acpi on xr
I'd need to port edk2 first probably
and I guess after that and acpi the next step would be porting NT (obviously)
toolchain would be the hardest part
if you're fine with looking at the leaked nt source it's technically possible but it was mostly a joke
more realistic would be a VM (within a VM) running one of the existing risc ports of NT
they made the RISC toolchains by like
taking the microsoft C frontend
and writing translators from Microsoft IR to the IR used by the vendor's toolchain
(so the mipsco compiler for mips, GEM for DEC Alpha, IBM's thing for PowerPC)
and then feeding that into the vendor backend
its probably possible with some reverse engineering to separate out the microsoft C frontend parts from one of the RISC compilers and patch it to emit the IR to a file or something and then do the same
they might even already be separate executables that already do that, i dont remember
it would be an insanely meticulous and annoying project though
brain surgery on a compiler
ok so hear me out, so xr17032 has separate itlb and dtlb right? you could theoretically have an i386 interpreter in the itlb and use that to run x86 windows from the dtlb
the interpreter could be fairly light weight by having the dtlb miss handler directly interpret x86 ptes
then it's just a matter of providing drivers
i think MIPS NT is the easiest one to emulate
in terms of the underlying architecture being the simplest
and yeah youre right you could write a dtlb miss handler to walk x86 page tables
it would be quite obnoxious though
you could make the itlb identity map and turn off the mmu whenever you need to access interpreter data
the way its designed the preferred scheme is like 3 instructions long, doing anything else requires insanely annoying code because the zero register no longer reads zero
aisix has an example of a non-preferred scheme because it is weird and the kernel runs from the physical address space and explicitly walks the page table
damn it now I want to try making this
I have a problem with wanting to try anything that's theoretically feasible
aisix dtlb miss handler
it uses a global area to save some regs which works bc its uniprocessor
youd need to make smarter use of the scratch CRs instead if you wanted to do it on SMP
doesn't that also use some non-architectural xremu feature to alter tlb miss behavior?
i remember seeing something like that in the xremu source
theres a bit that causes paging to be disabled upon exceptions
which is how it used to always work in the like <=2020 architecture which is what aisix was written for
when it was changed i added that bit to be able to keep running it without having to like port it to the new scheme
it would not really be hard for that bit to be architectural
but no the tlb miss handler there by itself doesnt use any non-architectural emulator features
aside from the fact it is automatically running in the phys addr space
what i should have done is have two mmu enable bits, one for the immu and another for the dmmu
then you could run with the dmmu enabled and the immu off
alas it doesnt work that way and the 1 bit enables or disables them both
u know what would have been a cool feature is
split immu/dmmu enable bits
and split immu/dmmu disable bits which get xor'd into the former upon exceptions
i rectified my sins in the virtual memory design i did for the aphelion folks
paging is both enabled and disabled depending on the uppermost 2 address bits (out of 64)
rather than mode bits
what prevents user mode from jumping to an unpaged address
i see
i got it from itanium i think
except on itanium i think that field is an index into an array of like region descriptors
and you can configure their base and bounds and cacheability and whatever with great detail
which is evil
and overcomplicated.
im looking forward to porting mintia2 to aphelion i think it will be great fun
the compiler infrastructure theyre doing is using jackal and xr17032 as the first test frontend and backend
they have a smart compiler guy and his compiler is shaping up to be like 200x fancier than mine
i think hes writing it first in rust and later itll be rewritten in their own lang mars once it has a mars frontend and can compile itself
and probably if completed itll end up being the official compiler infrastructure for xrstation too
bc its way better and will be able to do the same stuff
and still be self-hosting
so ill probably discard my compiler at that point
thats his jackal frontend coyote
it can fully parse and irgen my jackal parser which is like 5k lines
and use like 1/3 as much memory doing it
turns out it in C not rust
the way they do IR gen made me realize I'm a dumbass
and actually gives me the urge to continue my compiler project
is there an xr17032 emulator test case anywhere that doesn't rely on particular hardware being installed in said emulator
because i'd really like to test the cpu part of all this before doing the devices part
i did a very thorough one that would run out of the rom and didnt do any IO aside from simple fetches and would only use instructions that had already been tested and would indicate progress by setting values in registers which you could inspect
in 2018
2018
yeah but like what repository
i assumed you knew that the architecture was entirely different in 2018 and that the only reason i mentioned that was as a self deprecating joke that i havent done any tests since then
oh
i believe you might need a "time and relative dimensions in space"
was that before the cisc-to-risc convertion that i seem to remember being mentioned at one point
yeah
but even the first risc architecture was completely different
so this test was for like 2 diff architectures before xr17032
i saw some code in xremu that was like
specific quirks
to make aisix work
because it wasnt compatible anymore
it had to be ported
to a totally new risc isa
in like early 2021
the new one no longer disabled paging upon exceptions
which was the 1 thing that needed a compatibility bit
this was the low level diagnostic rom which tested all the cpu functionality, there was also a high level diagnostic rom which would test all the devices
would be cool to make a modern version of this
jesus thats some ARCHAIC dragonfruit
looking thru old stuff now and i just found a heap dump from the aisix kernel debuggr
i forgot it would remember the routine that allocated it
and could look it up
my debugging tools have gotten lower effort with time
why do you think that is
i dont write as many bugs to start with and the ones i do write are no longer particularly challenging
so i havent like had occasion to improve the tools as often as i did back then
a project like this is really a trial by fire wrt debugging skills
there are so many NIH'd layers that the problem could be in
you learn how to narrow it down extremely quickly
like if i run into a confusing bug that 'makes no sense' and its a compiler bug, i almost immediately clock that its a compiler bug now just based on vibes lol
which has helped me outside of my toolchain as well
i ran into a clang bug while doing my emulator and i realized it was a clang bug very quickly and confirmed by examining the outputted assembly
it was a bug that had been fixed in a newer version of clang so i just updated
what kinda bug was it
only took me like 15 min to fix it
i also saw this
me in 2019 would have had the entire emulator project derailed
Silent clang bugs are pretty rare
you wrote like "use a newish clang version or this wont wokr"
i really dont think id ever have found it if it were 2019 me
the confusing behavior would have stumped me
it would have taken me ages to guess it was a compiler bug
2025 me found it in 15 min
i was using a calling convention they recently implemented which is designed for functions that tail call one another in a long chain
as i was doing in my cached interpreter
that call conv had a bug
was it musttail
i use macos
i was using my intel mac
which i will continue to use until its hard drive dies
due to being broke
hdd
ok good luck
a 12 year old hdd
i literally never had an hdd die on me before
the current hdds i have are probably older than me
ive had several die on me
i mean
this is the longest one has ever lasted by about 2x
ive been keeping backups w/ time machine because im very certain that any day now i will try to use this imac and it will just be frozen solid on IO
from a broken hdd
i once bent an hdd's internal disk too much and it literally did break and die on me
it also spread like metal dust everywhere
they dont really "bend" until they suddenly shatter
so yea dont play with those if you ever take one out
my mac mini i had from like 2017-2020 died a very tragic early death when the hdd died after less than 3 yrs
i had no backups
do macs just come with defective hdds
i started using a 2014 imac my dad had recently retired, as a "stopgap" until i could get a new computer or replace the hdd in that mac mini and its been another 6 years and im still using it lmfao
maining a 12 year old intel imac like a boss.
i may soon upgrade to a 2019 intel imac that he has sitting in his garage, which is the one that he replaced this one with, and has now itself been replaced
i would make a joke but i upgraded my system to non-dinosaur-era specs like last year
Meanwhile if stuff compiles a little too slow for my taste I immediately wanna upgrade
If only I weren't broke
wdym by too slow
im used to waiting like
10 mins
for aur packages
i dont think anybody ever said "man I like waiting for compilation so much, I wish gcc was slower!"
It's stupid since my PC is pretty fast and Gentoo works well on it
i remember working on managarm on my trusty i5-3210m laptop with 4gb of ram and a 5400 rpm hdd a few years ago 
Idk it's probably just me complaining because zig compile times are awful
I ran Gentoo on an i3-3300m 💀
i booted the gentoo liveiso once on it but decided not to continue iirc :^)
my current pc randomly dies to machine checks once in a while
i think it's either the ram or the gpu
i think i will do this today
It took like 18 hours for Gentoo to initially install on it
ive stretched this 2014 imac as far as it can do i believe
is it causing you any issues rn
2019 imac is still ancient but benchmarks literally 2-3x better on basically everything apparently
yes
youd probably consider the UX responsiveness im used to literally unusable
Imagine if will had a good computer... he would be too dangerous to be stopped
the only reason i appear to be on discord 24/7 and respond to messages fast is because i use bspwm and just do a gliss through the keyboard to all desktops every once in a while to see what theyre doing
i could probably work as a full time round robin scheduler employee
i wanted to save up for an arm imac but the gig work im currently doing for tuition money isnt a reliable enough income stream to really save
i spend it all on tuition payments
what are you doing
its very possible im not going to upgrade to an actually modern pc until i have a full time job after i graduate
freelance?
hes an aibro
arm mac mini could be good
Ah but then you'd need a screen
mhm
yeah and im way too used to 5k to give it up
i did the math and altogether the specs i want would only be like $50 cheaper as a mac mini setup i think
both were ~1200
i can help you install arch (if you do build a PC)
build an xr station
my 2020 m1 macbook air is so much better
i would main it as my desktop as well if it didnt have like 512gb ssd and a small screen
and i dont want to buy an external 5k monitor
Can't you use the iMac as an external display
if an xr17032 fpga is ever made you could use it as your daily driver since linux compiles on it
Or did they remove that
i dont want to do distro dev for xr17032
its my baby but i cant think of anything less interesting or more cancerous
ill daily drive mintia2 on amd64 or apple silicon in like 2040
well you could pull a terry davis (your favorite person) and do xr station dev on your literal xr station device
he developed templeos in templeos itself
no he didnt
yes he did though
doubt that
the source code format is unviewable outside of temple os
I doubt he daily drove it
no he had ubuntu
huh? thats not true
and templeos running in an emulator
you could technically read it but it can embed other resources etc. inside of itself
Well that's not the same as running xr station stuff on an xr station would be
and has a lot of subscript / superscript stuff
and he developed the os from inside the emulator
It's more like the NT guys dogfooding it and it sucked
i mean youre right but
in my book this counts
he didnt do the development outside of it
outside of the initial bootstrap process
idk I don't think you can make a comparison between "developing the OS on the literal hardware" vs "writing code in a text editor in an emulator"
development wise how is it any different if you simply fullscreen the emulator
didnt he use vmware
does that even have register dumps and shit
i only ever saw him use the built in debugger
apparently dave cutler was single handedly maintaining the full screen text mode os/2 subsystem for NT (the original dogfooding environment) for like a year after everybody else had switched to the gui because he wasnt used to programming in a gui format and didnt want to change
he was pressured into doing it for political reasons which was that it made the gui team feel unappreciated and demoralized
that he wouldnt try their work
a good debugger used to be regarded as essential to any kernel
and thus he switched from full screen text mode editors hed been using since 1969, to a gui code editor, for the first time
and never switched back
they faded away a bit because linus is opposed to debuggers
VMware is a commercial product
my hobby kernels have always had some kind of minimal internal debugger prompt just because it made debugging certain types of bugs way easier
I sure hope they do
ive never heard of that tbh
why does he think that
its a kernel module in mintia1 and mintia2 so that it doesnt take up any space if ur not doing kernel debugging
i feel like they're more moving towards supporting gdbstub vs having a bespoke debugger
the bootloader will load all the symbols and stuff for the modules in order to do its own dynamic linking of them and then they will be discarded later by the kernel if the debugger wasnt loaded
if it was loaded then the symbol data stays for use in tracebacks and stuff
maybe that's why linux doesn't allow AI generated code nowadays
it doesnt?
and maybe it's because torvalds thought c++98 was too complicated that linux doesn't support any more complicated languages like rust today
they do tho
no no, they are a paragon of consistency
i think linus just tends to like having unpopular opinions
it sometimes makes me feel like a larper that i literally never use proper debuggers
all of my debugging is like 90% staring at the code 10% printfs
i should probably write a kernel debugger but idk if it's that useful
however im one of the best debuggers i know probably
i get away with just printf debugging
so i might have just learned not to do it
one of the only things ill like shamelessly brag about is my debugging skills
monkuous vs hyenasky debugging competition
i think im a like 99.9999 percentile debugger after years of this project
im now capable of finding really scary complicated subtle bugs in like 20 minutes
that would have taken me days or months a few years ago
i often cant even explain my process either it usually just pops into my head somehow
my #1 skill for sure
at anything
...or they weren’t complicated enough 😁
perhaps
i feel like in a relatively complex kernel you're kinda bound to encounter pretty complex bugs
i use gdb once every 20 years to step through the code to see if the algorithm is actually working the way i read it
sometimes i can skim over an if statement with an incorrectly written condition and it messes up my view of the code flow
other than that, printf it is
one of the bugs i always mention that would 5 yrs ago certainly have taken me weeks to figure out or defeated me completely was
the fox32 build of mintia1 would randomly crash at random moments and only sometimes and it would change every time i built it
and it turned out to be that the fox32 emulator's pop instruction had a bug where if a page fault occurred while fetching a certain byte of the pop instruction, then the stack pointer could be double incremented
it was randomizing symptoms every time bc my toolchain at the time would lay out the code nondeterministically in the kernel binary (and every other binary) lol
so the pop instructions that straddled page boundaries would get moved around
and only sometimes do it
and this took me like maybe 40 min to figur eout
well mintia is one of the most sophisticated kernels here in the community so it would see more complex bugs than simpler projects
it would also only happen if the pop straddled a page boundary on a certain byte and the second page was a page of pageable kernel code that had been paged out
so it was extremely nondeterministic
.. how
the fact that it only happens on fox32 probably narrows it down a ton already
because then you know the issue is in the arch code
(or the emulator in this case)
it could be a compiler bug as well
there was another fox32 only bug which did take me several weeks to figure out
right
and it turned out to be a bug in my codegen in my compiler where i was really stupidly incrementing the stack pointer to reach more distant areas, forgetting that anything below it would become volatile and could be corrupted by exception handling
so if an exception came in at the wrong moment during one of these spots then a confusing crash would occur
is fox32 an x86 clone
that took me a few weeks to figure out and i only figured it out because i was reading ancient usenet posts from 1991 about the i860 cpu and somebody posted "the early i860 C compiler was extremely buggy. i worked on a project based on the i860 and we had the most confusing bug and after months it turned out that the compiler was sometimes generating code that under-allocated the stack frame, and it would then get corrupted by an exception"
and i suddenly realized i had the exact same bug
went and looked and fixed it
its kind of like a less crufty 386
with a less efficient instruction encoding
why does every person who wants to make a small isa just clone i386
a guy who posted on usenet like 30 years earlier told me the answer to my bug
there is nothing new under the sun
i dont think that was ry's intention or even necessarily that she knew much about the 386 in particular at the time
i think she was just trying to do more like a z80 but 32 bit (bc she had done a lot of projects with z80 stuff) and then added paging to it later
and that turned out to have 386 vibes
ah
i do still see people do this once in a while
like would it hurt not to have variable sized instructions and a stack machine in your isa
me when z80000
Described at the time as a "mainframe on a chip", the processor is in many ways an equivalent to Intel's 80386.
truly no original idea under the sun
my favorite thing ever was when i found an oral history interview with the entire 386 chip team
which was done by the chm recently
and they spent a lot of time talking about how inferior they felt for not working on a RISC project
and they mentioned that they talked to a major RISC guy about the 386 and he like ripped it to shreds and they were dejected because they knew he was right
he WAS right and their project eventually turned into risc anyways
CISC obviously sucks... ARM is RISC and therefore much more power efficient as apple has shown!!
or no they talked to a major risc guy about the 286
well the 286 did suck
modern microcode stuff is basically just risc right
and they like proudly told him about their segmented protection model and whatever and he said "Why aren't you just doing paging with a kernel mode and user mode?"
and it made them feel stupid
its more like, the distinction is useless nowadays
it's useless because they just got very good at optimizing it, no?
like, if i make a lua compiler that somehow makes it run as fast as optimized C code, would you say the distinction is useless
that interview was hilarious to read because of how many weird hipsters ive run into who are like "erm actually paging is ludicrously inefficient. segmentation was the right move. paging is bloat"
they had NO IDEA that even the 286 team thought it was STUPID before the chip even came out
and ALWAYS thought it was stupid
they felt it was a mistake that they tried putting a protected mode into the doomed 16 bit architecture at all instead of just waiting for the 386
if they were men of principal, they wouldve shelved the project and died on the spot
you don't have any debugger?
i dont have one with like runtime settable breakpoints and watchpoints and disassembly and stuff no
this is an instance of the classic phenomenon i've spoken about before
i have one i can break into with an explicit KeBreakpoint call or with an NMI triggerable by left-alt-tab from the emulator
which is a prompt over serial which lets me peek and poke
where cult technologies (or cult tv, or whatever) is extolled for its biggest flaws
and also has some other niceties like listing threads and doing traces
that's literally luajit
p sure in the industry they all have nice debuggers so have to work even harder
my debugger is slightly more capable than the original NT debugger
i had to use the april 1991 NT debugger while getting that R3000 build to run on MAME
genuinely crazy
i think bespoke debugger ability is inversely correlated with personal debugging skill
the NT guys didnt need much more than like
peek long
poke long
Maybe Linus was right
convert pc to symbol name
Debuggers are making you soft
dump registers
that was it
all they had
when they wrote basically the entire nt 3.1 kernel
which was more or less complete by 1991
sans bugfixes and some memory inefficient early structures that were changed to be less wasteful by rtm
"I'm a bastard" ~linus torvalds 2000
rtm?
release to manufacturing
ahh
It's certainly not that bad. Once, a bug in a pre-release CPU was found entirely without a debugger, just by looking at the code (a race condition during state saving).
markl also said at one point that on the i860 boards one of the things that made it a nightmare was that the debugger would randomly lock up after a couple commands and they literally never figured out why
a bug so difficult and arcane that it defeated the '89 NT team despite spending months on it they never figured it out before the entire i860 platform was dumped
no doubt something insane about the i860 chip
some errata
the way you describe it makes it sound like a cryptid
the i860 was the cryptid of 32 bit general purpose cpus
for 64 bit thats itanium
the NT team and intel's svr4 unix porting team were basically the QA group for the i860
they would share fixes back and forth for the like dozens of completely undocumented errata they each identified
nightmare chip
something i never understood is that like
at the beginning, there was no particular plan for an x86 port of NT
because the idea was it would ship with a new line of RISC PCs that would replace the x86 PC, so an x86 port would be a redundant waste of time because x86 already has OSes, Windows and OS/2 (which NT is meant to provide on RISC)
however, they did plan a MIPS port from the start, probably
so why didnt they just do initial NT development for the perfectly good, stable, well-developed, and battle-tested MIPS hardware that already existed (ie DECstation (barely existed yet, nvm) or one of the MIPSco boxes) and just plan to port it to i860 later?
why did they put themselves through hell with the shitty ass i860 simulator running on OS/2 and the early errata-filled dev boards
i believe this was actually just a straightforward mistake
also hello mysterious industry person that we will politely avoid guessing the identity or company of
its so awesome that sometimes we get ppl with default pfp and an unidentifiable name who just start dropping lore
why do you attract so many industry people here
they almost always exclusively chat in this thread too
New old people
its probly just bc this is where a lot of the chat about industry kernel innards and history happens
sometimes i feel sad that i feel 0 drive towards history
it's fun reading what you write but personally i have 0 interest in the timeline of events
i wouldnt go out of my way to research this stuff even if you held a gun to my head
i like it because it is people who did what i like to do and its very enlightening and inspirational
skimming wikipedia is good but its not going to give you a 50 page report from 1990 about the performance impact of introducing a bottom-up pt walk optimization to the TB miss handler in the Alpha PALcode
the bowels of the CHM does have that
unlabeled among like 5000 other pages
if you ever get tired of mintia, you should try game dev, it's also fun stuff
well on wikipedia you won't even find info on the more or less modern nt for example
even less on older stuff
will could probably revamp the NT page on wikipedia
and add 2 bijillion sources for it all
literally 0 good pages on nt
and some dumbass mod would probably undo it and ban him
this is very torturous btw
because the knowledge that there are fascinating gems in there leads me to scan with my eyes manually over like hundreds upon hundreds of pages of extremely boring like administrative documents and budget sheets and stuff
and then right in the middle "Positioning Alpha AXP as the new PC architecture: a business strategy proposal"
or "OpenVMS versus UNIX: a kernel technology comparison", both of these internal documents that pull no punches bc theres zero marketing incentive and its meant for a narrow internal consumption
makes it worth the neck aches and eye strain when i find smth like that
i have no idea how you even manage to do something that doesnt give you small bits of instant gratification
like
a big project like mintia
you have to do a lot of work
before you see its fruit
it's really hard for me to do that type of work for extended periods of time
i will inevitabley get extremely bored
thats like asking how someone can go on a date with a woman even though it wont give them within 15 minutes a bunch of grown children to stand around their deathbed
the JOURNEY is the point.
theres still bits of quick gratification along the way
until your baby is born ig
then you get hell until it actually grows up past the point where you need to actively take care
i think the idea of parenting is insane
anyways thats a bit off track
my point is you get joy and fullfillment from a relationship
but not from doing work with 0 results until a certain point is reached
i mean everything has quantifiable results in the sense that if i reimplement my kernel memory allocation scheme, i can run a bunch of benchmarks and see if it improved fragmentation and/or performance
that is fairly gratifying
theres also the qualifiable result of it just feeling nicer or prettier which is very gratifying too
those register names seem familiar
hmm
ig youre right
but a lot of this stuff is like after youve already written the boilerplate
ngl C++98 just sucked
was it really joyful to write the parts of the SDK you didnt even care about
like complete ass
People think I'm a nice guy, and the fact is that I'm a scheming, conniving bastard who doesn't care for any hurt feelings or lost hours of work if it just results in what I consider to be a better system.
deep
i think it's ready for me to port edk2 (only half joking)
well I guess I can knock that off my list of stuff to do 🤣
if you want to try it out the repo is https://github.com/monkuous/xrqemu but keep in mind that the code isn't particularly well tested and that the only supported machine type doesn't match the xremu platforms at all
oh and the dtb that qemu provides describes an rtc device that I haven't implemented yet
are u doing like xr/pc
where its the brain of an xrstation (xr17032) and the body of a modern pc
I suppose the current supported machine type somewhat matches that but it's not something I was aiming for
this was just the path of least resistance so to speak
the only xrarch device used currently is the LSIC, and I'll be using the RTC once I've implemented it
the rest is virtio and pcie
it does indeed work
remember to tune in for next week's episode where monkuous will port windows xp to xrstation
This is all jitted right
yeah
Lol crazy
you can't not jit with qemu
Can you add virtio also?
it's either hw accel or jit
this already has virtio
it's mostly a copy of the riscv virt board setup
How difficult was it to add?
it took like a few hours
Damn
but then xr17032 is fairly similar to existing architectures so i was able to just copy most of the code
No ai? 
nope
Damn
this is the current hw setup https://hst.sh/nuhobidazu.yaml
isnt there a TCG interpreter
i don't think so
it would make sense for there to be
i at least haven't seen any references to it in the current source
how do you even know how to do stuff like this
well in this case it was mostly learn-by-copying
Acpi mentioned
IRQs work!
all the xrarch hardware
the only hw i've implemented is the lsic and rtc. mintia additionally requires kinnowfb, amtsu kb/mouse, the xrarch disk interface, and the xrarch serial interface
they're all fairly simple devices so i don't anticipate many issues but still
Does the disk do DMA?
yeah
Cool
this is the full specification of the xrarch disk
miles ahead from ata
one thing im somewhat worried about is bus error handling
with xremu the devices can report errors from bus transactions that become bus error exceptions
qemu doesn't have that
so if any software relies on that behavior I won't be able to run it
So like MCE for example?
yeah
yeah but what sort of errors would virtualized devices even produce
for example if you try to set an LSIC IPL that's out of range xremu will produce a bus error
Maybe other arches have examples like that
At the end of the day can't u do extern xr_raise(int nr) etc?
I don't know whether the qemu exception code is allowed to be called from device I/O callbacks
One way to find out ig 
I mean devices can definitely raise interrupts as a result of IO
E.g. lapic self ipi
U can check how thats handled ig
uhh i think it does?
iirc you can get SErrors on arm from that
The firmware depends upon bus errors to probe memory and some devices
NEVER use manual probing unless you ABSOLUTELY MUST
the only issue is when a device is present but the software expects it to generate a bus error
@twilit smelt btw does your io stack have dma/device coherenet allocators or iommu remapping or does it do the hobby os "this raw phys addr is definitely DMAable" thing?
It's ok if the firmware does it in coordination with the platform designer. In fact that was a pretty common way to do device probing in like the 90s and may still be done for certain things today
Existence
it's a reference to an osdev article
lol
honestly limnxrstation would be much cooler if you had proper device discovery
or plug and play even
This is proper device discovery for the 90s
is your goal to not make anything more advanced than the 90s
dont you already have a few kernel design features that are way past the 90s
PCI was released in 1992
Wasn't ubiquitous until much later
xrstation is thematically tied to late 80s to early 90s workstation designs
mintia2 is not
The phys mem alloc redesign to introduce zonelists for numa will have a side effect of making it really easy to add low memory zones and things like that
companies still fail at it to this day, on the rpi4 accesses to non-existent pcie devices config spaces hang for 10 seconds and then time out with an asynchronous abort
i meant this question more in the api sense, do you have a subsystem for allocating device-coherent memory, or remapping scatter-gather lists with the iommu (obviously stubbed if its not present) etc
no because mintia2 doesn't have an IO system at all yet
oh ok
but allocating DMA channels is a thing it will have yes
i think this is something you should take into acount from the beginning when u start it
and that comes with mapping it in an iommu and whatnot
do not worry it's already in the plans
lol, i mean its broadcom, at least u dont get shot if u try booting anything but linux on it
maybe thats planned for pi7
how long till ai can do verilog and we get vibecoded hardware
boot rom uses an llm to check whether you're booting linux and if you're not the TPM (Thermal overPressure Module) activates
im gonna blame u if they implement that
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i shazamed the theme at the beginning of this
it worked
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the official unix theme song
is Documentary Theme (A) by Tony Hymas
everything is a note ~official unix philosophy
my eyes always get a little watery watching stuff like this cuz u can tell how much they liked their work
even though unix SUCKS
mintia thread
:)
oh also i figured out how to do the bus error thing
turns out i was using a simplified callback and you can opt in to a better one that can return a transaction error
qemu-system-xrarch
you're lucky im not working on my emulator this week
if i was, i would have already surpassed limnstation17064
and mintia would be left in the dust
acpi in mintia when
doesnt seem too far away tbh
with the insane speed of monkuous' progress
we might even get pcie mintia
how cool is that
make an extension for xr17032 called xr17032vx that adds virtualization
so you can actually daily drive on an xr pc that runs linux on jitted x86 emulation
once i have all the regular xrcomputer hardware implemented adding pcie would take like 4 lines of code (including includes and whitespace)
qemu is very flexible
be evil and make xr/computer be an acpi hw reduced machine
nvme driver in mintia
the feature-lack that surprises me the most is a proper audio controller
you dont even have a beeper
that's like the first thing i would add besides a serial device
how is virtualization related to that
xrarch jits x86
qemu jits xrarch
result = fast
or something like that, idk if it would actually be faster
there is no virtualization involved here
its bc i dont add stuff until im ready to drive them well
so
when i decide to Do Audio
that will be when i in a single sprint:
- design audio controller
- implement in emulator
- write low level kernel driver for it
- write userspace mixing server for it
if any of those parts arent ready to be done yet (and so far #4 has been the blocker) then it wont be done yet
you could add a simple beeper that the bios firmware can use
for error codes on headless systems maybe
idk
same reason theres no like ethernet controller yet even though it wouldnt be that hard to add with like slirp or whatever, im not ready to do a net stack
the xremu thing where reads to nonexistent high memory return 0 instead of a bus error is incredibly annoying to implement in qemu
thats weird
this feels incredibly hacky and i'm not even sure if it'll work properly (aka it might not return the right value)
what is weirder is that it's annoying to implement
oh right i need to check that as well
cant you just go if physaddr >= 0xC0000000: no failure
(which btw is not fully correct bc the LSIC is up there and a bus error needs to occur upon LSIC nonexistence, which is how processor existence is probed)
the point is that i'm not sure if qemu behaves properly if i just return from that function without anything else
im making an assumption that might or might not make whatever i say afterwards completely and utterly irrelevant but, assuming QEMU is using a tree to represent the physical memory space, couldnt u just fill the rest of the address space with a special memory node that always returns 0
Why does that exist btw (the no failure thing)
hm, maybe? it does have a priority thing
might be worth looking into
bc xrstation is a mosaic of design decisions made over like 8 years of everything evolving and things often dont change to be in spiritual alignment with other things that changed
if it works the way i assume it does, you could just make one node that goes from 0 to UINT32_MAX and always returns 0
with lowest priority
it'd be 0xc0000000 to UINT32_MAX but yeah
why the C
uppermost 25% of the addr space
because below that missing memory still has to result in a bus error
Ok but what was the original reason for such a thing
Like why have it at 0xC0000000
What's there (or isn't)
its where slot space starts
Ah
expansion slots are mapped in increments starting there
and they have special behavior upon accessing an empty slot
which is to return 0
actually i can't do this with just a single low-priority memory region, since that doesn't quite model the behavior correctly
as opposed to RAM which will time out and bus error
the address space is divided into 128M regions and if nothing is present in the entire region it needs to read zeroes and ignore writes, but if something is present somewhere in the region but not at the address you're accessing it needs to throw a bus error
which they shouldn't have btw, since the manual states:
If a card is not present in a slot, an access will result in a short timeout followed by a bus error exception. This can be used to detect if a card is present in a slot or not.
yeah when writing the manual i decided to make that change
and then
forgot to ever make that change
in the emulator or firmware
i can do that now if it makes your life easier
that would be nice thank you
i wasn't looking forward to all the hacky logic necessary to correctly model this
especially considering i might add hotplug in the future
it only impacts the firmware so its an easy enough thing to do and have the latest firmware come with the latest xremu commit so nothing breaks inbetween
first i need to order a gigantic tuna sandwich and cinnermen role on d*oord*ash becasue im a disgusting chud
reason i decided to change that is its more realistic if it always bus errors
or at least
it would require less logic in a real hw impl
you would need to have some kind of electromechanical indication that theres a board in a slot or not via some kind of switch
and if theres not then youd need logic on the mobo to activate that pretends to be an endpoint device and put a 0 on the data bus and acknowledge the bus read
which you could do
but why
you could have every device register 2 nodes per region
one that does bus errors with priority 1 higher than the 0 read node
and the other just handles the device normally with higher priority than the error one
Fuck!
it ok ill make that change in mintia1 nobody will notice or care
i also lost the race to make the change
i was literally about to send the patches
fuck it i'll send them anyway
our xremu changes were literally identical
but i didnt do the breakout function you did in a4x
i cant believe you wrote these 25 years ago
i did this
i thought it'd look a bit too messy to do it all in one function
also if this were a real platform where actual hardware failure could occur i'd say that the bus error callback should be applied for as short a time as possible to reduce the chance of ignoring actual errors
yeah its bad to have it applied across a print call
serial or framebuffer errors could then be ignored weirdly
i think its fine to have it applied across just pure logic though
yeah
so i changed that
the mintia1 change will be more interesting
because itll need to catch the bus error exception in a way that is never done yet
anyway with that a4x patch qemu now errors on amtsu probing (since i haven't implemented amtsu yet)
so i will be going into Ke innards

