#MINTIA (not vibecoded)
1 messages · Page 2 of 1
so it could in fact cause problems on x86
i thought it was like
yeah that makes more sense
i was thinking of something else
literally everybody has been confused by the BARRIER keyword in that exact way
yeah i thought it's a memory barrier for a second
well it is. just not one that affects the processor
its a memory barrier for data flow analysis in the compiler
you should use asm(""); for the codegen
or atomic_signal_fence(memory_order_seq_cst); from C11 stdatomic.h
my toolchain is so evil
although i think all toolchains are, but mine isnt any of the ones people are used to, so its just evil in different ways that make it appear specially evil
@acoustic sparrow did u watch those io system tapes
no 😦
you HATE me
@sterile frost have u been intimidated at all by how much code there is in this project
u touched the toolchain too
i think toolchain is 50k and mintia2 is 30k so far so total 80k
i've read through the compiler code for a bit and i think it's nice
lines
i like how easy to read the code is
old mintia was 120k lines of dragonfruit though so
new mintia has yet to reach nearly the same levels of morbid obesity
lol
this is very good to hear after the evilness of dragonfruit
which caused everyone to agree old mintia was unreadable
yeah old mintia was pretty unreadable for me too 😭
my brain just isn't wired that way i guess
im still having trouble reaching the same speeds of writing code in jackal
sometimes ill randomly lapse into RPN
like IF flags OS_PROCESS_DETACH_CONSOLE & 0 == THEN and then i get confused why it doesnt compile
thats just polish notation
== BLD_BITS 64
yeah
any particular reason for that?
is it just because it's easy to parse
makes sense
iirc it was that if i did infix i would have felt compelled to implement operator precedence parsing
and i didnt want to do allat for the preprocessor
this suggestion would have been more useful a year and a few months ago
but im sure i considered that and decided not to for some reason
probably made the tokenizing code too smelly and special casey
eh
you just allow the user to put expressions in every single context and its fine
BxInitializeArgs could be part of arch independent code tbh
well
the way you get the arguments is platform dependent and they may not come as a space-delimited string like they do from the xrstation firmware and is what that function crunches
i just straight up hardcoded them on fox32 to be -dbg which loads the debugger
eh i guess
yeah that makes sense
limine doesnt give you a space delimited string too lol
i would rather convert them to space delimited arguments in arch code and pass it to generic code
limine just gives you what the user provided
so i'll copy the xrstation code and pass that in :p
convert to space delimited string so that you can pass them to the function that converts them to a table of pointers to null terminated strings
smart i know
yes!
or have a generic function which tokenizes them
that's BxInitializeArgs
takes a string and converts it into argc/argv
of course based on the assumption that it's space delimited
do u get the general architecture of the loader
yeah sort of, it's pretty easy to get the hang of
u basically turn the stuff u get from [whoever invoked you] and turn it into stuff the rest of the loader understands generically and this ultimately gets passed on to the kernel
ah i see
i dont really like the code duplication but oh well
ok i just need these to link Loader
`BxCreateVirtualSpace'
`BxInitializeMemory'
`BxMapRange'
`BxRemapCodeRange'
`BxVirtualToPfn'```
then u get the unenviable task of trying to figure out what to do with the linked binary
"ok cool it linked. now what"
"create an iso and let limine load it and see what happens"
yeah probly
i was trying to remember what i did when i did the initial mintia2 port to fox32 but i straight up dont remember
i remember the mintia port to fox32 from late 2022 way better for some reason
even though the other thing was just a few months ago
probably because the first time was a novelty that felt really cool (porting my software for fake computer 1 to unrelated fake computer 2) but then the second time was kind of a chore
that's probably exactly why i find working on this really fun even if it involves boring shit
(because im working on a new project)
some screenshots from rly early fox32 port for old mintia
there was a lot more payoff at the end than youll get though
bc old mintia actually had a userspace and command line at this point
the most youll get is fireworks
also the fox32 port was exciting because the paged mmu implementation had just been put in
and had not been tested at all
and was filled with bugs
mostly around instruction abortability on page faults
which would likely have gone undiscovered foreverish if mintia wasnt demand paging
fox32os still doesnt use the fox32 mmu to this day, only mintia does
think like, you take a page fault while fetching the third byte of a pop instruction
if you didnt write the pop instruction's implementation in the emulator carefully then you might get a double increment of sp and then you get weird unpredictable crashes with confusing symptoms (this happened and took a month to debug)
ok i am hitting the first weird thing
oh wow yeah that makes sense
memory descriptor StartPfn is a UWORD and RtlFillMemoryWithUlong takes a ^VOID
thats why the types dont match lmao
those are defined to be the same size by the language so cast freely
amazing, missing BxCreateVirtualSpace, BxInitializeMemory and BxRemapCodeRange
soo close
the code probably says this but BxCreateVirtualSpace creates the page tables necessary to map some virtual address range (but doesnt populate them with anything), and BxRemapCodeRange is for remapping a section of code as non-writable after having just relocated it
ok so BxCreateVirtualSpace just creates the page tables necessary to map each page in the range provided?
yeah, if you were to map every single virtual page in that range, the page tables youd need to create for that are what it initializes
the purpose of this is because the mintia kernel assumes the page tables for certain ranges of system space are eternal and already exist
and it initializes some of them with like free lists threaded through the PTEs
for allocating and freeing virtual ranges of system space
ok so i don't wanna get this wrong, let me ask it this way, i have this function called BxMapPage (copied from fox32 mostly) that maps a single virtual page right, it allocates all the page tables necessary and writes the pte, so what BxCreateVirtualSpace needs to do is basically the same thing but without writing to the final ptes and for a virtual range instead
yeah now that i have typed it out it makes sense
thanks
yeah
and what is the return value supposed to be?
it looks like it's the amount of pages allocated for the page tables?
basically youll end up rounding up the number of pages in the virtual range because like
on xrstation for instance a single page table can map 1024 pages
so if it asks for a virtual range of 700 pages to be created, the actual usable range is 1024 pages for that reason
so itd return 1024
so that the whole range can be used
so you just return the actual mappable number of pages within the page tables you created
(which is >= the number requested)
okay so let me ask something else
damn okay this is a bit confusing but i think i can figure this out
and mintia is a pretty weird kernel so this is far from the last thing youre going to think is strange or hard to understand if you keep going lol
aaaaaaaaaaaaaaaaaaaa
BxPageDirectory is the bootloader set up (arch specific) page table root
so im assuming on x86 i'll write that pointer into CR3 at some point
yeah but if youve been loaded by limine keep in mind you already have paging enabled and act appropriately
yeah of course
by the time BxInitializeMemory returns i think youre supposed to be on your own page tables though
we still want to set up fresh page tables though
also i think all of this code expects to be running without an MMU
what code
the loader
oh, so the arch code i have been reading assumes that i guess
well that's good to know
it enters with paging disabled on fox32 and xrstation but the first thing those do is set up page tables with the loader identity-mapped and then it enables paging
which parts
i don't remember honestly
but it makes sense now don't worry
i'm just dense
i guess i was referring to the part that BxEnableVirtualAddressing is a thing
so code before that could assume it's running without an MMU
but if the bootloader expects virtual addressing then it doesn't matter
also you HAVE to make a recursive page table mapping somewhere
mintia vmm absolutely requires this
inserting the top level page table as an entry into itself
this creates a big unrolled virtually linear array
containing the contents of the page tables
how does that work with 4 level page tables tho
same thing
do i have to create such mapping for each level?
hm okay
doesn't it waste a big chunk of virtual address space though
or, i guess, i will create that mapping at the page table level
yeah lol idk what i was thinking
it totally makes sense
its an irrelevant amount
for some reason i thought i would waste an entire pml4 entry for that
well you do
oh? i thought it's just a single page mapped to the pml4 itself
no
oops
you pick a pml4 entry
and make it refer back to the pml4 itself
and then the virtual address corresponding to that pml4 entry becomes the base of a flat unrolling of the entire page table hierarchy
i am really trying to wrap my head around it
so like pml4[510] = &pml4[0]
essentially but obviously formatted correctly
and that makes (uint64_t*)((uint64_t)510<<49) a pointer to the pml4 itself
okay
BUT
you can only modify the pml4 entries with that
oh
that's the whole point isn't it
huh
re-read this carefully
the ENTIRE
page table hierarchy
it creates a flat virtually sparse representation of it
that you can index in a linear fashion
by like virtual page number
i'll trust you on this one 😭
for example if PTEs are 8 bytes wide then virtual page number * 8 gives you an offset from the base of this linear page table mapping, at which you can find the PTE that maps that virtual page number
that is wild
this even works for virtual page numbers that fall within the linear mapping itself (and are therefore mapping page tables) - this formula will yield the offset of their PDE
and you can repeat to climb the hierarchy until it reaches a fixed point at the pml4 itself at which point further application will just bring you back to the same spot
so i just initialize one pml4 entry to point to itself
and mintia will magically work
as long as you make sure the macro MI_TABLE_BASE contains the appropriate base of the linear page table mapping
it sounds like such a cool concept
if this seems hard just be glad u dont have to understand how xr17032 actually does software tlb refill out of this recursive page table mapping
and can take recursive tlb misses while doing so
i am glad.
and i think i managed the shortest tlb miss routine
maybe
by having it do that
plus some other stuff
but yeah all this is definitely the result of like 4 years of me going "oh that seems cool" whenever i learn about something new and throwing it in
so even aside from the fact its written in its own programming language mintia is a pretty kooky kernel
eccentric if you will
while porting the scheduler youre also going to run into like
IPLs and software interrupts
cr8 my beloved
which might be a brain breaker if youre just randomly encountering them while porting a kernel
ah
yes
ok so it works the same as in my kernel
but the software ipls are treated slightly differently from the hardware ones
for performance mostly
shortening the common codepaths that just move between software ipls
there is a reason to self-ipi
related to software interrupts
but its not that
and only if you do them in a specific way
ugh BxCreateVirtualSpace is kinda painful because of 4 level paging
i can't just (pages + 1023) / 1024 like you can with 2 level paging architectures
also does BlAllocatePhysicalRange allocate a contiguous range of physical memory?
if so, i might actually not wanna use it for BxCreateVirtualSpace because some x86 systems might have a lot of scattered usable memory that isn't entirely contiguous
Yes
i have been stuck trying to figure out this linking bug for the past hour... basically, RtlPrintByVarTable is generated like this```c
__int64 __fastcall RtlPrintByVarTable(__int64 a1, _BYTE *a2, __int64 a3, __int64 a4)
{
__int64 result; // rax
if ( *a2 )
return RtlPrintByCallbackByVarTable_part_0(0LL, a1, a2, a3, a4);
return result;
}```
which, obviously, is wrong
that first argument is supposed to be a RtljPrintCallback function pointer
but instead it points to 0
and RtljPrintCallback is nowhere to be found in the binary either
oh, and my invlpg is also gone
this has something to do with how i link assembly objects
hacker@raptor:~/new-src/mintia2$ objdump -d BuildConfig/../OS/Loader/amd64/obj/amd64-upfre/_BlAmd64.s.o
BuildConfig/../OS/Loader/amd64/obj/amd64-upfre/_BlAmd64.s.o: file format elf64-x86-64```

wow crazy turns out i am retarded
i might have misspelled ".text"
what did you write instead lol
i forgot the dot
hacker@raptor:~/new-src/mintia2$ qemu-system-x86_64 -M q35 -m 1G -debugcon stdio -cdrom BuildRoot/mintia-amd64-upfre.iso
MINTIA 2 START! amd64-upfre. Base Level 2.```
first sign of life
time to make this thing work
oh whoops 
MINTIA 2 START! amd64-upfre. Base Level 2.
check_exception old: 0xffffffff new 0x6
0: v=06 e=0000 i=0 cpl=0 IP=0028:ffffffff80002627 pc=ffffffff80002627 SP=0030:ffff80003ff62f98 env->regs[R_EAX]=ffffffff80008f40
...
hacker@raptor:~/new-src/mintia2$ objdump -d BuildRoot/amd64-upfre/mintia/loader.bin | grep ffffffff80002627
ffffffff80002627: 66 48 0f 6e c0 movq %rax,%xmm0```
tbf as will said this hasn't been really made for kernel code so
i did -mgeneral-regs-only
i also added a bunch of other flags u want in a kernel
like mno-red-zone
now time to write limine bindings in jackal
ok i had one more .section text in RtlString.s which is why i was suddenly jumping to IP=0 when trying to RtlFillMemoryWithUlong 
now it's dying when switching to new page tables, which makes sense because i am not mapping anything yet lmao
all it does right now is the recursive mapping, but i still have to map the kernel + usable memory
no way mintia on a real platform? 
hopefully™️
i am pretty close to the point where the bootloader will want to load the kernel + modules
at which point i'll have to implement an ELF loader
since mintia uses it's own executable format
and i am using the system compiler to compile everything (the toolchain has the ability to emit C code)
no XLOFF on amd64?
on the host
but eh
more effort than writing an ELF loader :^)
not really tbh
it's probably gonna be a pain once you get to dlls etc
the converting or the loading?
no idea tbh, i have not looked at it
ig what you could do is emit special sections that the converter understands
and in the generated c code manually access the import table or whatever
pain lol
hmm i think i fucked something up
it's spinning in BlAllocatePhysicalRange 
lol
the mintia draft abi supplement for amd64 indicated it used elf in any case
lol
for the linux subsystem at least
listhead: ffffffff80008f00, listentry: ffffffff800092a0, next: ffffffff800092a0
why the hell
does a listentry point to itself
that is not good
how have i ALREADY managed to fuck something up
its a circular linked list probably lol
well probably
listhead := &BlInfoBlock.DescriptorListHead
listentry := listhead^.Next
WHILE listentry != listhead DO
desc := CONTAINEROF listentry TO BlMemoryDescriptor.Entry
listentry = listentry^.Next
END```
that's the code
(not mine)
obviously more stuff comes after desc := ...
but i dont see the problem here, except for that it POINTS TO ITSELF
#MACRO RtlInsertAtTailList ( head, entry ) [
listhead := (head)
listentry := (entry)
last := listhead^.Prev
listentry^.Prev = last
listentry^.Next = listhead
last^.Next = listentry
listhead^.Prev = listentry
]```
that's RtlInsertAtTailList
hacker@raptor:~/new-src/mintia2$ qemu-system-x86_64 -M q35,smm=off -m 1G -debugcon stdio -cdrom BuildRoot/mintia-amd64-upchk.iso -no-reboot
MINTIA 2 START! amd64-upchk. Base Level 2.
Selected boot device is .
*** Cannot continue: Read not supported on file
BxExit called```
new milestone
wait
time to implement a fake filesystem using the limine modules response lmao
u did actually start porting mintia??
didnt will say its impossible or whatever
thanks
are u gonna write a c transpiler?
i am an ELF loader away from getting into proper mintia
uh, this is already transpiled
i'm using the C jackal backend
like the entire kernel?
yeah
wait
well, the entire kernel doesn't compile yet 
so this can already be ported quite easily?
i am doing the loader right now
why not?
but yeah the kernel can probably just be transpiled like that
a bunch of memory management shit
i didn't do yet
damn
kernel knows about amd64, but it's missing a bunch of stuff
honestly with my limine work this could be ported to aarch64 too
that would be so based
mintia on 2 fake and 2 real platforms
true
we can finally know its ops/s

xrbt actually has built in C support
like
it recognizes .c files
xrbt is the build tool
nice
ok time to implement the fake limine fs
my idea is that it will just scan through the modules and match the path
it works with all of the existing codebase, which is nice
hacker@raptor:~/new-src/mintia2$ qemu-system-x86_64 -M q35,smm=off -m 1G -debugcon stdio -cdrom BuildRoot/mintia-amd64-upchk.iso -d int -no-reboot -no-shutdown
Servicing hardware INT=0x08
Servicing hardware INT=0x08
Servicing hardware INT=0x08
Servicing hardware INT=0x08
Servicing hardware INT=0x08
Servicing hardware INT=0x08
Servicing hardware INT=0x08
Servicing hardware INT=0x08
Servicing hardware INT=0x08
Servicing hardware INT=0x08
Servicing hardware INT=0x09
Servicing hardware INT=0x08
MINTIA 2 START! amd64-upchk. Base Level 2.
Selected boot device is .
Loading the system...
/mintia/mpx.sys
*** Cannot continue: Failed to load the Executive.
BxExit called```
nice
Selected boot device is .
ok porting to any 64 bit platform is going to be painful
there's this RtlUquad structure that is defined as STRUCT RtlUquad Low : ULONG, High : ULONG, END
on 32 bit systems and STRUCT RtlUquad Quad : UQUAD, END
on 64 bit systems...
it wouldn't be the end of the world if the code didn't randomly try doing .Low/.High without being gated behind == BLD_BITS 64
maybe i am blowing this out of proportions but there is a few places where this happens and it's pretty annoying
is there unions
yeah but i don't think i can do the C meme
hacker@raptor:~/new-src/mintia2$ ../newsdk/bin/xrbt.exe PLATFORM=amd64 BLD_MP=0 BLD_CHK=1 build.xrbt all 2>&1 | grep 'undefined reference to' | sed "s/.*undefined reference to //" | sort --uniq
`HalCrashConsole'
`HalEarlyInitialize'
`HalLowerHardwareIpl'
`HalProcessorInitialize'
`HalPutCharacter'
`HalQueryConsolePosition'
`HalQueryConsoleSize'
`HalQueryTime'
`HalRaiseHardwareIpl'
`HalSetConsolePosition'
`KeAcquireApcLockExclusive'
`KeAcquireLockExclusive'
`KeAcquireLockShared'
`KeBreakpoint'
`KeCompareSwapUquad'
`KeCompareSwapUquadAbortOnFault'
`KeCurrentProcess'
`KeCurrentThread'
`KeExceptionJacket'
`KeFetchAndSetUquad'
`KeFlushMultipleTb'
`KeFlushMyTbAddress'
`KeIncrementUlong'
`KeIncrementUquad'
`KeReleaseApcLock'
`KeReleaseLock'
`KeSweepTb'
`KeZeroPage'
`KiCurrentIpl'
`KiCurrentProcessor'
`KiDisableInterrupts'
`KiEnableInterrupts'
`KiInitializeArchitecture'
`KiInitializeContext'
`KiInterruptUsermode'
`KiJumpIntoThread'
`KiLowerIpl'
`KiRaiseIpl'
`KiRestoreInterrupts'
`KiSoftInterruptSelfSet'
`KiSwitchAddressSpace'
`KiSwitchContext'
`KiWaitForInterrupt'
`MiInitializeArchitecture'```
🙏
Bruh
doesn't jackal have like, macros or something?
yeah it does
okay im down to these `HalCrashConsole' `HalEarlyInitialize' `HalLowerHardwareIpl' `HalProcessorInitialize' `HalPutCharacter' `HalQueryConsolePosition' `HalQueryConsoleSize' `HalQueryTime' `HalRaiseHardwareIpl' `HalSetConsolePosition' `KeCompareSwapUquadAbortOnFault' `KeExceptionJacket' `KeFlushMultipleTb' `KeReleaseApcLock' `KeSweepTb' `KiCurrentIpl' `KiCurrentProcessor' `KiInitializeArchitecture' `KiInitializeContext' `KiInterruptUsermode' `KiJumpIntoThread' `KiLowerIpl' `KiRaiseIpl' `KiSoftInterruptSelfSet' `KiSwitchAddressSpace' `KiSwitchContext' `MiInitializeArchitecture'
i'll do the rest tomorrow i have spent all day doing this lol
where is it doing this
thats very cool and further than i thought youd get ngl
those come to mind first
@mortal thunder 's fault
true
yeah it was mainly fireworks
i expected mintia to have cleaner code not violating abstractions 😡
you what now?
:p
that part is stubbed off
essentially
wdym
like it doesnt do anything yet its just this
it did a lot in old mintia but does nothing yet in new mintia except wait on a delay of like 4 billion milliseconds repeatedly
ah
ah so it is 4 billion seconds
ms*
i thought i was crazy when i did the calculations 
but it makes sense, 1 << 32
you can modify all the entries because it's basically treating the pml4 root as a subtree
yeah i figured that out now
my bad bro
also do you use the c backend for jackal?
seems like it yea
looks like the compiler just takes the ssa ir and emits it to c pretty directly
makes sense
i think will described it as something "with an infinite amount of registers"
also -Ofast is approximately the same as -O3 if you're not doing any floating point math
not doing any with -mgeneral-regs-only anyway
what the fuck
lmao
except for the fact those get promoted to registers and then regalloc'd
not with mem2reg
:)
or whatever gcc calls it
promoting memory load/stores into registers
well in -O0 all of these will be on the stack
this is the backbone of modern compilers
i dont think thats even necessarily true
for gcc i think it is
-O0 is dumb enough to emit constant mov reg, [local] ; do math on reg ; mov [local], reg
but even when debugging you want at least -Og
oh yeah for some reason there is actually zero debug information lol
it was so annoying i had to pull out ida to figure out what was at any given ip
to be fair even with debug info that's likely a huge pain to debug due to how unreadable the generated source is lol
casts all over the place, destroyed variable names and whatever else
wdym? like its not compiled with gcc or something?
do you pass -g to the compiler?
it's not the default
-ggdb3
yeah for max debug info do that
although does it make much of a difference in this case?
i absolutely do not
with normal -g u dont get full source i think
but i did not expect absolutely no info
also i encoutered a funny bug in the C backend
when emitting a forward declaration for an array
the size is -1
and it emits the forward declaration with an enormous size lol
ok i basically just stubbed everything so i can start working on the elf loader and i am faced with the funny, which is hacking my hacks to allow for functions to be imported from elsewhere 
xlo imports look similar to pe imports, now i need to figure out how it knows where to import what form lol
idk if that is relevant to elf though
yeah same
i will be soon tho
i wanna go sleep at normal time
i think im gonna have to add something for the build system to be able to pass compiler flags in addition to linker flags
the kernel and drivers need a different set of C flags than the bootloader
@sterile frost this is very very cool btw
im too like emotionally distracted to give this the WOAOAHHHHH HOLY SHITTTTT it deserves
im glad someone finds this exciting
but im afraid it's a long way from being functional
also for some reason i need a random RtlPrint ( "\r" ) in my BxLimineFileRead right before the RtlCopyBytes otherwise i fault at the allocated buffer lol
the contents of the print don't matter as long as it's not an empty string, but i chose \r because it has the least visual side effects
its really odd
Why is that?
@summer dagger its happening. ur bootloader is chain loading mine
well, the elf loader, toolchain changes, figuring out the drivers and finishing up the actual amd64 port of the kernel
this is truly an unholy union
True
im sure this is not an entirely trivial task and it will take me at least like a week
Insane work so far tho
BxLimineFileRead...
i did not think i would see such a function name for like another year
lmao
this is my implementation of the "Limine FS"
wow no embed thanks discord so cool
no way, mintia on amd64
that means i have to catch up and actually do something cuz I cant use the "at least it runs on a real computer" excuse
Lol
when i'm done with amd64 i'll try doing aarch64 too
and someone has to do riscv64
so mintia runs on more real platforms
mintia dtb support real
you have a dynamic segment
do you get a .so -> list of symbols mapping of some sort
sorta
you get a list of symbols
which you need to resolve by name
hold on i have just the thing for you
i implemented this
this one will require more memory manager work to make up for the inability to directly create a recursive page table on riscv
oh right
i forgot r in riscv stood for retarded 
@sterile frost
i see you load the module dependencies
but
where do you actually do the symbol name -> address lookup
elf_do_reloc?
id just keep a global lookup table
and when you link new stuff you just add those symbols there
i add only global symbols
you want to resolve RtlCopyBytes from mpx.sys
if a module redefines a symbol then i deny it
you have the same issue with dynamic linking in userspace
elf dumb
dlopen 
so elf does not tell you from which library to pull in given symbol
i guess you can look at NEEDED
and look for symbols in those libraries
you can look at mlibc rtld
no thanks
for elf what you do is look at all the libraries that are in scope of the current symbol resolution
that is, all libraries loaded before the one you're resolving a symbol for
xloff is gone btw its xlo now
which despite the similar name is completely different
xr/sdk linkable object
this is how LDPRELOAD works, the preloaded lib is just loaded before everything else so it comes up first in the symbol lookup
ah okay
so basically i'll just keep a global map of symbol name -> address
fair enough
well for symbols the logic is something like:
dynsym says symbol foo is undefined (i.e. comes from a different DSO)
dynamic relocations say "write address of symbol at index N into address Y", this is most commonly used to fill the GOT entries
when processing the relocation you look at the index in the dynamic symbol table, go through all the libs in scope, and find the corresponding library
then do the relocation
then when calling the function, the call goes through the compiler-generated foo@plt which pulls the address out of the GOT and jumps there
okay now another question
what makes the compiler generate those foo@plt functions?
if symbol is not defined at link time and you pass -shared or something?
you might want to
i wanna figure out how to make gcc emit proper binaries for drivers
i think it might be the linker not the compiler? but yeah they're generated for all symbols that come from a different DSO
(unless you pass -fno-plt, then it inlines the thunks into the caller)
#define EM_X86_64 62
#define R_X86_64_NONE 0 // None None
#define R_X86_64_64 1 // qword S + A
#define R_X86_64_PC32 2 // dword S + A – P
#define R_X86_64_GOT32 3 // dword G + A
#define R_X86_64_PLT32 4 // dword L + A – P
#define R_X86_64_COPY 5 // None Value is copied directly from shared object
#define R_X86_64_GLOB_DAT 6 // qword S
#define R_X86_64_JUMP_SLOT 7 // qword S
#define R_X86_64_RELATIVE 8 // qword B + A
#define R_X86_64_GOTPCREL 9 // dword G + GOT + A – P
#define R_X86_64_32 10 // dword S + A
#define R_X86_64_32S 11 // dword S + A
#define R_X86_64_16 12 // word S + A
#define R_X86_64_PC16 13 // word S + A – P
#define R_X86_64_8 14 // word8 S + A
#define R_X86_64_PC8 15 // word8 S + A – P
#define R_X86_64_PC64 24 // qword S + A – P
#define R_X86_64_GOTOFF64 25 // qword S + A – GOT
#define R_X86_64_GOTPC32 26 // dword GOT + A – P
#define R_X86_64_SIZE32 32 // dword Z + A
#define R_X86_64_SIZE64 33 // qword Z + A
you'll need this probably
god damn
fucking discord formatting
not even, a bunch of those are only for the static linker to process
GLOB_DAT, JUMP_SLOT are usually used for GOT entries, RELATIVE is for PIE stuff
i think 64 and COPY might appear as well?
well mlibc has handling for COPY so it did appear at one point ig 
so quick question again, how do i get it (gcc/linker) to generate the plt? im assuming just not passing -static should be enough?
-shared
i think it should just do it for dynamically linked executables and shared libs?
no you dont you only need R_X86_64_RELATIVE
we're talking about DSO symbol resolution as well
(and you might get dummy JUMP_SLOT for unimpl. weak funcs)
and GLOB_DAT for globals from a different DSO
aren't those the same calculation tho
and COPY for idk
yeah they don't do different math, JUMP_SLOT is a separate relocation so you can do lazy relocation
ig _64 is different because it can use the addend
instead of immediately resolvoing the symbol, you fill the GOT entry with a resolver stub that lazily resolves the symbol and replaces the GOT entry
although distros nowadays just link with -z now so that functionality goes unused
i just always add the addend, beause in other entries it's just 0 
lol i did that with mlibc once and it didn't like it
well mlibc does eager binding by default regardless of that
because the lazy resolver only half works (does not save sse regs etc)
the self relocator only cares about RELATIVE?
or do you mean the code that validates the dynamic section
in which case yeah
yea that
iirc you submitted a pr?
eh it's easier to just ignore it instead of trying to filter out -z now from compiler flags
esp. since a target can technically set it via gcc configuration
@sterile frost i dont think anybody has noted this semantic difference
but i think the symbol namespace when dynamic linking with elf is global
with xlo its targeted, you bind against dynamic libraries at link time and it figures out where the external symbols reside within each and encodes that
and they get looked up within the specific lib
i wonder if an elf->xlo converter is actually a good idea
an extra step after invoking gcc where you convert to amd64 xlo objects
and give that to my linker
which youve added amd64 support to
i mentioned earlier that you could instead make special sections that have the xlo import/export info instead of using the elf dso stuff
and the elf->xlo converter could use that after linking
i have not touched the xr/sdk linker at all, so this would need some work
but idk if it's worth it
unless you really want to keep elf out of this whole thing
so that's a no i guess
that could work, but again, pain
i think thats actually the best option
more toolchain work that can be avoided :^)
elf object files are simple enough to parse
if you want to feed that into the linker and have it spit out an xlo file
basically youd need to crunch the elf objects and turn their data into the internal structures the rest of my linker uses
i think this would not be giga hard
not really i dont think so
ig the biggest problem would be the relocations?
IF relocation is weird THEN TlError ( "fix ur elf\n") END
elf objects are usually completely unrelocated (all addresses etc are 0s)
inter-section references are that way in xlo objects as emitted by the assembler
well
they are emitted assuming the section base is at address 0
but the offset within the section is still encoded in-place
later when the sections are given addresses in the last stages of linking a final executable or whatever, the relocations are performed by adding the section base to each of those offsets
in elf it's all 0s everywhere, the relocations have all the information to compute the full value to put into the empty spot
even relative jumps within a symbol are not filled in
thats just an extra step then i think
youd just crunch it enough to make it look like xlo sections
so youd semi-relocate it lol
this actually sounds fun
i might do this later
this sounds like a thing thats fraught enough that itd be best if i just do it since i already know all the gotchas with my own format and whatever
then my linker would have elf+xlo input support and xlo, binary, and fxf output support
good luck debugging that shit with x86 tooling though
but i get by with only my own tools and shitty stack traces and whatever so.
in my old format i did this the same way but i found out i could shrink the relocations by like 50% by doing it the other way
i have a feeling the ppl designing ELF would have done the same if they realized
i REALLY need to know what the hell is going on there
__twr_v387 = 39ULL;
__twr_v388 = _mng_vaddr384 >> __twr_v387;
__twr_v389 = 511ULL;
__twr_v390 = __twr_v388 & __twr_v389;```
huh
thats either an obscure math optimization, a more compact encoding (via an obscure math optimization), or it just broke it
likely, but at the same time this is only for the intermediate object files
so ig it only makes static libs smaller
the ff8 sounds like a bug
shkwve has a self-relocation info format which does the same thing too
mostly for ease of parsing
oh
its IDA messing around with type assignment
i also just figured it out
oh no
you need to retype BxPageDirectory to uint64_t[]
it shifts left by 3 after that
yes
yeye
its that
and either clang or ida folds the two ops together
it combined the shifts
probably clang
did not change a thing except for some more casts
ida is just
special
but yeah it makes sense why it works that way i guess
lmfao ida moment
truly
can you send the binary i want to see if binary ninja does better
lmao
loader now recognizes elf and does some basic sanity checks
still need to load it, relocate it and do symbol resolution
i also need to build sysdbg.sys properly
wait i just got the liminefs thing you did and thats actually a good idea
i rpobably wouldnt have thought of that
that will be incredibly broken because of how heavily it relies on xlo
can ELF actually work within the mintia system?
i'd use mach-o
which has two layer name resolution
and also has normal compiler support like elf
thanks, it's really nice because i can just copy BuildRoot/Generic/* and BuildRoot/$arch-$mp_suffix-$chk_suffix/* to iso_root/ and it just works hacker@raptor:~/new-src/mintia2$ tree BuildRoot/iso-root/ BuildRoot/iso-root/ ├── boot │ └── limine │ ├── limine-bios-cd.bin │ ├── limine-bios.sys │ ├── limine.conf │ └── limine-uefi-cd.bin ├── EFI │ └── BOOT │ ├── BOOTIA32.EFI │ └── BOOTX64.EFI └── mintia ├── Drivers.txt ├── loader.bin ├── mpx.sys ├── Resources │ ├── Fixed.10x20.hcf │ ├── Fixed.18x18.hcf │ ├── Fixed.6x13.hcf │ ├── Haiku.6x12.hcf │ ├── Mach.8x12.hcf │ ├── PC.8x16.hcf │ ├── PC.8x8.hcf │ ├── Sony.12x24.hcf │ ├── Sony.8x16.hcf │ ├── Sun.12x22.hcf │ └── Terminus.8x16.hcf └── Resources.txt
timeout: 3
/MINTIA (%version%)
protocol: limine
kernel_path: boot():/mintia/loader.bin
kernel_cmdline: -dbg
module_path: boot():/mintia/mpx.sys
module_path: boot():/mintia/Drivers.txt
module_path: boot():/mintia/Resources.txt
module_path: boot():/mintia/Resources/Haiku.6x12.hcf
module_path: boot():/mintia/Resources/Mach.8x12.hcf
that is by far the cleanest way to do this
i legit would not have thought of the liminefs thing
i would have done some other weird shit that would have been worse and harder to understand
and its only like 50 lines long too
pretty neat
also what does the "fre" in upfre mean?
up obviously means uniprocessor
and changes to mp with BLD_MP=1
but i noticed that fre changes to chk when i pass BLD_CHK=1
theres chk and fre
chk means checked (as in debug checks)
fre means free (as in free of debug checks)
thats what i wanted to believe but it seemed too easy
almost silly
i am very much enjoying the build system so far
i wish this is how C/C++ build systems worked :^)
it probably doesnt work like them because i hav zero experience with them other than rudimentary makefile shit
this is another example of me designing something based on what i immediately needed
yeah i can tell by the way xremu builds all .c files with a single gcc invocation
:p
the old mintia build system was a big makefile mess
that would only rebuild what changed etc
also more evidence of the fact that i learned systems dev by writing all this junk rather than learning something that already existed first
xremu was the first nontrivial C program i ever wrote and i had old mintia like fully working by then
does it have incremental rebuilding?
yes
yeah
nice
iirc it even has support for C
damn
idk if it's an actually working and used feature or not
but .c is a recognized source file extension
its used for like a handful of C files in the CHost host-specific part of the toolchain library
which glue with libc stuff
the toolchain also supports one other host which is fox32os
holy shit
the whole toolchain can run on fox32os
i had to set BL_DESCRIPTOR_MAX to like 4096
otherwise i would crash all the time in BlAllocateMemory
yeah theres a certain point where beyond that it can dynamically allocate new descriptors but before that it uses statically allocated ones
or something
you must be creating shit tons of descriptors before that point
probably while initializing page tables
yeah, i am allocating a shit ton of memory there
it would probably be wise to use 2MiB/1GiB mappings
neat
that text editor is itself written in jackal and can be compiled from within fox32os. so.
fox32os has a fully self-hosted dev environment
before mintia
:(
lol
i mean its YOUR dev env
but does it have a totally not overengineered memory manager and fireworks?
i don't think so
mintia2 amd64 port marks the end of NT era
fox32os is lovely
its scuffed on purpose its supposed to be like classic mac os
mintia is more like the a/ux to fox32os's classic mac os
lol
i didnt write the text editor
someone by the name of olive did
observe the only substantial jackal program in existence that i did not write https://github.com/OliveIsAWord/hjkl/blob/80a0723603adf8c1d3f0e75562f469b79b4e8a46/src/hjkl.jkl
gcc fox32 backend when
EXTERN FN Millis () : UWORD
#ASM [
Millis:
.global Millis
in a3, 0x80000706
ret
]```
wow
why would you write a gcc backend
its fox32os this is allowed there
actually instead of making an isa fox32 should be an actual cpu :3
why would you do that when you can just emit C and let GCC/Clang compile it for you
that's not how this works
that's exactly how it works.
i mean a backend so i can compile c code for fox32
guh
lmfao
im thinking backwards
i thought i was going insane
gaslit
wait i have a linked mpx.sys lol, i didn't know it linked
oh right i already tried loading it
someone needs to make an fpga impl
i really need to sleep
send me this amd64 mpx.sys
upload it here i want to stare at it in a hex editor for no reason
its like 80% stubs and the binary seems fucked
as for stubs i just took every function i didn't implement and made a symbol with that name so it shuts up 
this is so real
but the linked binary is terribly fucked
is it a megabyte because -O0
@sterile frost would you get mad at me if i add elf input support to my linker
and ask you to change your build process to use my linker and emit xlo
i mean, if you think that's the way to go then i'm fine with that
less work for me in the end :^)
@twilit smelt will you need me or my code or should i just head to bed for now
i wont, im not gonna do that until later, maybe tomorrow
good
then i will continue with my elf stuff tomorrow
even if it's gonna get thrown away in the end
i really want to load mpx.sys and carry on with implementing the rest of the kernel stuff
ok gn
that's pretty cool!
finally Mintia on a non-meme platform!
its funny id already known you for 3 yrs by the time i even started mintia
what the hell went on before that
i dont remember at all
that feels like contemplating the 100k years of like anatomically-modern-human history before writing was invented
completely irrelevant. lost to time
idk i think it was mostly shitposting
you had your other project
whose name escapes me now
that was like a unix-like a think
still on a custom made architecture/machine
aisix
oh yeah, that
You should revive it but put a shitty llm on the kernel and shill it as AIsix
ive ported it upward thru all the architectural revisions and stuff for like 4 yrs so it still runs
limine station
What does limn stand for
local integrated msystem narchitecture
this is one of the reasons i changed the name
arCHitecture that is Really cool
its actually an invocation of the chi rho. im big into christian esotericism.
i just realized i could easily turn my heap allocator into a best-fit allocator by having each bucket be a min-heap
i wonder if this is worth it
some operations turn from O(1) to O(log n) but theres less fragmentation so less memory is wasted
and i rly like reducing memory usage
once i have a multi-user base system ill try it
i dont trust allocator decisions based on contrived testing
i tend to make trade-offs heavily leaning toward memory savings though
if something gets like 15% slower i still feel like it was worth it if i saved 3 page frames
if something gets 30% more complicated it was still worth it if i moved 2 kernel page frames to the paged code section
etc
this is probably because if the kernel is slow you can work around this by avoiding doing syscalls as much as u can which is a good plan anyway
but if memory is congested u just slow down and there isnt jack shit u can do about it
so i guess im trying to give userspace the widest room possible to make itself fast when it wants to be and the biggest impact thing there is reducing the memory overhead of the operating system itself
that's cool
i remember that aisix logo from back in like 2018
never really changed
yea i drew it with ansi compatible color codes
mayb i can do something similar for da mintia moon thing
you can take a look at boron btw
i think it does dynamic linking pretty well
lmao
throughout nanoshell's and boron's development i've been kinda doing the same thing
ah that's nice
boron does that too
except for path names and stuff
8 hours of sleep and im ready to get back into mintia
@twilit smelt if you do decide to add elf input to the linker i'll match you and try adding x86 support to the assembler and x86 codegen to jkl
But then elf linker support isn't needed at all
oh did you want to do it specifically for x86
i thought you just wanted it lol
ok then i won't torture myself
It's so that mintia can use xlo on amd64
Linker accepts elf, emits xlo
yeah that makes sense, i just thought you wanted that as a feature in general
i was not thinking right yesterday
okay i can load the kernel and print it's symbol table
now i need to figure out a nice way to not link everything at a random address that doesn't collide with the loader
after that i can fix the linker script to not link everything into higher half, relocate the modules into higher half myself, then fix relocations, register symbols, resolve any symbols it wants and hopefully it will work
👀
i guess it's time to unstub literally everything i stubbed to get executive to compile lmao
okay i figured out the first crash, i was faulting when accessing [rsi+rax] in RtlCopyBytes because i forgot to zero out rax first, whoops
now i am getting to the stubs :3
0xAAAAAAAAAAAAAAAA is obviously not a valid Prb address...
so i guess it's time to figure out how to do this
crazy how far this already is
thanks, i know there's not much to see yet but i am still happy with how it's going :D
i might have trolled when loading the kernel
lol
Program Headers:
Type Offset VirtAddr PhysAddr
FileSiz MemSiz Flags Align
LOAD 0x0000000000001000 0xffffffff80400000 0xffffffff80400000
0x0000000000019c3a 0x0000000000019c3a R E 0x1000
LOAD 0x000000000001b000 0xffffffff8041a000 0xffffffff8041a000
0x00000000000043c0 0x00000000000043c0 R 0x1000
LOAD 0x0000000000020000 0xffffffff8041f000 0xffffffff8041f000
0x0000000000008b88 0x00000000000e3108 RW 0x1000```
i thought this might be one of those misalign things
but they are all aligned
i wonder what causes memory at rip to be wrong
it shouldn't be memory corruption because the loader remaps the kernel to be RO
Insane

this is coming together so nicely
true
lol
Imagine writing a good kernel, sounds boring
thank god i don't have to do that
cc @mortal thunder @fair jetty
When mintia2 uapci port
inb4 mintia slower than nyaux
oh man i really hope not lol
could be because of that transpilation not being very good
woo!
thanks i am actually having lots of fun with this
is it weird that i don't find it that insane as other people lol
I had this experience porting systemd to the five BSDs
Your work is remarkable nevertheless
nice to see that people find it interesting 🙏
i need to add more stuff to the toolchain, namely i need to be able to pass struct field offsets to assembly
writing some assembly routines is painful without it
last screenshot before i indulge in xrsdk pain, i believe the moment i hook it up to a timer we're either gonna get fireworks, or it's gonna die terribly (most likely) - this print happens right after ExStartExecutive which initializes a thread starting at ExpInitializeExecutive, which in turns calls PerformFireworksTest (after doing a bunch of other stuff, like initializing all the subsystems which haven't been initialized yet lol)
i have done most arch initialization, unfortunately i am still relying on some lower half mappings which i'll have to get rid of soon, i am also not implementing any of the synchronization primitives so this whole thing is a little bit sketchy atm, but i will make sure to implement all the important stuff before fireworks :)
Letsgo
oh, and i also have to get rid of flanterm (
) so HalCrashConsole can corrupt the framebuffer so we can get the nice looking crash screen
afaics mintia2 does not have userspace yet, so i am safe from that
wdym "corrupt the framebuffer"
cant it already do that
yea it can but flanterm fixes it sort of
it doesnt have the same effect as mintias ow n fb console
okj im back from a grass touching session
time to beat the xrsdk toolchain into submission
idk how exactly to pull this off (defines for structure offsets in assembly sources) because jackal inline assembly has the benefit of it being embedded in jackal sources, which in turn benefits from preprocessing so when it parses an inline assembly block it can define offsets for fields in structures known at given scope
is this where i write a proper x86 jackal/xrasm backend
for a second I read this as gross touching session
i am slowly getting the hang of the compiler architecture, i have never worked with proper compilers before so this is a fun adventure
so far i have added all the arch definitions and abi bits and i'm working on machine instruction selection
this is not a thing u should spend lots of time working on and I have a good reason for saying this
Which is that I'm gonna throw away the whole middle end and backends and redo them later before doing my own amd64 backend (which I may actually never do since C seems to be working so well)
oh :(
why are you actively preventing him from working on minita lmao
I was referring to the amd64 backend he said he was doing for the jackal compiler
The mintia port seems to be going great and see no reason it can't be finished

