#pmOS - microkernel OS for RISC-V, x86, and LoongArch

1 messages · Page 3 of 1

carmine nacelle
#

Is it 3 banks of 32 (64) registers?

#

The driver should program the DebounceTmrOut/DebounceTmrOutUnit/DebounceCntrl bits according to
the data passed by BIOS through ASL code
Thonk Thonk Thonk Thonk Thonk

carmine nacelle
#

Is it me or is Linux's driver a bit fucked?

#

(AMD spec)

#

This stuff is reserved...

#

Oh nevermind

#

I can't read

carmine nacelle
#

@twilit talon the driver is cooking 🧑‍🍳

#

Btw, linux does this

if (pin <= 255) {
        char ev_name[8];
        sprintf(ev_name, "_%c%02X",
            agpio->triggering == ACPI_EDGE_SENSITIVE ? 'E' : 'L',
            pin);
        if (ACPI_SUCCESS(acpi_get_handle(handle, ev_name, &evt_handle)))
            handler = acpi_gpio_irq_handler;
    }
    if (!handler) {
        if (ACPI_SUCCESS(acpi_get_handle(handle, "_EVT", &evt_handle)))
            handler = acpi_gpio_irq_handler_evt;
    }
#

(the only part that's left is to call uacpi)

#

Although ACPI says

Interrupt based event signaling follows a similar methodology, a generic event device (GED) is declared which in turn
describes all interrupts associated with event generation. The interrupts are listed in a _CRS object. When an interrupt
is asserted the OSPM will execute the event method (_EVT) declared in the GED object specifying the interrupt
identifier as a parameter. In this way the interrupt can be associated with specific platform events

#

A GPIO controller is modeled as a device in the namespace, with _HID or _ADR and _CRS objects, at a minimum. Op-
tionally, the GPIO controller device scope may include GeneralPurposeIO OpRegion declarations ( Section 5.5.2.4.5)
and GPIO interrupt-to-ACPI Event mappings (Section 5.6.5.2). Note that for GPIO-signaled ACPI Events, the corre-
sponding event method (e.g. _Exx, _Lxx, or _EVT) must also appear in the target GPIO controller’s scope. For GPIO
event numbers larger than 255 (0xFF), the _EVT method is used.
Each pin on a GPIO Controller has a configuration (e.g. level-sensitive interrupt, de-bounced input, high-drive output,
etc.), which is described to OSPM in the GPIO Interrupt or GPIO IO Connection resources claimed by peripheral
devices or used in operation region accesses

twilit talon
twilit talon
twilit talon
carmine nacelle
carmine nacelle
#

Because my laptop has its power button on its side for no reason

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And it's acutally handled by the GPIO controller lol

#

Do I just call uacpi_eval with "_EVT(0)" ?

twilit talon
#

yup

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or u can do it like linux

twilit talon
#

which has no ret value

carmine nacelle
#

And _EXX and _LXX as well?

twilit talon
#

i mean u see what linux does?

#

run _EXX or _LXX if one exists

#

otherwise run _EVT

carmine nacelle
#

Yes

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But do I also call execute with no arguments?

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Like what's the difference between eval and execute

twilit talon
#

just simpler signature

#
uacpi_status uacpi_eval_simple(
    uacpi_namespace_node *parent, const uacpi_char *path, uacpi_object **ret
)
{
    return uacpi_eval(parent, path, UACPI_NULL, ret);
}

uacpi_status uacpi_execute(
    uacpi_namespace_node *parent, const uacpi_char *path,
    const uacpi_object_array *args
)
{
    return uacpi_eval(parent, path, args, UACPI_NULL);
}

uacpi_status uacpi_execute_simple(
    uacpi_namespace_node *parent, const uacpi_char *path
)
{
    return uacpi_eval(parent, path, UACPI_NULL, UACPI_NULL);
}
#

does this help? LULW

carmine nacelle
#

Bruh

#

Ok

#

So eval _EXX and if that fails execute _EVT

#

(since it's the same thing)

twilit talon
#

is it edge triggered?

carmine nacelle
#

Idk

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It's given by AML

twilit talon
#

agpio->triggering

carmine nacelle
twilit talon
#

yeah

#

so get that triggering value

carmine nacelle
#

Lol, this means that the power button is literally almost wired to the interrupt line

twilit talon
#

yes

carmine nacelle
#

Linux does sprintf

twilit talon
#

do u understand the logic now?

carmine nacelle
#

Yes

twilit talon
#

nice

carmine nacelle
#

I just didn't know which functions to call

twilit talon
#

_EVT is generic, aka a fallback

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_LXX or _EXX are specialized

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btw one extra difference

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_L/EXX doesnt take any args

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_EVT takes in an integer

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so u want to pass it uacpi_object_create_integer(pin_idx)

carmine nacelle
#

Yeah

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Ok 10 minuts and this will be done

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(famous last words)

twilit talon
#

lmao

carmine nacelle
#

Can I do some sort of get_handle/eval serapately, so I distinguish between non-existing nodes and errors?

twilit talon
#

uacpi_namespace_node_find

carmine nacelle
#

(though I guess I can do that by the return value)

twilit talon
#

or that

carmine nacelle
#

UACPI_STATUS_NOT_FOUND ?

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Or no handler

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UACPI_STATUS_NO_HANDLER

twilit talon
#

why would it be no handler lol

carmine nacelle
#

Idk because there's no handler found...................

twilit talon
#

which handler

carmine nacelle
#

_L00

#

(as an example)

twilit talon
#

its edge triggered in your case

carmine nacelle
#

Am I supposed to be calling uacpi_object_unref?

twilit talon
#

on your created integer? yeah ofc

carmine nacelle
twilit talon
carmine nacelle
#

(I think so)

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(I'll push the code once I confirm it works)

#

(I know there is a to text function but I would be debugging things too quickly in that case)

twilit talon
#

NOT_FOUND

carmine nacelle
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I think I know why...

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I think it's working...

twilit talon
#

holy shit

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yes its working

#
Switch (ToInteger (Arg0))
{
    Case (0x00)
    {
        M000 (0x3900)
        M460 ("    Notify (\\_SB.PWRB, 0x80)\n", 0x00, 0x00, 0x00, 0x00, 0x00, 0x00)
        Local0 = \_SB.PCI0.LPC0.EC0.HWAK /* External reference */
        If (((Local0 & 0x04) == 0x04))
        {
            Local0 &= 0xFFFB
            \_SB.PCI0.LPC0.EC0.HWAK = Local0
            Notify (\_SB.LID0, 0x80) // Status Change
            Sleep (0x01F4)
        }
        ElseIf (((Local0 & 0x20) == 0x20))
        {
            Local0 &= 0xFFDF
            \_SB.PCI0.LPC0.EC0.HWAK = Local0
            Notify (\_SB.LID0, 0x80) // Status Change
            Sleep (0x01F4)
        }
        ElseIf (((Local0 & 0x50) == 0x50))
        {
            Local0 &= 0xFFAF
            \_SB.PCI0.LPC0.EC0.HWAK = Local0
            Sleep (0xC8)
            If ((\_SB.PCI0.LPC0.EC0.ADPT == 0x01))
            {
                Notify (\_SB.ADP0, 0x80) // Status Change
                Notify (\_SB.PCI0.LPC0.EC0.BAT0, 0x80) // Status Change
            }
            Else
            {
                Notify (\_SB.ADP0, 0x80) // Status Change
                Notify (\_SB.PCI0.LPC0.EC0.BAT0, 0x80) // Status Change
            }
        }
        ElseIf (((Local0 & 0x80) == 0x80))
        {
            Local0 &= 0xFF7F
            \_SB.PCI0.LPC0.EC0.HWAK = Local0
            Notify (\_SB.PCI0.LPC0.EC0.BAT0, 0x80) // Status Change
        }
        Else
        {
            Local0 &= 0xFFEF
            \_SB.PCI0.LPC0.EC0.HWAK = Local0
            Notify (\_SB.PWRB, 0x80) // Status Change
        }
#

Event this huge if is handled correctly

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u get into the last branch

carmine nacelle
#

Why wouldn't it be

twilit talon
#

uacpi bugs potentially

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this means all init up until this point was correct

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pretty fucking cool

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this is like cutting edge hw too

#
    /*
     * Modern hardware uses power button devices instead of the fixed event.
     * Search for them here and hook AML notifications.
     */
    uacpi_find_devices(ACPI_HID_POWER_BUTTON, [](void*, uacpi_namespace_node *node, uint32_t) {
        uacpi_install_notify_handler(node, handlePowerButtonNotify, nullptr);
        return UACPI_ITERATION_DECISION_CONTINUE;
    }, nullptr);

This is what's left for you

carmine nacelle
#

I've pushed the code

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Ok I'll try it

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If it turn off it's game over

twilit talon
carmine nacelle
twilit talon
#

try on your laptop ^^

twilit talon
carmine nacelle
twilit talon
#

gitlab L

twilit talon
#

btw

#

u literally say write-1-to-clear

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then proceed to &= it

carmine nacelle
#

Where

twilit talon
#

reg &= ~PIN_INTERRUPT_MASK;

carmine nacelle
#

I'm not

twilit talon
#

ah nvm

carmine nacelle
#

It's only when !is_interrupt_pin(device, offset + j)

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(influenced by linux)

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Anyway

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What did I want to do

carmine nacelle
#

My ACPI server is written in C

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(my OS is weird)

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(because why not have C++ kernel and C userspace)

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Ok I'm adding it

hexed acorn
twilit talon
#
- uacpi_resources *resources;
- uacpi_status result = uacpi_get_current_resources(node, &resources);
+ result = uacpi_for_each_device_resource(node, "_CRS", find_amd_gpio_resources, device);
if (result != UACPI_STATUS_OK) {
    printf("Failed to get resources for AMD GPIO device\n");
    goto fail;
}

- uacpi_for_each_resource(resources, find_amd_gpio_resources, device);
- uacpi_free_resources(resources);
carmine nacelle
#

Ok

twilit talon
#

very based work btw, first hobby AMD gpio driver lol

hexed acorn
#

now i gotta one-up that and make the first hobby amd i2c driver halfmemeleft

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which actually is not amd-specific and is just some designware ip iirc

twilit talon
#

true

carmine nacelle
twilit talon
#

very very cool

carmine nacelle
#

it shut down the laptop

twilit talon
#

Can you update the wiki and add the third way lmao

twilit talon
carmine nacelle
twilit talon
#

wtf

carmine nacelle
#

This needs fixing, but otherwise it works

twilit talon
#

what is that interrupt?

carmine nacelle
#

Gpio

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Probably

twilit talon
#

why is there no handler?

carmine nacelle
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Because of how my interrupts work

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Because it configures lapic from userspace, and then installs the handle

twilit talon
#

hm

carmine nacelle
#

And in between that, it's getting interrupts

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I need to find the interrupt disable bit I'd suppose

twilit talon
#

btw while you're here can u test the wip uacpi PR real quick?

carmine nacelle
#

Ok

twilit talon
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im about to merge it soon

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if your test is succesful

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git fetch && git checkout thread-safety-p3 in submodule

carmine nacelle
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One sec

twilit talon
#

thanks

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especially EC stuff

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since that uses the infra that was changed a lot

carmine nacelle
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(I'm restarting)

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Though all of the events run on CPU 0

twilit talon
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amazing, thanks

twilit talon
#

i mostly wanted to make sure i didnt mess up by introducing deadlocks or anything like that

carmine nacelle
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And my scheduler quantum is 100ms (I think)

twilit talon
carmine nacelle
#

But I create a pthread per event

twilit talon
#

i wonder why that is

carmine nacelle
#

Yeah idk

twilit talon
#

scheduling memes probably

carmine nacelle
#

That might be because the kernel is so slow

twilit talon
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or debounce on hw side

carmine nacelle
#

My copy to/from user functions need fixing

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And they're called all the time for IPC

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Did obos get fixed?

twilit talon
#

fixed?

hexed acorn
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oh this reminds me, now that i've replaced the battery in my laptop i can actually test the charger plugged in/out events

carmine nacelle
twilit talon
#

ah no i dont think so

carmine nacelle
#

Thonk pmOS on hyper?

twilit talon
twilit talon
hexed acorn
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iirc they should be ec queries on my laptop

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but we'll see

twilit talon
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they're ec queries on mishakov's laptop as well

carmine nacelle
#

I want to try the old MacBook tomorrow

hexed acorn
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asking since astral's iso didn't last time i tried it

vale hazel
#

daily nyaux shilling

twilit talon
carmine nacelle
#

I'm using ventoy though

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I think I had some bad luck booting it on either bios or EFI machines directly from USB drive

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Btw is there managram iso?

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I've only found a weird format image

hexed acorn
#

yeah we have raw hard disk images only

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it should in theory work if you just write it to a usb stick or a hard disk

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assuming that xhci/sata/nvme drivers cooperate

carmine nacelle
#
$(ISO): ../kernel/build/kernel ../bootstrapd/bootstrapd.elf ../devicesd/devicesd.elf ../logd/logd.elf ../ns16550/ns16550.elf ../piped/piped.elf ../processd/processd.elf ../terminald/terminald.elf ../vfsd/vfsd.elf ../vfatfsd/vfatfsd.elf ../ahcid/ahcid.elf limine.conf limine
    mkdir -p isodir/boot/limine
    mkdir -p isodir/EFI/BOOT

    cp limine.conf isodir/boot/limine/
    cp -v limine/limine-uefi-cd.bin isodir/boot/limine/
    cp -v limine/limine-bios-cd.bin isodir/boot/limine/
    cp -v limine/limine-bios.sys isodir/boot/limine/
    cp -v limine/BOOTRISCV64.EFI isodir/EFI/BOOT/
    cp -v limine/BOOTX64.EFI isodir/EFI/BOOT/

    cp -v ../kernel/build/kernel isodir/kernel

    cp -v ../bootstrapd/bootstrapd.elf isodir/
    cp -v ../devicesd/devicesd.elf isodir/
    cp -v ../logd/logd.elf isodir/
    cp -v ../ns16550/ns16550.elf isodir/
    cp -v ../piped/piped.elf isodir/
    cp -v ../processd/processd.elf isodir/
    cp -v ../terminald/terminald.elf isodir/
    cp -v ../vfsd/vfsd.elf isodir/
    cp -v ../vfatfsd/vfatfsd.elf isodir/
    cp -v ../ahcid/ahcid.elf isodir/
# cp -v ../test/test.elf isodir

    xorriso -as mkisofs -b boot/limine/limine-bios-cd.bin -no-emul-boot -boot-load-size 4 -boot-info-table --efi-boot boot/limine/limine-uefi-cd.bin -efi-boot-part --efi-boot-image --protective-msdos-label isodir -o $(ISO) 
#

This is what I do

hexed acorn
#

we don't have iso images mainly since we don't have an iso9660 driver so we couldn't mount the image (and we don't have overlayfs or anything so you'd be stuck with a read-only root)

carmine nacelle
#

lol (reasonable)

twilit talon
#

@carmine nacelle hey uh sorry for bothering u, I realized I had some possible races in the latest version and so I made some fixes, any way u can re-test with the same test?

carmine nacelle
#

Ok

twilit talon
#

nice

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make sure u pull in the latest version since it was force-pushed

#

fetch && checkout should work

carmine nacelle
#

Is this alr?

twilit talon
carmine nacelle
#

I think the battery is just slow

twilit talon
#

nice

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yeah probably

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i mean when you're in windows, how long does it take in UI?

hoary moat
twilit talon
#

i dont think u use GPEs for anything?

hoary moat
#

Wake from suspend

twilit talon
#

oh yeah

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yeah that would be nice

hoary moat
#

Sure

carmine nacelle
#

My laptop doesn't have s3

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Could that be crashing obos?

hoary moat
#

It crashes before a new gdt is loaded

carmine nacelle
twilit talon
#

yeah

carmine nacelle
#

Maybe it's instant and gui is slow

twilit talon
#

we can check with managarm

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it should be more or less instant there

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i mean the irq to work

hoary moat
#

@twilit talon it worked on qemu

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wake-from-suspend

twilit talon
#

nice nice

hoary moat
#

although maybe it's better to test on real hw

twilit talon
#

does wake work on real hw?

hoary moat
#

probably

twilit talon
#

u never tested?

hoary moat
#

I did test

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but idk where it gets to

twilit talon
#

ah right because gpu

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it assumes you're windows 10 and that u can post the gpu back

hoary moat
#

I will make it reboot after wake-from-suspend

hexed acorn
#

i think the charger notifications also take like 1 or 2 seconds on my laptop as well

carmine nacelle
#

with managram?

hexed acorn
#

although that's from plugging/unplugging it to seeing the status change in the taskbar in kde

twilit talon
#

did u test pmos?

hexed acorn
#

i am currently glued to factorio i will test both pmos and managarm in a moment

carmine nacelle
#

on my old laptop it would not update untill battery dipped by 1%

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in linux

twilit talon
#

probably because of a timer to re-read _BIF

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but no actual notifications

carmine nacelle
#

I think it was not recieving events

twilit talon
#

yeah thats basically what i said

carmine nacelle
#

ah

hoary moat
hoary moat
twilit talon
#

who knows

#

probably XP

twilit talon
carmine nacelle
#

It'll be known for sure once uDRM becomes usable 🙂

#

Which Windows even added suspend?

twilit talon
#

suspend has existed since the inception of acpi

carmine nacelle
#

So like 98?

twilit talon
#

somewhere in the 90s

carmine nacelle
#

ACPI was first published in 96 according to wikipedia

twilit talon
#

yeah

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back then it was APM or whatever

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shitty bios helpers

hoary moat
twilit talon
#

on real hw?

hoary moat
#

Yes

twilit talon
#

damn obos cooking

carmine nacelle
#

On my old motherboard, Windows could not be able to wake sometimes

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And it would clear bios

twilit talon
#

lmao

carmine nacelle
#

b450

hoary moat
carmine nacelle
#

So not even that old and exotic

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Anyway

#

How do I implement working set nooo

carmine nacelle
#

I've read it

hoary moat
#

Then you have list

#

Of pages you need to have swapped in to run a program efficiently

#

Search pager replacement algorithm for info on how to do that

#

*page

carmine nacelle
#

I want to use it for disk caching

hoary moat
#

Uh ok

carmine nacelle
#

But idk if the same principle would apply

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And just have all disks be virtually mapped into the kernel

hoary moat
carmine nacelle
#

And then the algorithm could efficiently page everything in and out

hoary moat
#

You're tryna make a page cache it seems, there are probably better eays

#

*ways

carmine nacelle
#

yeah

hoary moat
mellow sleet
carmine nacelle
#

But like not mapped mapped

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Idk

#

Be represented by memory objects

#

For which I use hash tables

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of struct page

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So like I could avoid IPC costs

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By having all the cache be managed by the kernel

hexed acorn
#

power button works in pmos on my laptop

carmine nacelle
#

Did it turn off?

hexed acorn
#

yes

carmine nacelle
#

@twilit talon

hexed acorn
#

said itll turn off in 3 seconds, and then it did

twilit talon
#

bro thats a huge win

#

so many things have to go right for that power press to reach the handler

carmine nacelle
#

And we have different platforms I think

twilit talon
#

for AC and stuff like that

hexed acorn
#

i fucking hate the discord mobile app

#

how can you make something that sucks so bad

#

anyway, ec events work as well, tried brightness up/down and ac plugging in and unplugging (and yeah there is like a 1s delay there)

#

brightness up/down only works once though, then no more notifies happen

twilit talon
#

very cool

twilit talon
#

same for sleep button

#

there's a timeout there after which it should start working again

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probably

hexed acorn
#

also there is an invalid arg error while running some aml method

carmine nacelle
#

my laptop spams it

hexed acorn
#

ig it's trying to read from the ec opregion before it's been set up?

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or the ec io rather

twilit talon
#

@carmine nacelle your ec_read returns UACPI_INVALID_ARGUMENT?

carmine nacelle
#

It could be

#

I copied it from managram

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And it was checking read and write and returning invalid if none match

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I need to add printfs I'd suppose

hexed acorn
#

welp now to write managarm to the usb stick instead

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also your iso does work if i just write it to the usb stick

twilit talon
carmine nacelle
#

Found EC device at and before discovering GPIO is during its initialization

#

I have ```C
if (!device->initialized) {
return UACPI_STATUS_INVALID_ARGUMENT;
}

twilit talon
#

lol

#

no that aint gonna work

#
        uacpi_status result = uacpi_install_address_space_handler(
            address_space_node, UACPI_ADDRESS_SPACE_EMBEDDED_CONTROLLER,
            handle_ec_region, device);
#

initialized must be set to true here

#

before this call

#

as u can see qookies laptop accesses it right there during _REG

#

so u must be ready at this point

carmine nacelle
#

I think I can just remove that check

twilit talon
#

no no

#

u should just move that installation down probably

#

no reason to do it before _GLK and _GPE check

twilit talon
#

@hexed acorn btw your laptop doesnt have an ECDT right?

carmine nacelle
hexed acorn
#
qookie@selenium ~ λ ls /sys/firmware/acpi/tables/E*
ls: cannot access '/sys/firmware/acpi/tables/E*': No such file or directory
twilit talon
#

yeah

twilit talon
#

they're all intel tho

carmine nacelle
#

Mine are all AMD

twilit talon
#

lmao

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i dont have a single amd cpu in my home

#

besides ps5 and steamdeck

hoary moat
carmine nacelle
twilit talon
#

it is yeah

#

it should have super fast s3 suspend

#

maybe i should test obos on it

hoary moat
#

Good idea

carmine nacelle
#

Does it suspend to s3?

hoary moat
#

Yes

carmine nacelle
#

Since uACPI is already a good pthread test galaxybrain

#

I think I know why battery events could be so slow

hoary moat
#

definitely should

#

(daily obos shilling complete)

carmine nacelle
#

Is i2c hard to implement?

#

My laptop has everything connected over it, by the looks of things

twilit talon
#

its a very very simple protocol

carmine nacelle
#

I know, but how are its controllers?

#

Also, ACPI talks about smbus

twilit talon
#

the problem is its not very documented

#

i think

twilit talon
#

for very specific hw maybe

carmine nacelle
#

So they are separate things

twilit talon
#

what is?

#

Well they're discoverable only via ACPI

#

the hid devices

carmine nacelle
#

Smbus and i2c

twilit talon
#

SMbus is the i2c controller

#

its just taht aml doesnt talk to it directly usually

carmine nacelle
#

But AMDI0010 for example

twilit talon
twilit talon
#

one of these

#

looks like a tiny driver as well

#

And yeah your touchpad is under one of these:

Scope (_SB.I2CB)
{
    Device (TPNL)
    {
        Name (_HID, "GXTP7936")  // _HID: Hardware ID
        Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */)  // _CID: Compatible ID
#
Scope (_SB.I2CA)
{
    Device (TPD0)
    {
        Name (_HID, "XXXX0000")  // _HID: Hardware ID
        Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */)  // _CID: Compatible ID
#

or i guess touch panel and touch pad

#

is it a touch screen laptop?

#

anyway yeah a lot of HID devices via i2c

carmine nacelle
#

I have another one

#

Which also has an accelerometer and a bunch of stuff

#

And a pen support

#

Anyways, I think I'm motivated enough to work on page cache

#

So I can finally have a disk driver

#

Or maybe I can implement kernel threads Thonk

#

(for the disk stuff)

twilit talon
#

why does that need kernel threads?

carmine nacelle
#

To flush the cache

#

Linux uses threads

twilit talon
#

but you're a microkernel

#

u can have page cache in userspace

carmine nacelle
#

I want to put cache in kernel

#

Idk how I would have that in userspace

twilit talon
#

page_cache_server

#

all file mmap requests go through it

carmine nacelle
#

They would already go through a server

#

But, the kernel has memory objects and is in charge of virtual memory management

#

Partially I guess

twilit talon
#

your server can give back the shared mapping to the process that it owns

carmine nacelle
#

So it would be quick to just add a few queues and keep track of cache there

twilit talon
#

every page fault would be handled by it by paging stuff from disk

carmine nacelle
#

I need to think about it

#

I haven't considered it

twilit talon
#

i just think its strange to have it in kernel if your disk drivers are in userspace

carmine nacelle
#

And I don't see yet how it can be done cleanly

twilit talon
#

userfaultfd + shared mappings

#

very easy to do cleanly

#

use SCM_RIGHTS to give it the shared mapping of the file, then the faults would be handled by either reusing an existing page from cache, or COWing it, or paging from disk into cache etc

#

u have userfaultfd right?

#

or similar

carmine nacelle
#

Kinda

#

Idk how userfaultd works

#

I mean I had it

#

1.5 years ago

twilit talon
carmine nacelle
#

Yes

#

I mean kinda

#

Yes but it's broken

twilit talon
#

just read this ig

twilit talon
# carmine nacelle Why

because you're gonna have to be talking to disk drivers in userspace, which kinda breaks the idea of a microkernel

#

its supposed to be abstracted away

carmine nacelle
carmine nacelle
#

It's page in and page out requests

#

But yeah, with write-protect flag I can make userspace track their page stuff

twilit talon
#

how do u know who to send them to

carmine nacelle
#

My memory objects (memory regions) have an IPC port (handle) link in them

#

Which stop the kernel from zero allocating memory, and pauses the thread and sends a message to the userspace handler untill the page fault is resolved

#

I had that since the beginning

#

That is easy

#

Now, how do I track dirty pages?

#

And like since the kernel does memory management, how does it flush caches when it runs out of memory and stuff

twilit talon
#

does every process handle their own page faults

carmine nacelle
#

No

#

Kernel handles them

#

Idk

#

I can link the code

carmine nacelle
#

It's optional

twilit talon
#

oh

carmine nacelle
#

Like you can have kernel give zeroed pages

#

Or you can have it ask userspace for pages

twilit talon
#

yeah idk still feels a bit backwards to make the kernel responsible for it

carmine nacelle
#

I mean to fill them

#

I kinda thought that what was mach doing

twilit talon
#

maybe, not sure

carmine nacelle
#

But then you have minix which manages page tables in userspace

twilit talon
#

lol

carmine nacelle
#

So like kernel has no say at all

#

Idk

#

I need to think about it

#

I can put it in userspace

twilit talon
#

yeah

carmine nacelle
#

Minus the

capability designating the task

#
      Change manager   Pager m_o_return    store_write

\ _________ (B) (A) (C) ________ (D) _______
S | / Default \ / \ / \ / \
W |<=>| Pager |<=>| Mach |==>| server |<=>| storeio |<=>
A | ___/ _/ _/ _/
P |
/

(A) The ?paging policy is implemented by Mach: servers just implement the mechanism.

(B) Once the kernel has selected a page that it would like to evict, it changes the manager from the server to the default pager. This way, if the server does not deallocate the page quickly enough, it cannot cause a denial of service: the kernel will just later double page it to swap (the default pager is part of the tcb).

(C) Mach then invokes memory_object_return method on the control object. The server is expected to save the page free it in a timely fashion. The server is not required to send a response to the kernel.

(D) The manager then transfers the data to the storeio server which eventually sends it to disk. The device driver consumes the memory doing the equivalent of a vm_deallocate.

#

But mach is a fat microkernel

twilit talon
#

im a bit skeptical about these complex designs now because ive seen the proxima os just come in and demolish the uacpi benchnmark without any of these things

carmine nacelle
#

It's not complex

#

Mach is complex for no reason, yes

twilit talon
#

but its single threaded ofc so perhaps doesnt mean anything

twilit talon
carmine nacelle
#

It was the slowest microkernel KEKW

twilit talon
#

lol

carmine nacelle
#

L4 was the fastest

#

But they have a very small kernel and just focus on doing IPC as fast as possible I think

twilit talon
#

just steal l4 designs then

carmine nacelle
#

But it doesn't matter

#

All microkernels are scheduling, IPC and memory management

#

Mach is 100k LoC (I think)

#

L4 is 10k LoC

carmine nacelle
twilit talon
#

how is it so tiny

#

hyper is bigger than that lmao

carmine nacelle
#

My kernel is 20k LoC

#

I think

twilit talon
#

uACPI is 26k 💀

carmine nacelle
#
misha@Yoga:~/pmos/kernel$ cloc .
     183 text files.
     183 unique files.
       6 files ignored.

github.com/AlDanial/cloc v 1.90  T=0.45 s (393.7 files/s, 79707.7 lines/s)
-------------------------------------------------------------------------------
Language                     files          blank        comment           code
-------------------------------------------------------------------------------
C++                             61           2702           2172          10193
C/C++ Header                    95           2064           4444           6079
C                                1            700           1938           3672
Assembly                        15            341            523           1101
CMake                            4             20              1             55
JSON                             1              0              0             18
make                             1              5              0             10
-------------------------------------------------------------------------------
SUM:                           178           5832           9078          21128
-------------------------------------------------------------------------------
twilit talon
#

do --vcs=git

carmine nacelle
#

(dlmalloc is 4k LoC)

carmine nacelle
twilit talon
#

cloc . --vcs=git

hoary moat
twilit talon
#

works with two here

carmine nacelle
#

I've rm'd smoldtb

carmine nacelle
#

So I'm doing ok

#
misha@Yoga:~/pmos$ cloc . --vcs=git
     738 text files.
     732 unique files.
      65 files ignored.

github.com/AlDanial/cloc v 1.90  T=1.17 s (587.6 files/s, 102243.9 lines/s)
-------------------------------------------------------------------------------
Language                     files          blank        comment           code
-------------------------------------------------------------------------------
C                              233           5923           9078          28607
C/C++ Header                   287           5116          12463          17302
diff                             3            103            417          14857
C++                             75           3321           2393          13312
Assembly                        45            703           1396           2206
make                            23            306             91            766
JSON                             3              0              0            241
Markdown                         4             80              0            227
CMake                           10             68             14            150
YAML                             1              1              0             43
Go                               1              2              0             12
-------------------------------------------------------------------------------
SUM:                           685          15623          25852          77723
-------------------------------------------------------------------------------
#

Fun

#

Somehow I have more C than C++ floshed

#

I think it's pulling something in which should be a submodule

#

13k LoC of assembly is very sus

#

Oh and diff

#

Yeah it should be around 50k LoC

carmine nacelle
#

Process wants memory

#

It requests it from server, which tell the kernel "I'm gonna be managing addresses 0xAAAAAAA - 0xBBBBBBB of process X"

#

When the process (thread) page faults, the kernel stops it and asks the server to read the stuff from disk

#

When the kernel decides to evict the memory it gives the page back to disk driver, to write it onto disk...

#

It should be simple

hoary moat
carmine nacelle
#

And avoids gazillion task switches every time someone wants to read something from disk

carmine nacelle
#

I think I'll have two queues

hoary moat
#

This is what the working set is used for

#

Apply that knowledge here

carmine nacelle
#

Yes, and that's what I want to implement

#

But for page cache

#

In the end, it's almost the same thing

hoary moat
#

Here code example

carmine nacelle
#

But like then I can just say "move anonymous memory to this disk to swap out"

#

And I have swap

#

But your working set size if fixed

hoary moat
#

Note that you also have dirty and standby lists for swapping, and if you use the discord search feature you can find hyenasky explaining it

carmine nacelle
#

But I don't knwo if I understand it correctly

hoary moat
#

Hyenasky explains it decently I think

#

If not you can look into code, or ask people

carmine nacelle
#

Yeah I think the explanation is quite clear

#

What I want though, apart from that, is to have the kernel flush pages periodically, even when there's no memory pressure

#

Like what linux does

#

For mmaping files

hoary moat
#

I abstract that all in src/oboskrnl/mm/swap.c

carmine nacelle
hoary moat
#

Sounds like an idea you can do

#

You could probably even implement that easily by keeping the modified page writer always running

#

Or occasionally waking it

#

Like have a timer going for x seconds that wakes it

#

And hopefully that won't cause too much of a performance loss

carmine nacelle
#

I can run it in background as a kernel thread

#

But what infy was saying

#

Why am I putting it in kernel if I'm a microkernel

hoary moat
#

Idk where you'll put it

#

That's up to you

carmine nacelle
#

My argument is that it should be kept close to the paging stuff

hexed acorn
carmine nacelle
twilit talon
#

how so slow

carmine nacelle
#

I'm changing memory subsystem

#

Also it's using tcg

carmine nacelle
twilit talon
#

ah

#

dont fuck this up because I use pmos as an example when someone says "uacpi no workie"

dense carbon
twilit talon
#

Why is it so complex yet so slow

dense carbon
#

It is neither

#

now i'm on the computer so i can give this a proper treatment

carmine nacelle
#

Ok, I don't know the computer history I guess

#

Mach is older than me

dense carbon
#

mach consistently recorded favourable results performancewise (by 1986 already it outperformed 4.3BSD and that's why 4.4BSD imported the mach vmm)

carmine nacelle
dense carbon
#

speaking of VMM mach invented the TLB shootdown and the VM object, two concepts which are everywhere now

carmine nacelle
dense carbon
#

the entirety of the "slow mach" claim is some guy, a german guy i should point out, take of that what you will, trashtalked its IPC for being asynchronous and semantically rich while his own was not, so he compared the time it takes for a roundtrip on mach v.s. his own kernel, l3, and found mach wanting

#

and nowadays that claim is more based on transmission of trivia than anything else

carmine nacelle
#

So microkernels not (necessarely) slow?

dense carbon
#

at least it depends on how "slow" is meant

#

if you compared a perfectly optimal microkernel to a perfectly optimal monolithic kernel then probably you will observe a small performance differential in the monolithic's favour

#

since even in optimal form of each, IPC will never be so fast as simple syscalls

twilit talon
#

tight coupling in monolithic kernels allows for more reactive stuff, like nvme switching to poll mode dynamically depending on scheduler load etc

#

this is not practical in a microkernel

#

since all components are abstracted away from each other

#

there are a lot of "hacks" you can do in a monolithic kernel that are relatively simple to reduce latency and stuff

#

in a microkernel this would require a lot of work and thought

dense carbon
#

even so i think that there is a lack of imagination here

#

actually i thought from the start of this conversation about there being certain difficulties (but not insurmountable obstacles) in providing the kind of responsiveness in microkernels that is more obvious in monolithic kernels

#

like your page cache server idea, it drives a hard bargain, how would it participate in the page replacement policy? the easier and more traditional approach is that the microkernel does that policy and delegates to pagers the mechanism of reading or writing back pages on demand

dense carbon
twilit talon
#

yeah i mean its definitely possible

#

just way way harder to do and get right

dense carbon
#

with respect to synchronisation it really is a bit of a challenge i think

#

file truncation on keyronex for example i am thinking about a lot lately, it is a bit of a hassle because i want to replicate the behaviour on a lot of unixes where (shared mapped) pages beyond the truncation point are thrown out of processes that mapped it (so if they try to access them, they get SIGBUS)

#

and that sounds deceptively easy but is more challenging to synchronise

#

first you need some kind of barrier after which you won't get A) any new read/write requests beyond the new limit, and B) any new mmap'ings of the file beyond the new limit, for instance, then you need to deal with all of the existing mappings

#

you need to keep a mind as well to the theoretically possible situation where you're short of memory but the only place you can reclaim it from is the very file you've locked so you can truncate it

#

and i did think about how much harder this stuff would be if i had a microkernel (or maybe it would be easier, maybe i am halfway along a needlessly complicated path and i can't see the straight path)

twilit talon
#

yeah sounds like a very fun puzzle to solve

carmine nacelle
#

I've also been thinking about that, but in terms of locks ordering

dense carbon
#

i spend probably 80% of my time thinking about keyronex thinking about that

twilit talon
carmine nacelle
#

I slapped locks on memory objects. It's kinda probably slow with a lot of cores, but solves all the problems

twilit talon
#

because your reward is: it works (sometimes when it wouldnt?)

vale hazel
#

js slap locks everywhere

carmine nacelle
#

Now, with memory object inheritance, the child object (chain) might want to request pages from the parent objects, and parent objects want to unmap the pages from child objects, what do I do with locks

dense carbon
#

that's why it bothers me so often

#

the easy thing is you just have a big kernel lock and a few condition variables for the long waits

dense carbon
carmine nacelle
carmine nacelle
dense carbon
#

what for?

carmine nacelle
#

So it can work as CoW for fork

carmine nacelle
#

And stuff like that

#

Forking? Just create two new objects that inherit from each other

dense carbon
#

that's one thing i dislike about mach, they had these memory object chains, and there is some use to them and they are probably more general

#

but i find it obtuse and problematic to deal with (freebsd needs something like a "garbage collector" to clear out no-longer needed objects within a chain)

carmine nacelle
dense carbon
#

i found the sunos solution of individually refcounted anon structures nicer

dense carbon
#

so that's what the new right arrow does

carmine nacelle
#

So that they can only be mapped once

#

And they can easily decay once the parent object only has one anonymous child object

dense carbon
carmine nacelle
#

I think that's what I have at the moment but I'm removing it and going to object chains meme

dense carbon
#

there might be some merit to object chains but i can't identify any personally

#

fuchsia ended up with them as well, but a big fuchsia guy complained it's problematic for them

#

(another "coincidental" resemblance of fuchsia to mach)

carmine nacelle
#

Like what happens if a process forks several times

#

In chain

dense carbon
carmine nacelle
#

But I can still do that with memory objects

#

Just having them be created horizontally

dense carbon
#

but the chain structure doesn't really match

carmine nacelle
#

Yeah

dense carbon
#

the individually-refcounted page is a more fit match

#

really what i would say is that fork is just a bit of a nightmare in general and while i like unix i don't much like fork

carmine nacelle
#

Oh, the problem is storage

#

Although maybe not really

#

It's implementation details (?)

#

At the moment my page struct can only pertain to one memory object, and has an intrusive list pointer, which allows it to be stored in objects

#

But I guess I can replace that with some other data structure, which would not be intrusive

dense carbon
carmine nacelle
#

Hmm

#

So like pages are still part of that object, but are referenced by many structs?

dense carbon
#

and there's a vm_amap which is comprised of a table of pointers to vm_anons (the vm_amap is a member of an anonymous vm object)

carmine nacelle
#

But then, what about swap

#

Thonk it would function exactly the same

dense carbon
# carmine nacelle But then, what about swap

the definition of a vm_anon from old keyronex (the one that could actually run xorg etc) might illustrate:

struct vm_anon {
    kmutex_t mutex;
    uintptr_t pfn_or_drumslot: 63, resident: 1;
    uint32_t refcnt;
};
vale hazel
#

who drums a lot/

#

im so confused

dense carbon
#

you must imagine an anon as having some of the responsibilities of a VM object (here viz. storing either a physical page pointer or a swap location)

dense carbon
vale hazel
dense carbon
vale hazel
#

and whats pfn

dense carbon
#

it's because historically drum meory was used to swap to

dense carbon
vale hazel
#

and i see vm anon is reference counted, why so?

#

is there like a particular reason for it or

dense carbon
carmine nacelle
#

Ok, I don't quite understand all of the aspects of it, but I need to think about it

#

I still want object chains for filesystems though, but I think that can be combined

carmine nacelle
dense carbon
carmine nacelle
#

Why not

#

Because of swap?

dense carbon
#

you need somewhere to store the refcnt when it's swapped out

#

in principle maybe you could have your swap allocator store this instead, i think it might work

carmine nacelle
#

Yeah, just store page struct like stuff there

dense carbon
#

possible lock ordering oddities because vm_anons are their own thing and can be referenced by multiple vm objects

carmine nacelle
#

And replace the pointer to page with that

#

Yeah that's gonna make swap very slow

#

Since I guess I will have to be iterating through all anon regions when swapping pages in and out

#

I wanted to say that I don't like extra memory allocations involved with this

#

But I think this is actually fine...

#

My Page is roughly ```C++
struct Page {
Page *next;
u64 offset;
size_t refcount;
PageType type = PageType::Free;
int flags = 0;
};

#

I think I won't even have to inflate it for this stuff

#

Ok I have to study so I'm gonna be quick and try to implement all of this till the end of today ultrameme

carmine nacelle
#

No

#

I started making changes to memory management yesterday after thinking about it for 3 monts

#

I want closure

dense carbon
#

else you'd have to do linux style scanning page tables for references to the page you want to outswap

carmine nacelle
#

There's something I don't get

#

And that's anonymous mappings

#

That would create a memory object

#

It would have amap attached to it

#

How do I avoid deduplication of zero pages?

#

Well, not the zero, but on the first page fault, it would allocate a page in the memory object, and then it would be copied to the amap

#

Now I have zero page inside the memory object, and another page inside the amap

#

Hmm

A special case of mapping is used for MAP_PRIVATE mmap()’s of a vnode

#

So if a mapping is anonymous, pages are moved instead of being copied?

carmine nacelle
#

Yes, but if I understand it correctly, you would have pages "stored" in memory objects, and then amap to hold the privately mapped modified pages

dense carbon
#

i don't understand your question

#

as best i can understand you're asking what happens if someone creates an anonymous VM object

#

and then maps it MAP_PRIVATE

#

and then they write to a page and it induces the creation first of a pageful of zeroes in the VM object that was mapped, then a second page privately

#

that's a very bizarre thing for someone to do

#

you can optimise that case explicitly if you want

carmine nacelle
dense carbon
#

not private

carmine nacelle
#

But then there's fork stuff, which has to clone it somehow

dense carbon
#

you make a new object

#

and increment the reference of every anon that the parent's object had

#

the object does not matter one bit in this, the anon alone matters

carmine nacelle
#

I don't get it then

dense carbon
#

it's very simple

carmine nacelle
#

Oh

#

No, still not

dense carbon
#

you have an anonymous VM object with an amap

#

you create it when you're asked to allocate some anonymous memory in a process

#

you map it shared

carmine nacelle
#

So amaps are unconditional?

#

I though that they were only needed for private mappings

dense carbon
#

when you fork, you create a new anonymous object for the child, and foreach parent object->amap entry, you ++ amap[i]->refcnt and you store parent amap[i] into child amap[i]

dense carbon
#

because really shared anonymous VM objects (tmpfs files for instance) never need to be subject to symmetric cow

carmine nacelle
#

What I wanted to do is to not clone memory objects at all when forking

dense carbon
#

only to asymmetric cow

carmine nacelle
dense carbon
carmine nacelle
#

When the mapping is private, the same object is mapped again, creating new amap

carmine nacelle
dense carbon
dense carbon
#

but note i say "shared" not "MAP_SHARED"

dense carbon
carmine nacelle
#

But I want to unify it into one mechanism

carmine nacelle
carmine nacelle
#

Then I don't even need anonymous objects (I think)

dense carbon
dense carbon
carmine nacelle
#

On shared mapping, I skip amaps and get pages from the objects directly

dense carbon
carmine nacelle
#

On private mappings of shared objects, I get pages from objects on reads, and copy them to amap on writes

dense carbon
#

at first i assumed (wrongly) that you really wanted to have everything be a VM object

carmine nacelle
carmine nacelle
#

Or was

#

So then I could have object chains for CoW

#

But yeah I think I can try to do this amap thing instead

dense carbon
#

you were the world's first man to want to replace clean simple amaps and anons with object chains

carmine nacelle
#

The're not clean and simple as I have them implemented at the moment

#

So I guess I should just refactor what I have so that the private copies could be shared

#

Although I can maybe just change my Page struct to count references for private mappings

#

No, there's swap problem again

#

Or maybe there isn't if I walk page tables...

carmine nacelle
#

Ok, I think I'll keep the system that I have at the moment

#

Which is similar in spirit to amaps

#

But I'll also keep what I did yesterday, which is having anonymous mappings have memory objects

#

Since that could provide fast physical -> virtual lookups

carmine nacelle
dense carbon
#

that's a list head in the page struct which points to a pv_entry struct stating in which vm map + which offset every page is mapped

#

however you can make an economy instead

#

by instead allocating, for every time you allocate a new region of private mmap'd anonymous memory, some struct describing what the offset is and a list of every process that pages belonging to this region could be in

#

and have your page structs point to that thing

carmine nacelle
dense carbon
#

however this alternative solution i propose above should work as well

carmine nacelle
#

With no edge cases

dense carbon
#

since while vm_anons are self-contained, they won't be found at arbitrary offsets - they don't move around

carmine nacelle
#

mremap?

dense carbon
#

strange api

carmine nacelle
#

Idk if I even want to support it though since that seems to be a Linux thing

carmine nacelle
#

I just remember I wanted to test uACPI

#

Fun, MacBook is refusing to boot limine with ventoy

#

(though I think the framebuffer was also broken without it)

#

Wtf macs don't have delete button??

#

I can't find the charger for the Asus netbook sadmeme

#

And spectre x360 is refusing to charge

carmine nacelle
vale hazel
carmine nacelle
#

Because
a. My IPC is slow (because of really bad implementation)
b. I think I'm mapping framebuffer as non-cacheable

vale hazel
#

easy

#

even i do that in nyaux

carmine nacelle
vale hazel
#

nice hair

carmine nacelle
#

Macbooks hace ECDT

#

Need to check with windows

#

Also I need to investigate what took it so long

#

But meh

#

I'm really hoping spectre x360 comes back to life

#

Do I need this?

vale hazel
#

dma

lunar orchid
left dew
carmine nacelle
#

Even disconnecting the battery doesn't make it turn on

#

Very sad

#

It was a cool laptop

twilit talon
carmine nacelle
lunar orchid
twilit talon
carmine nacelle
#

B550

twilit talon
carmine nacelle
#

"DMA controller" according to Windows

twilit talon
#

I think its the legacy isa one

carmine nacelle
#

Could be

twilit talon
carmine nacelle
carmine nacelle
twilit talon
#

and ec seems to work too

carmine nacelle
#

It works on everything I've tried so far

twilit talon
carmine nacelle
mellow sleet
#

do you have a ps2 driver

twilit talon
#

indeed

carmine nacelle
#

I did a year ago

twilit talon
#

thats where your stability will end LULW

carmine nacelle
#

Why

twilit talon
#

astral curse

carmine nacelle
#

My PS/2 controller was working

twilit talon
#

astral curse is ps2 driver breaks on every existing hw but your own

carmine nacelle
#

I had been polling it so it would work even with some lost interrupts KEKW

#

I have no idea why they were lost though

carmine nacelle
twilit talon
#

could be physical damage or bugged firmware

#

usually firmware masks this event so u cant retrigger it

#

its a fixed event in this case not an EC one right?

carmine nacelle
#

I think it's ec

twilit talon
#

then we can take a look at aml

carmine nacelle
#

Oh

#

It's fixed + EC

#

From logs

twilit talon
#

ah ok

#

never seen one that supports both

carmine nacelle
#

So it've gotten the event, then the fixed one

twilit talon
#

makes sense

carmine nacelle
#

Why

twilit talon
#

u enable both, u receive both

carmine nacelle
#

At the same time?

twilit talon
#

why wouldnt it be at the same time

carmine nacelle
#

Idk firmware should do something

twilit talon
#

u should disable the fixed one if ec is supported probably

#

or idk, see how linux decides

#

does your FADT even report fixed pwrb event support?

carmine nacelle
#

HP laptop has EC, but uses fixed interrupt

twilit talon
#

there's a fadt bit for that

#

i think u can decide based on that

#

Control Method Power Button (V1) : 1

#

this one

#

either way it shouldnt matter because u should have protection from that

#

i can also just spam this button as a user

carmine nacelle
#

Btw have you been able to try it on your PCs? meme

twilit talon
#

no but i should try

#

can u post the latest iso

carmine nacelle
#

#1236769772805554206 message

twilit talon
#

thanks

twilit talon
#

@carmine nacelle any way u can check kapi-improvements for regressions on some of your hw? I have removed all uacpi_kernel_raw_*

carmine nacelle
#

I can check that later

twilit talon
#

nice

carmine nacelle
#

today

#

I'm a bit busy atm

twilit talon
#

no rush

hoary moat
#

I can test it if you want

twilit talon
#

sure, u can remove the deleted api while at it as well

#

thx

hoary moat
#

np

twilit talon
#

I really need to find all the chargers from my laptops so i can test pmos on them (and obos as well ig)

hoary moat
#

boots on qemu

#

will test my laptop

twilit talon
#

shutdown and reboot is what mightve regressed so make sure that still works

hoary moat
#

k

#

inited on my laptop

twilit talon
carmine nacelle
#

I can explain how to compile pmOS meme

hoary moat
#

it doesn't shutdown

twilit talon
#

lmao

#

u sure its not an obos problem?

hoary moat
#

checking that rn

carmine nacelle
#

But like to test uACPI

twilit talon
#

ah

#

yeah

#

i dont have amd and stuff tho but yeah

hoary moat
#

luckily for you infy, it hangs in obos' code

twilit talon
#

lol

hoary moat
#

now it's my problem to find out why

twilit talon
#

does it hang in qemu as well?

hoary moat
#

nope

twilit talon
#

F

hoary moat
#

it hangs halting the other CPUs

#

except it broadcasts an NMI

#

so I suspect it's a bug in the handler

carmine nacelle
#

How did I come to have the (seemingly) most stable OS here?

hoary moat
#

-# I should probably find all times I said "Microkernel L" to you and replace them with "microkernel W"

twilit talon
#

skill unissue

hoary moat
#

I got it to reproduce with qemu

#

then gdb crashed

twilit talon
#

when your os is so stable it crashes gdb

hoary moat
twilit talon
#

raw read stuff is basically this now:

uacpi_status uacpi_system_io_read(
    uacpi_io_addr address, uacpi_u8 width, uacpi_u64 *out
)
{
    uacpi_status ret;
    uacpi_handle handle;

    ret = uacpi_kernel_io_map(address, width, &handle);
    if (uacpi_unlikely_error(ret))
        return ret;

    ret = uacpi_kernel_io_read(handle, 0, width, out);
    uacpi_kernel_io_unmap(handle);

    return ret;
}
#

similar for memory

carmine nacelle
#

I just use iopl so my io_map does nothing

#

So I don't think there would be a difference...

twilit talon
#

but u still have to ask the kernel to modify iopl no?

carmine nacelle
#

Yes, but it's a flag in rflags

twilit talon
#

ah lol

hoary moat
#

maybe the bug was a deadlock since I would halt other CPUs with a lock held

carmine nacelle
#

Which I just set unconditionally

twilit talon
#

anyway the idea is there shouldn't be any difference besides less API to implement

carmine nacelle
#

There's other mechanism which does allow you to allow individual ports

#

Which I might implement in the future

#

But what I have atm works so it's not a priority

twilit talon
#

tbh yeah

#

u should do that

hoary moat
#

@twilit talon it now hangs in uacpi

twilit talon
#

just implement this

hoary moat
#

rather that or it hangs in my kernel api

twilit talon
#

i can tell u which one it is meme

hoary moat
#

to make sure I didn't mess up

twilit talon
#

does it only hang on real hw or qemu as well

hoary moat
#

real hw

#

qemu worked

twilit talon
#

technically stuff changed in the PR should work the same way on QEMU and real hw

#

its a 1-byte write to one io port

#

what if u revert uacpi tho

hoary moat
#

lemme see

#

infy lucks out again

twilit talon
#

obos daily regression debugging

carmine nacelle
hoary moat
#

it hangs in prepare for sleep state

carmine nacelle
#

Haven't tested it myself

hoary moat
#

@carmine nacelle your stuff hangs on my laptop