#Nyaux
1 messages ยท Page 15 of 1
you can
it's because you're taking the address of a symbol you set in the ld script
right
i need both the kernel base and kernel bytes
which i will get
okay so limine gives me the base
which is a virtual address
and a physical address?
idfk
my old code is hard to read
not hard
okay i see
to do
then i map the hhdm
maybe first i should make a map function
okay i see a magic number here
im guessing this is to get the index to the next page table or page entry or whatever
right?
im guessing yea
okay i did something similar
i need to allocate a table
what the hellllll
wha
im confused, what needs to be aligned
the pointer
you are dereferencing
any code you just added
audit it
you can read unaligned memory with some functions in core::ptr
i do .offset
okay, that will be aligned
assuming original pointer is aligned
and the type is correct
its literarly a raw ptr to a u64
do you know what code causes that
im unsure
then start commenting out code
or adding prints
see where it dies
literally binary search
start putting prints everywhere
once you stop seeing new prints go back and add prints inside the functions
until you narrow it down to that one pointer dereference
least cursed rust code
true
start printing pointers
find out which pointer is unaligned
it really shouldn't be lol
okay
i would help if i could but im playing with friends rn so 
cant really build your kernel and do it myself rn
You wrote it wrong/hj
I know lol
how am i supposed to write it
lime im so confused
like*
the way I would write it would be something like this (assuming it's setup similarly to this)
but in your original implementation, you did not need the (**q) because you were derferencing a reference and then dereferencing the pointer, but rust would do the first dereference for you because it's a reference and references are safe to use, so it would only be necessary to write (*q)
well I'm not 100% sure how your implementation works so leaving None in q.next's place might be wrong, but I think I have some near identical code to what I wrote above in a linked list in my OS somewhere
also the way that you write rust in Allman style 
Isnโt box used for allocating things on the heap
Also
This still doesnโt explain why my kernel poops itself trying to map everything 
give it a diaper
bro ๐ญ
Not asking you to spoonfeed me ๐ญ๐ญ
I just wannna understand
what the fuck is going on
whoโs allman
Putting open braces on a new line from the function header / statement beginning
Like
void f()
{
instead of
void f() {
I like it too
W
what
what the fuck is going on
panics getting the memory map????
i didnt switch to the page table so what
what the fuck
commenting this out causes a triple fault
lovely
im STILL
not switching
to this page table
so like wtf
okay maybe its cause im blindly copying code from old nyaux without caring
ill just
make new code then whatever tf
so rust can stop being a meanie towards me
this better be worth it writing in rust
for all the "safety" features
do these addresses look aligned chat
they look aligned
yes they do
so what the fuck
wheres my all done over here print messages
what the fuck is going on
ummmm like
erm what the sigma
commenting out the map function
fixes the issue sooo
most be the map function right?
no???
uuuuuuumm
I don't know rust but from the error message maybe try using usize instead of isize
offset does not like usize
.offset
only takes in
isize for some fucking reason
help any big rust devs
what the fuck is going on
im dying

do you have the code on github
i will publish right now
unfortunately I won't be available at least for a few hours
so I can't take a look yet
okay thats perfectly fine
glad your even gonna take a look for me ๐ญ
my eyes alone cannot figure out the root cause of this issue, everything seems to be aligned
my guess is probs the rust compiler doing something i dont know thats weird
I'd bet you are trying to create a slice thats larger than isize::MAX
im not even
making a slice
๐ญ
and how am i supposed to fix that
.offset only takes isize
there is .add but it still can't be larger than isize max
Ill take a look at the code
okay
its inside limine rs when it tries to create the memory map entry slice but idk why is the count so large and I am not home rn so I can't really do any further debugging
what the fuckkk
so not my fault

eh it most likely is because its your kernel that contains the request where it gets the count from
what?
the count it uses is from the mmap response limine gives and I don't think its an issue with limine rs (and certainly not limine itself)
anyway you can take a look at the request and the response in gdb and see if they look sensible (well most likely the response doesn't because of the garbage count)
but its a static variable?
im not
modifying it
at all
like look at my pmm.rs code all i do is setup the pmm freelist with the memory map
its not even mutable
and it was only used once here
limine modifies it to include the response ptr
okay but i still dont get why theres gonna an issue at all
I am not sure either
will i open an issue on the limine-rs repo
I think i will
I still don't think its an issue with it
I can try to take a look when I get home in like 20min
lol
every kernel is cursed
based
just wait until you get race conditions or stack corruption
thats where the real fun starts
very fun sounds like
Totally did not experience stack corruption before when handling interrupts 
good shit
with old nyaux
but rust!
character development
yes
its safe!
now itโs rust !! Itโs safe !!!
no race conditions are possible!!!
indeed !!!!!
unsafe has entered the chat
rusts memory model is not ready for page tables being mangled
Iโm only doing it in rust for the build system tbh
crates are pretty nice to have
rahhhh
meson my beloved
no u
I like C and c++ kinda but honestly build system is a mess
no functions?
no fuck functions
leads to complexity
meson is the perfect mix between functional and declarative
why tf should you have functions
one thing I like about rust is being able to have inheritance like c++ but not like c++
itโs new to me cause I come from pure C so
traits are nice yeah
yea
to... encapsulate blocks of logic???
idk man theres a reason literally all other build systems have those
and meson is just
not good for anything except what the authors decided you want
which sucks
point being that you shouldn't have so much logic in your build system you need to encapsulate it
wtf are you doing that it required that much logic
anyways you guys should move this to #programming this is kinda hogging nyaux chat lol
you home yet?
idk like building two binaries?
with a bunch of settings that are shared
thats like literally enough to want to have functions
or how about idk like
symbol postprocessing?
that's all declarative
and can already be done easily in meson no need for functions for that
unless your logic isnt supported
that's fair ig
in which case you have to do ugly hacks
also
compiling bytecode
or just partial compiling in general
e.g. compile half the codebase -> do some analysis -> compile the rest
v8 does that with torque
they first build the torque compiler, compile all the torque code, build turbofan and torque generated code, run it, embed the results into the final binary
how is your logic not supported in this case it's literally just compiling something
what if you need to use a compile flag meson doesnt let you use?
(because it forces a contradictory one)
mlibc literally includes compiler search paths as part of its build system how much more do you need
etcetcetc
??? you can add arbitrary flags
but not remove them
and meson can and does pass some automatically with no way to disable it
other than MITM on the compiler invocation
like idk i would want a build system that like
lets me build how I want to build
not how the build system wants me to
yes Ill take a look now
okay great!
try muon, they seem less opinionated
they even provide you with functions
i'm now using rust
so
i might try zig's build system, it's apparantly pretty capable?
Did u spot anything
yes you are somehow zeroing the memory where the response is
and there was at least one bug in the pmm but that didn't fix it, you were doing for e in 0..=page_amount when it should be exclusive (or else you are going to be writing one page past the free region)
doc for write_bytes:
Invokes memset on the specified pointer, setting count * size_of::<T>() bytes of memory starting at self to val.
and you are doing that on an u64, I bet this is the bug that's causing it to get zeroed
you need to divide the count by 8 because you are using an u64
oh okay
4096 / 8
thank you for helping me with this qwinci as usual your very smart
also I'd make the pmm return usize or a wrapper struct instead of a pointer that you can't even access without first adding the hhdm offset
and then there is likely a lot of ub because you are dereferencing random memory addresses as a pointer without first writing anything to there (there is a .write method on pointers that can be used to create a new object in there)
i agree my fault
okay
i did that for every pointer i use
memsetting it before ANYTHING
at all
anyways i need to map the HHDM
how do i do that again
i forgot
not epic smart 1000iq
okay
so i need to go over the memory map
okay easy
pub fn new_inital()
{
let mut q = PageMap {
head: None,
rootpagetable: unsafe {PMM.alloc().unwrap()} as *mut u64,
};
unsafe {q.rootpagetable.write_bytes(0, 4096 / 8)};
let size_pages = unsafe {&THE_REAL as *const _ as usize} / 4096;
ADDR.get_response().unwrap().physical_base(), ADDR.get_response().unwrap().virtual_base());
for i in 0..=size_pages
{
// println!("mapping virt {:#x} to phys {:#x}", ADDR.get_response().unwrap().virtual_base() + (i * 4096) as u64, ADDR.get_response().unwrap().physical_base() + (i * 4096) as u64);
q.map(
ADDR.get_response().unwrap().virtual_base() + (i * 4096) as u64,
ADDR.get_response().unwrap().physical_base() + (i * 4096) as u64,
VMMFlags::KTPRESENT.bits() | VMMFlags::KTWRITEALLOWED.bits()).unwrap();
}
println!("mapped the kernel i supposeeee");
println!("um");
let entries = MEMMAP.get_response().unwrap().entries();
let mut hhdm_pages = 0;
for i in entries.iter()
{
match i.entry_type
{
EntryType::ACPI_NVS | EntryType::ACPI_RECLAIMABLE
| EntryType::USABLE | EntryType::BOOTLOADER_RECLAIMABLE
| EntryType::FRAMEBUFFER | EntryType::KERNEL_AND_MODULES =>
{
let page_amount = align_up(i.length as usize, 4096) / 4096;
for e in 0..page_amount
{
q.map(
HDDM_OFFSET.get_response().unwrap().offset() + (e * 4096),
(e * 4096),
VMMFlags::KTPRESENT.bits() | VMMFlags::KTWRITEALLOWED.bits()
).unwrap()
}
}
}
}
}
okay i think thats everything
switching to page map causing fault ๐
๐
not epic
i mapped everything in the hhdm
it should
work :c
did you map the framebuffer (starting at the base in the fb response)
entry type of framebuffer should map it?
oh what address do i map that to
or actually it is my bad
q.map(
HDDM_OFFSET.get_response().unwrap().offset() + (e * 4096) as u64,
i.base + (e * 4096) as u64,
VMMFlags::KTPRESENT.bits() | VMMFlags::KTWRITEALLOWED.bits()
).unwrap()
also fixed the function to where it uses i.base
still
faults sadly
whats the cr2
looks like you are trying to use something with its physical address
i only call this function
which puts the address into cr3
of the root page table
and what do you do after that
i know cr3 expects a PHYSICAL address
allocate something
just messing with the PMM
and using flanterm
i cannot debug the rip cause rust mangles symbols
i wish to disable that but i dont think i can globally disable that
RIP=ffffffff800108ad
rip is somewhere sane tho
at least objdump can demangle them with --demangle
with gdb you could get the backtrace
most be happening in flanterm i suspecttttt
okay sec
here
it happens when something writes something with memset
i cannot debug it as its one function
thats called MANY times
okay
it faults
i cannot
FIND THe damn
bug
๐ญ
doesnt matter if i switch to the pagemap or not
is your memset C standard compliant?
i dont know im using rust here
ask rust themselves
i am not sure rust provides that in a freestanding program?
it does
it does
also its not a problem with the memset, its a problem of using a physical address to access memory
yep
happening somewhere in the loop
for i in entries.iter()
{
match i.entry_type
{
EntryType::ACPI_NVS | EntryType::ACPI_RECLAIMABLE
| EntryType::USABLE | EntryType::BOOTLOADER_RECLAIMABLE
| EntryType::FRAMEBUFFER | EntryType::KERNEL_AND_MODULES =>
{
let page_amount = super::phys::align_up(i.length as usize, 4096) / 4096;
for e in 0..page_amount
{
q.map(
HDDM_OFFSET.get_response().unwrap().offset() + (e * 4096) as u64,
i.base + (e * 4096) as u64,
VMMFlags::KTPRESENT.bits() | VMMFlags::KTWRITEALLOWED.bits()
).unwrap()
}
}
_ => {
}
}
}
somewhere here
WAIT
just do -no-reboot -no-shutdown and then run it in gdb and you get the exact point where it faults
well that was the other bug
rust sucks!! It doesn't keep track of Page tables for you!!
lol
literally just take a look at the fucking gdb backtrace ๐
OH MY GOD
IM THE BIGGEST
FUCKING IDIOT
Iโm not home but I need to test the code
is there a way I can
Work on my os on my phone 
I mean termux would probably work but it might suck
I wish I had something like termux but I have an iphone ๐
Oh yeah I should setup jinx with the nyaux rewrite
Soon enough
I mean I have once compiled llvm on my phone and it didn't get that hot 
yeah tbh phones nowadays are more than capable
and it only took a few hours
fuckers are literally almost more powerful than most PCs
also have more ram than eg. chromebooks or whatever
can I at least edit my code and GitHub push it
Or something
Is there an app for that
github app :^)
My family forcing me to go with them to the water park I just wanna osdev
oh yeah sec
downloading GitHub now
guys I think we will have user mode within week trust
10000%
world record speed run
If I donโt fuck it up with my depression
bruh just enjoy the water park
you can always osdev when you're back home
But itโs against the rust style guide 
LESGOoooooooooooooooooooooooooo
LESGOOOOOOOOOOOOOOOOOOOOOOOOOOOOO
WWWWWWWW
WELL MORE OF PAGE TABLE MANAGER, I STILL NEED TO READD THE WHOLE REGION SHIT BUT IMA DO THAT RIGHT NOW AND THEN WE DO WHATEVER IS NEXT UHHHHHH UACPI INTERGRATION MAYBE @kind root ?
scheduler
to which we need the lapic timer
to which we need to configure the apic
to which we need
uacpi
so uacpi is probs after
just lemme readd all my vmm region shi
you can get (and should) get the LAPIC address from the MSR
and you can still parse ACPI tables yourself
to this day obos hasn't used uACPI to get any tables
because the kernel only uses the MADT
and that code was written long before uacpi was intergrated
and it works so I couldn't be bothered with changing it
wait wait wait
before anything
i dont have fucking slab allocation
shit
fuck shit pooper
okay lets do 2 things one at a time, slab allocation then the vmm region stuff
oh as well
i dont have an idt
๐
or serial
who needs serial :^)
serial is easy
my kernel didn't have it until 3-4 months after I started
im not ur kernel 
im gonna use the same implementation of <4096 byte allocations as i have in my own kernel
as i am lazy
and we need to get to userspace FAST
dam you do be speedrunning this
fr fr any% speedrun
Yes
best thread up to date
guess whos getting there ๐
nyaux will have userspace in it's first week while obos (current rewrite) is in it's 4th month and still has no userspace 
at least its stable now ig
nyaux will be far from stable most likely 
ig
Astral is pretty stable (until you increase the cpu count)
The cpu gets a new friend and becomes distracted and doesnt do stuff properly :(
OBOS is stable with 4 cpus
any amount above is untested, but will get slower
even if the core amount is native
(I have a bunch of giant spinlocks because I only implemented mutexes 2-3 weeks ago)
tlb shootdown issues?
do you know where the most contentation is
no idea
all I know is that there are ~82 spinlocks (based on find all) which are usually acquired at IRQL_DISPATCH
so a bunch of stuff in the kernel can't get preempted as much
causing other threads to get less execution time
the problem isn't the AMOUNT of spinlocks but how much they're contended
TODO:
the ever growing todo list 
56 todos in the source
amateur numbers
my life is 90% unfinished todos
noice
if (Kdbg_Paused)
{
asm("sti");
// TODO: Fix
Arch_LAPICSendEOI();
Kdbg_CallDebugExceptionHandler(frame, false);
asm("cli");
return;
}```
FIX WHAT
my guess would be the eoi
you once asked about it
when to send it
you probably meant this
fix, NOW ๐ก
some of those todos are related to userspace
(indirectly)
// TODO: Use a function that takes in a context.
OBOSS_GetPagePhysicalAddress((void*)curr->addr, &phys);```
for example that
userspace would be running in different "contexts"
and rn that function only supports getting the one for the current context
is that your heap allocator?
uhhh for pages bigger then 4096
yea
it maps a group of virtual addresses
to be contingious
and maps the apporite pages
and yea
once i get this done i will have working heap
yeah ucapi will destroy it
not again ๐ญ
nahh but i wouldnt be too worried
its the same implmentation from old nyaux
just written in rust this time
ah
im doing that to save time cause im not fucking around with heap shangains for 12 hours again ๐ญ ๐
someone should make a uHeap (not me because i suck at algorithm stuff)
true
not me
NOT ME that is NOT fun
also isn't that just liballoc
idk if liballoc is necessarily good
(mainly because I suck at memory safety)
literarly me
I need to speedrun obos mesa port
ahci is so simple i dont think you need a library for that
so I can be the first one with uGPU
lol
just like I was the first with uACPI
nay
no?
it was my third kernel
oberrow integrated uacpi even before it had opregions implemented
before infy joined the server
damn lol
like before it was supposed to be integrated
#1141057599584878645 message
he was also the first to even run it in kernel space
i didnt do it until way later
lol
I'm pretty sure it was because I thought, "I need acpi, and see this random guy on some discord server is implementing an interpreter that seems complete, might as well use it"
i barely even had helpers for anything at that point
it was like barebones interpreter
would you say lil was better at that time?
lemme find some old code
frigg 
my third kernel at one point entirely used uacpi private api
mainly because there was no public api
Lol
Yup
In my 1 year of developing boron I haven't implemented a serial driver
Just wasn't needed
yeah
noice!
I just throw everything I need at 0xe9
If I end up writing a serial driver itll be to hook it up to the tty stuff
i am close just needing to figure out how to properly do the inline asm cause i suck at rust inline asm
any rust experts know how to get this to work
i fucking suck at inline asm
basically what you do is:
ditch inline asm
make a new asm file
throw your asm in there
You speedrunning this shit again lmao
yes lmao
i need an idt once i have an idt i will put in lovely uacpi
we all love uacpi
dont we
uacpi is love, uacpi is life
real.
uacpi and limine
Donโt forget mlibc
of course.
yes

mlibc our beloved.
Honestly the best side project Managarm made
no operating system is complete without those three
Yes
I use hyper 
instead of limine
i also just squashed a mosquito that had my blood in it
you gave birth to a mosquito then killed it?
Drink it back then
Snort it
you shall be executed for treasonous acts
Rule 0: one shall use Limine, uACPI and mlibc

Anyone found with a hyper.cfg inside their image will be prosecuted
based
Yes
oh shit
my laptop is about to run out of charge

NOOOOO BUT I WANTED TO WORK ON THE IDT AS WELL TODAY
FUCK
u dont have electricity?
barely in the shitty hotel Iโm at
alright so as i remember with the IDT i need isrs
problem
i dont know how im gonna implment the same array of function pointers i did in nyaux in rust
im kinda screwed
before anything tho
lets get my allocator working with rust
afaik these don't pair well so good luck
i know
the same way as in c?
well idk what exactly do you mean by that
but you can have an array of function pointers
how does that look like
struct Whatever {
arr: [extern "C" fn(a: i32, b: i32); 10]
}
do i have to do that with the interrupt frame struct as well?
for it to work well with assmebly
yes

well it depends on how you use it, if its not used in any asm then it doesn't matter (for an example how I do it in my kernel is that there is only one central irq handling function that the asm calls with the frame + number that then dispatches it further)
that would be smarter
the reason why I did it like that is mostly because irq handler fns need to store an arbitrary amount of state (well at max like 16 bytes iirc) so they can be lambdas
common rust L probably
.as_ref()
also
jesus christ
have you heard of rustfmt
whats rustfmt
its like the code formatter for rust
everyone uses it and its part of the toolchain etc
please for the love of god run it
also imagine static mut lol
why not
and imagine using the alloc crate
im not?
unsafe!!!1111111
whats GlobalAlloc from then
from core?
ah
implmenting it for rust?
still its L and cringe
done now we have heap i think
nah
but
the rust stdlib allocation primitives are bad
for kernel stuff
The idt is one of the first things Id do
and like not regular userspace stuff in general
so what am i supposed to do
write your own ones?
and also https://docs.rs/heapless is godsent
static friendly data structures that donโt require dynamic memory allocation
same
I dont like how its common for rust that u just shove 99999 crates into your project by default
Reminds me of js
yeah true
But ig im just not used to that mentality
but also heapless is just very useful
and like i COULD write my own on-stack vectors
but like
why
Depends if you want to do that or not
Fair
is there a way
to check
if an interrupt is an exception
instead of
having a billion asm stubs
he probably means if it has an error code
just have a macro to generate the asm stub and then an if inside the macro that checks if the number is one of the few ones that push a code
Bro never heard of macros
or you can use normal rust at const???
U dont write them in rust
i know
use nasm
rust inline asm is fine, you just have to use gas directives with intel syntax (and you can have it in separate files using global_asm!(include_str!("myfile.asm"))
or again
i dont know gas directives
use rust macros to construct your stubs
okay i get it ๐ญ
OR RUSTS FUCKING MACRO SYSTEM
OR THEIR COMPILE TIME EVALUATION SYSTEM ARGGHH
sorry
chill ๐ญ
Like if you're doing rust at least do shit in an idiomatic way
yeah
yeah
proposal: ditch rust, embrace C
Yup
you wanted memory safety, we had a tool for that
it was called not having skill issue
(and also kasan)
((kasan has saved my ass on multiple occasions))
yea
thats why im using it
not cause of "memory safety"
thats called skill issue
because we all know thats bullshit
yea
though the rust semantics are massively opaque
Why are you using it?
also might be a good idea to first learn how to do that in userspace before writing a kernel :p
they are so much worse than c/c++
Well that's nyauxmaster
generics, impl blocks, build system is nice fresh air
Hes known to speedrun shit
thats me
ill figure out getting nasm to link anyway with the binary
theres of course a nasm crate that does that for you btw
real?
yes lmfao
wtf
its rust
yall never told me this
theres always a crate for everything
yeah because youre using rust so i assumed you knew you could copypaste a crate for it lol
Is there a kernel crate
its called x86_64 not kernel but yes
Lmao
bru ๐ญ
Just import that
oh god
ah yes
that crate is so skill issued
that group of rust osdev people are actually just
no
no in the worst way possible
Well their acpi crate fucking sucks so I expected as much
import kernel
Recursive and half of the opcodes are incomplete
its like maximally handholding
oh yeah its like cosmos
lmao
basically
Lol
well its not that high level
but its quite close
they have come up with the stupidest abstraction ever
PhysAddr and VirtAddr
god
that shit is like cancer
its just bad
Lol
eh I don't think having wrappers for different address types is unreasonable
counterpoint
though ofc you could just use plain usize or whatever but I actually kinda like having a wrapper struct over it
you have a pointer type for pointers???
and a phys one is fine
but also like
userspace virt addrs are a thing too
which has other advantages
well yeah for kernel ones it doesn't have that much sense, except maybe in like paging code or whatever
for userspace ones it would be useful because then you can have all your safe load/store methods on it
yeah but then
its (a) contextually obvious what the userspace thingies are
(b) you cant add things to their types
(c) this is a thing that can easily leak to your whole kernel BUT its in an arch-specific crate!
yeah just make your own if you want that
you kinda always want that tho?
you never want THEIR one
oh and also
they obviously have a handholdy pagetable wrapper
I meant that if you want to use a wrapper type in general 
so THEIR wrapper type is never useful
that kind of wrapper type COULD be useful tbf
yeah
probably need to tell it to do the asm thing
it doesnt help
What's with all the hate? (sorry for hijacking this thread) but I'm thinking of adding it to my OS (but may be it's a mistake so may be not)
You shouldn't
There are machines (I have one) where that is fake news
You're mixing up cpuid and msr no?
Hmm
Perhaps
I'm talking about that limine bug
(also, how did I miss linuxmaster coming back a week ago?)
because it's very rusty
@kind root would you not mind another OS using it?
The 32 bit support looks tempting
it's quite amazing
oh for christ's sake
I'm thinking I could support two protocols
what's even up with everyone wanting 32-bit support all of a sudden like holy shit
sure i will make 32-bit LBP okay?
I might port obos to x86 (protected mode) eventually
sounds painful but i can also get it to work
My friend has 2 Intel atom laptops which are 32 bits only
Find all and Replace: uint64_t -> uintptr_t
idk why you couldn't just use multiboot2 on 32-bit but god knows
And he expressed interest in participating in osdev if we can make my os work there
Tbh I could
But limine loads SMP
Ultra does higher half 32 bit so a lot more convenient
fyi the ultra protocol (used by hyper) doesn't do SMP
Sure 
And with multiboot you have to jump through hoops
does ultra just not map any usable memory on 32-bit or how does the memory map look?
It only maps 1gb
It maps the lower gig
what about mmio
What about it
Why do you need a memory map for it?
Nope
hyper doesn't do any sort of special mapping
Its provided as physical_address
or even any hardware init
Well A20
that's not hardware is it
Sorta
it's hardware
In my kernel I don't use direct mappings of any sorts
my kernel didn't map the framebuffer as WT until very recently
maybe a bit after I was done the VMM
you must mean WC
yeah WC
mb
mix them up in my head often
when the kernel is mapped in hyper, you don't get any sort of prot bits set, just RWE
so if you don't remap the kernel yourself, you'd need to
So I just get physical addresses from limine responses and map stuff to wherever my vmm decides to, and with hyper I don't think I'll have to change anything much
how do you allocate the page tables your vmm uses
because there's this funny thing called recursive mapping
that is often (read always) used on IA-32 due to the constraints you're working with
Even if you did nothing would have to be changed
They're pretty similar protocols
At least on the base level
Temporary mappings
(after I switch to my own page tables)
do you just have those preallocated in the kernel binary?
No
I use HHDM before that
ok so that's kind of what i was getting at
it's a sort of chicken and egg problem, that's what the hhdm is mainly designed to solve
at least at the beginning
along with providing an easy way to output to the framebuffer from the beginning instead of having to bootstrap at the very least a primitive vmm to map the framebuffer
doing all that on massively constrained 4gib of address space is... well
not sure how it'd work
Oh, for vmm I have 16 list entries in the kernel binary, and I allocate more as needed
yes
that is one way of solving the chicken and egg problem
it would still mean you get no framebuffer until you can map it yourself, on 32-bit architectures at least
My framebuffer driver is in user space
also, the smp spin wait loops are in the hhdm too, so one would need to also figure out a way to handle those
So I don't get it until my kernel and few servers are initialized
Temporary mappings again
anyways read: it's kind of complicated to provide a fully featured 32-bit version of the Limine protocol
without sacrificing any feature
Yup, thats why I actually removed a few features when designing mine
Those are annoying with PAE
To make it more uniform
imho it's just not worth it
to trim features out of the Limine protocol to make a handicapped 32-bit version of it
HHDM is the issue
which is why my idea is that people would just use multiboot2 if they cared that much about 32-bit support
Yeah, maybe a separate limine version would be better
Not really because then u need an assembly stub and stuff thats annoying
Unless ur not planning to run in the top half
a tweaked multiboot2 with higher half support? :^)
Lol
I was solving it by booting into a (future Ring 3) server, which loaded kernel
Mb3 u mean 
ยฏ_(ใ)_/ยฏ
i mean isn't that basically what ultra on 32-bit is?
what else does it provide that mb2 (with smp and higher half) would not?
What's everyone's issue with GAS?
*a lot of people
my only issue with gas is when people don't call it through the compiler driver
Im not that good at mb2 to tell, but the way protocol works is still different , aka multiboot headers and stuff
Plus ultra has tons of extra features
To configure handoff state
like what
And like the mappings, whether lower half is mapped, or depth
It supports 32 bit with pae
Idk off the top of my head what mb2 does or doesn't have
But isnt limine multiboot with smp support as well then if u speak in those terms
I don't have an issue with gas itself but I do hate att syntax because its full of unnecessary annoying prefixes, non-obvious things like implicit memory accesses, cringe offset syntax and weird operand order than whats used literally everywhere else
what if i took Hyper and embeeded it into Limine
and then provided the Ultra protocol by just using Hyper
Limine subsystem for hyper
i'll do it if you make Hyper build with limine-efi instead of whatever you have now and using makefiles
so the build system can be more easily integrated
it'll basically just result in embedded Hyper EFI executables
to chainload
I have nothing tho, it just uses the clang target or the mingw gcc
the config can be generated on the fly and shoved in some EFI variable
But if u tell me how I could look into it
exactly that's the main issue, with limine-efi it will also build with gcc
limine-efi is literally just headers + a small relocation magic that allows an elf to turn into a PE
you can see in https://github.com/limine-bootloader/limine-efi-c-template that it's relatively easy to get working
Why are custom headers needed?
Iโll take a look, sure. I dont see why it would be a problem to add another target like that
as long as you use __attribute__((ms_abi)) for calls it's fine
for calls into UEFI i mean
Yeah I can just define that
if you don't have that in your EFI headers you should add it
it's basically that, then build however you want, as long as you compile in the .c and .S files from limine-efi (it doesn't matter where, they just need to be in), then if you do that, and link with the linker script provided by limine-efi, you can use objcopy binary to turn the elf into a pe
that would be based
and I would be able to dual boot obos and linux 
Yeah that should be trivial to add in
i promise i will do it if you do that (or add the option to do that)
i mean i could also do it downstream but it'd be easier if it was upstreamed
i'll just add it as another "submodule" in ./bootstrap and then build it as part of the limine build system and embed the resulting .EFI file into the limine binary
and then chainload it
if someone uses protocol: ultra
Ah I see
then i guess one would need to adapt the various config options you provide into limine config options for ultra
Ok nice ig