#Nyaux
1 messages ยท Page 2 of 1
how much memory should i allocate for the entire queue,
since like
they will be growing and shrinking
sizeof(queue)
and shi
okayyyy
so i setup a "thread" i guess to represent the kernel
okayyy
okay it worked as expected
i guess i have a "thread queue" now
@finite summit okay what should i do now ๐ญ
bruh this aint a scheduler
this just memcopies regs
it's spinup code, i guess
ideally spinup code should be separate from the scheduling algorithm
that said this is once again a purity argument just like yesterday and vmms vs not-a-vmm
i mean, this is more of a reasonable argument
at least it's not just semantics/definitions
that aint it
scheduling algorithm: raw maths, portable
spinup code: platform specific, not portable
yeah, i am talking about what will be there ;p
implement swtich_task
to make sure i understand, what is switch task's job. load the registers, switch the pagemap and jump to rip?
sorry if this sounds stupid โ ๏ธ
to switch task to the context provided
okay so load registers, switch pagemap, jump to rip
okay
yea
yeah
i assume when they say registers they meant more like GPRs and control registers
i really dont know what to do, is switch_task called when an interrupt happens? is this at least correct
it's just a function
you call it wherever you think it is appropriate to do so
which could be from a scheduler
which itself could be triggered by an interrupt
(this is how it is done in Vinix/Lyre)
okay then triggered from an interrupt
lets go
okay so for the sched interrupt i should probs have it without the pop instructions cause yea
or it doesnt rlly matter anyway
i dont know what im doing
๐
i rlly do not know how to implement a scheduler, i dont know how its supposed to be implemented
๐ญ
i think i may have a case of the big stupid
oberrow does each thread have its own stack?
indeed
so gotta have thread store the base and stack pointer for this stack
indeed
yea fair
as that's related to the context of the thread and not the thread itself
also you might want to consider storing the tid of the thread in thread_t
tid?
thread id
fair
okay so function switch_task will just get the next thread in the queue then switch_context will be an asm stub to load the context?
yea?
yeah
okay now i have to somehow get this struct from c into asm and use it, since im getting the address of the context struct into rdi i guess thats how ill access it
should i switch to the pagemap first?
doesn't really matter what order you do it in
I just do it in that order because I can just add rdi, size_of_member
and continue on with the next element
kk
this is gonna be painfully long
and what if i get to the instruction where i have to like
just mov rsp, rdi and popaq
okay
this should work then
i think
how can i like test this
i dont have the interrupt for a scheduler setup, how is this gonna like work with the isr stubs
im like rlly confused
@finite summit im gonna like eat u i swear (not sexual intent)
๐
the fact that i have to say that
shows how we have devolved as a society
ideally you should just pass the stack in every isr stub and have your scheduler one be a normal isr stub
what?
why
to show you code
this'll have to do
idk the drive is corrupted or some shit
even a fresh debian wont open
I'll fix it someday
ok back from shower
why do you need all those instructions after you call tho since your never rlly gonna run those instructions cause you'll do a context switch and switch to the next thread
those instructions will never be run
so why
are you having those instructions there anyway
uhhh yea
but like
it shouldnt execute lapic_eoi or the return instruction cause we do a context switch
It's probably there for completeness
and for some reason theres this function call AFTER it??
after we do the cpu_switch_context
in the sched_tick function
Then what probably happens is context switch just copies the regs
Into the rsp
Returns
Then it returns into intr timer handler
Which returns into the asm stub
Which returns into the new thread context
ur right
it just copies the registers into the frame
also my frame stores rsp and rbp so i dont think i need this cpu_stack_t struct
makes my life easier ig
๐
What if you want to free the thread stack
You'd need to keep the base and size somewhere in the thread context
okay fair
you should've sent that message one minute later
then they would've been an hour apart

im just in the hospital rn
so kinda hard to like
do stuff
when your getting your blood tested and ecg n' stuff
the ishowspeed incident of 2023
โ ๏ธ
mint suki more like mint coki which also means mint cookie so that comfirms that mintsuki is a mint cookie in real life
๐ฑ
mint chip
chippi chippi chapa chapa

im big brain chat
(not really)
this should be epic gamer
this should actually work now
but i need
a function to like
create threads
okay lets make a create_thread function or smthin
๐
lets go
๐ ->->->your mom
hmmm weirdddd
its page faulting at the if statment
and the rip of the current stack frame is the hcf function in main.c (which is what i do after sched_init)
i triggered the interrupt manually
in sched_init
okay fixed that but now its halting somewhere
oh so the instruction where i try to pop r15 causes it to go broken
okay so this is causing everything to go fkn'd up
dont know why
okay i fixed
but still triple faulting
probs gp'rd
MORE DEBUGIGGN!!!!
cr3 before switch, cr3 after switch
yea somethings wrong here
tf ๐ญ
oh wait no its valid
so if what im doing is valid
why is it triple faulting, this stack should be mapped????
oh wait
forgot to cast
to address
โ ๏ธ
still triple faults
!
can you show how you are pushing the registers/err+num too?
sure
isr_stub_32:
push 0 ; fake error code lmao
push rbp
push rax
push rbx
push rcx
push rdx
push rsi
push rdi
push r8
push r9
push r10
push r11
push r12
push r13
push r14
push r15
push 32
mov rax, 32
mov rdi, rsp ; put value of stack pointer into paramter 1 of c interrupt handler
mov rax, [idt_handlers + rax * 8]
call rax
mov rsp, rdi
add rsp, 8 ; skip int number
pop r15
pop r14
pop r13
pop r12
pop r11
pop r10
pop r9
pop r8
pop rdi
pop rsi
pop rdx
pop rcx
pop rbx
pop rax
pop rbp
add rsp, 8 ; skip fake error code
iretq
this is the stub
cpu registers look like this
wtf
rsp doesnt look valid
as you can see here the x86 processors (amd64) do not support push imm64, which you are trying to do with pushing the value 32. You are then trying to skip that 4 byte value by adding 8 bytes.
what?
oh
โ ๏ธ
wait
lemme fix this
push QWORD 32
okay
okayokay
i get u
still triple faulting tho
lemme see log
this time a general protection fault and OH MY GOD
WTF
WHY DO THE REGISTERS LOOK ALL FUCKED LIKE THAT
๐ญ
Let me write it better, with some extra research
okay
In hope someone else reads this, and improves instead of just stating it is wrong
yep
The issue: when using the instruction push 32
both NASM and FASM generate the same as push byte 32
which means they generate the values 0x64 0x20
What you may want to do is push qword 32
Unfortunately that is not possible on the amd64 instruction set.
From the image above you can see there is no push imm64 instruction.
On a side note:
NASM will simply continue to produce a push byte 32
FASM will produce a push dword 32
now. You are probably trying to get the number as a 64 bit value (uint64_t in the struct) and you are also trying to add 8 to the rsp, while assuming that the number is 64bit wide
wait
you may be right
i know how to fix this
please wait
I would also just write a macro in assembly to easily generate the push num push err and then jump to a common stub
so because i cant really push a 64 bit number
heres what ill do
im gonna make the interrupt number just an int
and add rsp, 4
can you show me your struct?
yea
struct StackFrame
{
uint64_t intnum, r15, r14, r13, r12, r11, r10, r9, r8;
uint64_t rdi, rsi, rdx, rcx, rbx, rax;
uint64_t rbp, error_code, rip, cs, rflags, rsp, ss;
} __attribute__ ((packed));
what it looks like currently now
u cant push a byte lol
it pushes the byte as a qword
so their code is right
im gonna decompile and see what the code looks like
misaligned pushes are not a thing
in 32 bit mode all pushes are 32 bits, in 64 bits - 64
upper bytes are zeroed
yea ur right
so WHATS CAUSING IT TO FKN THE STACK ๐ญ
it should just work
like what the actual fuck
why are you putting the value in rdi in rsp? Are you expecting it to be some value?
it should be rax
sorry
MFS
WE HAVE SCHEDULING
๐ฅณ
WE HAVE A SCHEDULER
WE HAVE A FUCKING WORKING SCHEDULER
CHAT
LETS FKN GOOOOOO
Do not be happy. You should still check for major bugs in your code
"Do not be happy" man let me just have this moment come on ๐ญ
are you doing this stub for each interrupt?
no just for this one
cause it returns value
which goes into rax
yea
is this the timer interrupt? Why do you want it to return a value?
this is the scheduler interrupt
sure "timer" interrupt
i need to return the stack frame
cause yea
to reload the registers
@finite summit omar guess who has scheduling
i do ๐
@kind root will i try and setup uacpi maybe now? 
i have a scheduler
i mean give it a try
it doesnt need a scheduler unless u want event which u dont at this point
i have a scheduler now so we can have event whatever that is
๐
events are things like power button presses etc
https://github.com/UltraOS/uACPI/blob/master/include/uacpi/kernel_api.h what things are required to be implmented
in order to init
and create the acpi namespace
also i dont have smp working yet and my scheduler doesnt support smp at the moment
Depends, try and find out
kk
lemme just test my scheduler
with 2 THREADS????
๐ฑ
2 kernel threads
what will happen chat
we have 2 threads working
probably everything but the irq things
i dont have io
i dont have disk drivers
and stuff
Bruh
Why would acpi need disk drivers
IDK
*I hope
it's a handle type thing
that is for port io on x86-64
read my kernel api code
I was bored... Contribute to oberrow/obos development by creating an account on GitHub.
yeah but port io is x86 only
acpi isn't x86 exclusive though
its just there for x86 pcs with acpi
No it isn't
Port io is a thing on all architectures
On some its done as mmio tho
Not a separate instruction
Run qemu-system-arm and do info pci
yes it does exist on architectures other than x86 but doesn't the architectures supported besides x86 don't have port io?
only mmio?
No
you're just making it more confusing man
Yes I was talking about that as well
which means its only available on x86 and other architectures with port io
No
question: why does uacpi need to talk to pci
aml can talk to pci
Aml often accesses PCI
ah of course
All power management and chipset specific stuff is there
what is mmio
memory mapped io
timer and scheduler
i have a scheduler
but it works wonders for simple schedulers
anyways if u want something new then go with acpi timers
"new"
new enough ig
I use HPET for calibrating the LAPIC timers
smp looks way too complex
i dont think my os will have smp
thats a feature!
!!!
๐ฑ
If you change your mind later youll have a lot of fun
why
how is smp fun
Fun as in you will have to redo a lot of things because they werent built with smp in minds
๐ญ
thats for
future me to deal with
๐
in my previous kernel
it took me weeks to fix all smp-related bugs
I recommend you at least code with SMP in mind
So you don't feel like shooting yourself if you ever change your mind
ummmm
read the readme my man
printf
?
these are for printf
i dont have printf
i have my own functions for logging sure
but i dont have the actual "printf" implemented
this is unrelated to printf
well it is and isnt
its the standard inttypes.h header that your compiler ships
you can just include that and copy this
i use gcc
these specifiers are used inside *printf* functions
yeah i meant more like its unrelated to his logging my bad
gcc ships inttypes.h u can just include that
it doesnt compile
that doesnt tell me anything
uhh
it doesnt think the include exists
pretty sure that's a freestanding header
i dont think so
who knows!
im sure it has zero correlation to these screenshots im posting
wheres his header
im looking for it
wait
found it
#define PRIx64 "x"
#define PRIX64 "X"
#define PRIu64 "u"
he does this which doesnt look correct tbh 
it should be "lx" "lX" and "lu" if using LP64
no this is what he defines it
LP64 is a data model
In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit central processing units (CPU) and arithmetic logic units (ALU) are those that are based on processor registers, address buses, or data buses of that size. A computer that uses such a processor is a 64-bit computer.
Fr...
yep
thats why its not freestanding
so plz stop using it
very smart decision by the standard
a classic
i mean, it specifically says in the readme
exports a minimal subset of libc helpers that uACPI utilizes. This should only be overriden if your kernel's standard library is fundumentally different from libc.
if you dont have inttypes.h u just override the header
which
src/ACPI/uACPI/include/uacpi/internal/utilities.h: In function 'uacpi_truncate_phys_addr_with_warn':
src/ACPI/uACPI/include/uacpi/internal/utilities.h:12:48: error: expected ')' before 'PRIX64'
12 | "truncating a physical address 0x%"PRIX64
| ^~~~~~
?
that's supposed to be using UACPI_PRIX64
lemme fix that real quick
no isolated builds so this never came up
1 second
meanwhile you could just #define PRIX64
ok git cloning
what
git cloning uacpi?
but i didnt update anything 
โ ๏ธ
git pull
ok git cloning
@kind root dont have strncmp or strcmp or strnlen or snprintf but compiler didnt complain about that?
weird
Wait until u get to linker
Ofc you do
Implement them
if i try ill probs make a shitty implementation
Steal from somewhere then
kk
There's an stb printf that oberrow implemented I think
nanopritnf
Or that
stole this strnlen from apple
size_t
strnlen(const char *s, size_t maxlen)
{
size_t len;
for (len = 0; len < maxlen; len++, s++) {
if (!*s)
break;
}
return (len);
}
๐
literarly
I doubt thats what they use but seems to work
I mean thats prob some default fallback
what is offsetof
Its offsetof
Just include stddef
Yay
just do this for every function ๐
add hhdm offset to phys address?
iodk
ok ez
can size be smaller then a page
This is a normal malloc
So almost always this will be a few tens of bytes
Sometimes a few pages
That should probably be handled by slab alloc instead but yeah
tried defining at top of file
compiler still complained
Do u know how C works?
yes
This define must be propagated to all of uACPI
So it must me defined by the compiler or at the top of that header
okay
If u just put it in that C file it only affects that
I mean it cant magically change all callsites right
okay i tried at the top of the kernel_api.h header
didnt work
What's the error?
I mean
It says kernel api header defined it as one parameter
U sure u put it in the right place?
yep at the very top
after pragma
once
wait no
now its compiled
compiling*
Huh
okay fixed the issue about UACPI_SIZED_FREES
what do i do
i dont have a timer
i dont have ticks
i dont have anything
Return some random constant number
46644
kk
Lmao
๐ญ
Did you actually believe it has some special meaning?
yes
384726 is known to cause segfaults
Just improvise
tf am i supposed to do i dont have a timer what am i gonna do
๐ญ
Stub out
i can?
Anything thats not null
For basic operations yes
That will be treated as out of memory
Lmao
Yes
That's because your kernel is too fast
return 1;?
Yes
Looks like you aren't compiling printf
yea the entire thing is the header
Read its manual
Yeah disable floats
bro
Yeah u implement it only in one file, not all of them
only here i did
Thats a header file
oh
Its copy pasted into every c file
give
@wicked loom remind us pls
use hpet
Project moved to: https://github.com/llvm/llvm-project - llvm-mirror/compiler-rt
I mean you could use libgcc
yummy
uhhh
Alternately tell gcc ur running on a cpu with popcnt
how do i tell gcc that
-march=nehalem I think
i got the library
IT COMPILED
Cool
Ask oberrow 
ok
Well it doesn't zero the memory in calloc sooo
OK then
Oberrow code is good for this
show
Same place u looked for pri
@finite summit
show what, allocator region init code
uACPI init code
k
but why mine specifically
just give it rsdp?
Its good and all in one place
Managarm is more scattered around
Yes
Apparently yes
Yee
Lets see
Lol
love that you didnt rename it from limine-c-template
yea i know crazy ๐คฏ
!!
Lol
okay now why is nano print shit
page faulting
hmst
chat what am i doing stupid (ive never used va_list)
Looks correct to me
vsnprintf
difference?
lol
Yup
raw memory helpers
โ ๏ธ
I'm off to bed but will check your progress tomorrow
Thx
np
sucessfully linking a library into an os kernel is a minor achievement in itself anyway
i know
but
soon
youll see

very descriptive and professional variable names we got here
uint64_t rsdp nah we got uint64_t shit
perfect fit to be a ms windows dev
Suggestion,
Info -> mrrp
Warn -> nyaa
Error -> kyaa
Panic -> x.x
hi chat im back
when i come home from my doctors appointment ill
get back to
setting up uacpi!
@kind root you love my os dont you!!!! because i use uacpi !!!!
YES YOUR RIGHT
!!!!!
I SHOULD DO THAT
@wintry ermine THAT WOULD BE SO KAWAII >.<
Haaai !! x3
x3
I'm nyot a catgirl for nyothing 
:3
okay i will now try to
intialize uacpi
will it explode
who knows
um
yea cause basically
im allocating pages
for very small sizes
what should i do @kind root , add another slab to my slab allocator to handle these sizes or ?
i will soon
uhhh
still running out of memory
i have these many slabs already
is there nothing i can do
@kind root
wtf do i do
it just
runs out of memory
How much memory do you have lol
And after 3 allocations u run out of memory?
somehow
wait
yea wtf
its happening in
calloc
oh
andddd
of course its my slab allocator
oh
here
slabs are full
tf is going on
some weird shit is going
on
wtf
theres something VERY
weird
going on
sometimes it page faults
sometimes it goes out of memory
sometimes it
just waits a while
THEN goes out of memory
wtf
i dont know whats going on
something VERY weird
the compiler is doing something
everytime i compile and change a few lines that SHOULDNT affect anything
i get different error
Welcome to oberrow hell
fuck
@finite summit is this what you were talking about
do i have to
redesign my entire
memory
management
for this shit
just
๐ญ
osdev do be like that sometimes ๐
SOMETIMES IT FAULTS HERE
SOMETIMES IT FAULTS THERE
SOMETIMES IT RUNS OUT OF MEMORY
its my fucking slab allocator
HAS
to be
is "node->flags = node" intended?
okay
node->flags = vmm_head = node
realize
you got:
node->flags =
vmm_head = node;
Lol
fixed but
still
that stupid
that stupid stupid stupid
slab allocator
FOR SOME REASON
You should add a register dump to your panic
tfw no head
hmmm
Your header is in the beggining of each page right
yea
I dont think you should be calculating how many objects fit in the slab by dividing the pagesize by the object size then
wdym
4096 / size
you need to account for the header when computing the amount of elements that fit
okay so (4096 / size) - sizeof(struct slab_header)
that better?
afaicu what you want is a slab_header at the start, then pairs of slab_entry and space for the object?
in which case size needs to include the slab_entry size
no
okay im stupid
bro you're 17 and writing an operating system, "stupid" doesn't come into it
my man
andy is 15
bro got xorg on his os
โ ๏ธ
so? there are people who are 70 who don't know how to use a mouse, cut yourself some slack
whats the correct way then
(4096 - sizeof(slab_header)) / (size + sizeof(slab_entry)) ?
use mine as reference i guess
also i use slab for allocations bigger than 1024 so it should be fine
i cant read c++ code very well
cant read zig very well either
okay at this point im gonna have to rewrite the entire slab allocator
this design is shit
i dont understand it cause this was made for my old os
which i just yoinked
so like
yk
You should read more about slabs to understand them and how to implement them
where can i
read more about them
I understood them from a chapter in a book I read but you can probably read the slab paper too
I dont have the link rn
Unix Internals: The New Frontiers
okay found
i might implement the SLUB allocator
the slub allocator looks fun
to implement
and im watching a great lecture
on it
.<
@kind root @finite summit yall think i should do it ? >.<
it would be so kawaii
wow mean
๐
i have the urge
to rewrite
the entire memory management system
cause everything rn is held up together with tape
โ ๏ธ
yes
!!!
:3
:3
actually
im not rewrting the slab allocator
i learned more about slabs to the point i think i can solve the issue
actually i think i may have a way
to instantly fix this
but it will
take a lot of memory
more slabs 
nvm
this is pain
this is hell
get me out of this hell
memory management hell
help me lord please
give me mercy
I HATE THIS I HATE THIS I HATE THIS I HATE THIS
GET ME OUT
LET ME OUT
LET ME OUT
LET ME OUT
LET ME OUT
Possible spam detected for user: linuxmaster2.0. Please contact a moderator to be unmuted.

okay so
everytime i try to implement a slab allocator i fail
like every fkn time, i tried doing from scratch but it just faulted
and i cant seem to fix it
just copy my allocator
no
yes
why would i copy your shit
MIT license
uhhhh
its c++ code anyway
C++ code that can be easily ported to C
