#uACPI - a portable and easy-to-integrate ACPI implementation
1 messages · Page 44 of 1
real->long mode any% speedrun
lol
Return a u20
Yes let's return not only an integer type that doesn't exist but also one that doesn't align to bytes 
Zig moment
DSP moment
u145
u6
PipelineC moment
This is promising
uACPI
1
if its not in a packed struct then zig uses the next representable size and adds the branching etc to implement the right semantics for the specified size so its fine
I know
Makes sense
Me when true()
next do S0ix states 
I'll let oberrow figure it out 
also good news i updated to uacpi 2.0 on imaginarium and it still compiles
That s cool
I have a laptop which (only) supports them
also good news I updated to uacpi 2.0 on BadgerOS like a month ago and BadgerOS is still useless 
what
So I will be first 
uacpi 2.0 didn't exist a month ago
uacpi 2.0 was released like a few days ago
Back to the future
is funni joke
2 days ago yeah
I'm currently running uacpi 467.0
wait 2.0
yes
man I really should stop doing stuf at 1am
because my brain melts
anyway sure I'll update to that soon™️
When more badgeros work
Probably later this week? I was a bit busy the last couple weeks.
Nice
Still staring at AHCI.
Gdb not good at real mode
also happy to report that i can fully delete my uacpi_libc.h now that 2.0 is out whee
That's nice
Bochs debugger is much nicer for this
But I need to fix PCI for uACPI init 
And I can't be bothered
Since ... I would need to implement a bunch of stuff because I don't have a shared mutex
F
F
Oberrow should at least send u patched seabios
what specifically is patched with this?
It fails to re enable ecam on the chipset
mhm
Since it tries to re enable it via ecam 
lmao
Through this I can see that I have a skill issue with gdt 
is there no way to see gdtr contents in gdb?
just do monitor info registers
Also instruction sizes
uacpi_status uacpi_set_waking_vector(
uacpi_phys_addr addr32, uacpi_phys_addr addr64
)
{
struct acpi_facs *facs = g_uacpi_rt_ctx.facs;
if (facs == UACPI_NULL)
return UACPI_STATUS_OK;
// ...
}
why does it return OK if there is no facs?
And I also confused left and right again 
shouldn't it be like unsupported or something?
@fiery turtle how does https://github.com/Khitiara/imaginarium/blob/main/src/krnl/hal/acpi/uacpi/LICENSE look to you?
idk if my wording is any good
the shims.zig file i exclude from the clause is the file of all my kernel-specific exports for the kernel api
I think I've reached protected mode?
(gdb is really confused)
(which is actually compat mode)
(why am I having so much skill issue with a simple asm trampoline?)
nice
tbh i was originally planning to make my uacpi zig bindings a separate repo or at least separate folder outside my kernel repo but the callbacks/kernel api proved more annoying than i wanted to deal with to make feel right
i think ive got some ideas though for making it a bit cleaner
the simplest is to just say let the kernel do its own uacpi_kernel shims and only provide type and api bindings and not anything for making the shims prettier but idk
Stole acpica interface iirc
Lgtm by im not a lawyer ofc
Nice
Yeah dunno
Is there a way to discover legacy PCI io port with uacpi?
Like so I don't have to hardcode 0xCF8
this is from your pc
Is there any spec for what crs to expect
dont think so, but it's a range of busses covered by this bus, range of io and memory it's able to handle for BARs, and resources that can be used for talking to it
It annoys me so much it's basically a guessing game with the crs
yeah thats kinda annoying
PCI FIRMWARE SPECIFICATION 
Btw
The address that a processor uses to access a device is not necessarily the same as the address stored
in the device’s BAR. The translation (_TRA, _TTP, and _TRS) information is not available to the
operating system until after the operating system brings up the ACPI interpreter. The operating
system must wait until after the ACPI interpreter is up to determine the address at the processor
side associated with the BAR registers configured by firmware
(for people who refuse to support ACPI)
What does this mean?
Before re-enabling a resource, the operating system must reprogram the BAR register using a value that falls within the range reported in the _CRS descriptor of the parent Host Bridge
(what if I implemented PCI hotplug in pmOS?
)
I have several PCs with thunderbolt/USB 4...
Which table is this?
I think I'll redo my PCI enumeration memes...
dsdt lol
which part?
Idk, all of it
if u enable memory decoding on a pci device, its bar must be configured to a range from _CRS
Hot-Plug Surprise Control
the BAR must also be configured within the window of its bridge (and that also applies recursively to the bridge window itself)
damn
pls gib proxima thread
Ikr
taking the heap for a spin
to make it possible to use the heap from interrupt handlers?
Most allocators don't allow it
thats the normal constraint that causes someone to turn a blocking mutex into a spinlock so im just guessing why they did that
Because if e.g. a thread has the spinlock and is interrupted, that interrupt cannot then also take the spinlock.
well
thats why you disable interrupts
when you hold spinlocks
its cooler to have everything possible be mutex guarded though and use worker threads if you need an interrupt to cause an access to something mutex-guarded
but for instance nonpaged pool in NT is guarded with a spinlock specifically so that interrupt handlers (DPCs technically but same thing for these purposes) can free blocks of memory
I've looked at Linux and FreeBSD and still have no idea how they discover 0xCF8/0xCFC
Like do I just assume it exists if there's no MCFG or _CBA?
zig object notation, but yeah :^)
speaking of zon i may look into splitting my zig uacpi bindings out into their own repo either today or tomorrow
wonder if theres a way to turn a subdirectory into a repo in git without losing history
probably not without altering it at the very least
i just want to keep the history of that directory
unless u are very strict about not touching kernel and zuacpi in the same commit
i am not strict about that no lol
git filter-branch
yoooo
either that or filter-repo, im not sure which and id have to look into the exact command to use but yeah
ive got filter-branch experience too lmao
albeit many years ago
I have no idea what filter-repo does but sounds cool
probably more of what you're looking for
they kinda split up filter-branch after the last time i used it
filter-repo is th other half of that split
oh wait no filter-repo isnt official
im stupid
its a third party addon command
i didnt realise it wasnt official because git officially recommends it lmao
[Keep vs. remove] Instead of just providing a way for users to easily remove selected paths, also provide flags for users to only keep certain paths. Sure, users could workaround this by specifying to remove all paths other than the ones they want to keep, but the need to specify all paths that ever existed in any version of the repository could sometimes be quite painful. For filter-branch, using pipelines like git ls-files | grep -v ... | xargs -r git rm might be a reasonable workaround but can get unwieldy and isn't as straightforward for users; plus those commands are often operating-system specific (can you spot the GNUism in the snippet I provided?).
yes you want filter-repo
yeah filter-branch kinda sucks
filter-repo just didnt exist last time i used filter-branch
Damn
We can put it under the uacpi org
If you wish that is
yeah im good for that
thinking MIT license for zuacpi, since thats the same as what uacpi proper does
That would be fitting indeed
but yeah ill look into filter-repo-ing it out of imaginarium once im done making cookies
Damn which cookies
I usually don't accept the cookies of websites
but these cookies I might
gluten free chocolate chip
Nice
(i have celiac so has to be gf)
@fiery turtle do you have dumps of AML with multiple host bridges?
thanks
looks like second bus _CRS just returns the bus range
this bus is covered by mcfg
if its present mcfg will probably cover all host bridges yeah
yeah
also
How would uACPI handle hotplug surprise events?
Wouldn't this need to be removing resources?
thats not how pcie hotplug works
also these resources are static, they just describe memory ranges you may use for BARs
PCIe hotunplug works by first notifying you, then you do the unplug work, and then let the system know the device may be removed by the user safely
if done via acpi u call the _EJ0 method
But what about something like thunderbolt
thats pcie
but user can just yank the cable out (?)
do u have a dump from that laptop or whatever
My lenovo laptop has USB 4
i imagine it works similar to usb?
And the macbook had firewire and thunderbolt
except different protocol that's much faster
yeah maybe its just usb, idk
but there's probably still a controller that manages all of that, no?
My old laptop with Thunderbolt 3 died so I can't take its dump 
even pci has to go through some other controller that translates usb->pci
(probably the usb4 controller)
USB 4 is a free version of Thunderbolt 3
or thunderbolt controller or whatever
so that controller is in charge of actually notifying you of a device disappearing
I think you can take old thunderbolt 3 devices and they should just work with USB 4
There's also cardbus
(I have a couple of laptops with that)
ok i really like filter-repo
this slaps
ok heres a question
should zuacpi handle the relevant c headers or no?
im leaning no
What does that mean?
zuacpi is a great name lol
should it bring in the freestanding C headers to make uacpi compile or should it rely on the consumer to bring in c headers
im leaning rely on the kernel
Yeah
yeah
or you could put this behind an option
like, if the kernel does have them it can tell zuacpi to fuck off
option is kinda where i was leaning but im not 100% sure overall
only downside is that they need to be fetched regardless, but oh well
does recursive build.zig.zon stuff work as expected?
if you fetch a zig package, does the build system also go through the fetched dep's zon file?
at least a readme mention would be nice ig
Btw, it there an equivalent of ACPI_BUS_NUMBER_RANGE in uACPI?
yes. also theres lazy deps in build zig zon too
that only get fetched if used
idk the details of how to use lazy deps tho
hm?
UACPI_RANGE_BUS
if u mean the resource type
I think so
just call get_current_resources and find out
alright @fiery turtle https://github.com/Khitiara/zuacpi
damn thats really cool
im happy to transfer over to the uacpi org and update the readme to match that if you want to do that now but otherwise i dont have the energy to do any more with this today
i need perms to create repos in the org at least long enough to do the transfer apparently
ill add a mention/link to the bindings to the uacpi repo readme 
thanks for your work, very cool
@fiery turtle add me too
as noted in the zuacpi readme its wip so theres functions missing but ill be swapping over imaginarium to use the zuacpi repo as a submodule when i next work on it and most of what youd need for simple stuff (no suspend or shutdown yet really but device/namespace stuff is there) is probably already bound in zuacpi
"You don’t have the permission to create public repositories on uACPI" 
huh
accept the invite first
did you accept the invite from your email or wherever it showed up?
oh beat me to it


UACPI bindings for Rust. Contribute to uACPI/uacpi-rs development by creating an account on GitHub.

only took a few months 
lol
*to move the repository
well types are mostly done like 95% looking at the edge cases and handler stuff
nice
rest is relatively easy
thats cool
rename to ruacpi
@left orbit do u want the org invite as well since you basically did uacpi-linux yourself?
"rest is relatively easy" famous last words 
and also monkuous for uacpi userspace work
for zuacpi:
- eval only for integers atm
- missing shutdown/power binding stuff
- resources arent finished yet or tested
- has shims for putting through an allocator for uacpi to use and implements alloc/free and logging kernel apis
- basically i can fully init uacpi complete with namespace enumeration and get enough to start working on basic drivers but not much more yet and the rest of the shims the kernel has to provide
@48cf
🤔
lmao
i was able to receive power button events and enumerate all devices with these zuacpi bits but didnt bother to actually do shut down with them
lol
that is most definitely not me on the picture
czapek face reveal

#polls message
lol
oh and i put my table types into zuacpi so you can have HPET, MADT, FADT, and MCFG tables typed
sounds good as a start
awesome
yeah its got the basics at least
shouldn't the table types be pulled from uacpi itself?
zuacpi is very much me adding bindings as i need them in imaginarium lol
the types are the same so it doesnt matter
im not using cImport
zig bindings for structs 
so its an extern struct either way
thanks for creating the zig bindings, i will probably never use them but their mere existance forces me to work on the rust bindings to be earlier finished than yours
you joke but @cImport can do that lol
@cImport is amazing
lol
truly one of the best features of zig
also zig translate-c
yeah thats a neat feature
i started the bindings by running translate-c on some of the first headers i needed and then refining that lol
thats probably a good way to do it
yeah it was a good staring point for sure
it didnt recognize the status as an enum though which was pain
its def not a perfect tool
but thats why im making proper bindings anyway
what did it think it was?
it set uacpi_status to be an alias for c_int and then made a bunch of consts for the numeric values
ah
probably because in C the enum is really just a weird integer type
yeah
i could really use : type for enums in a lot of places
but its super recent C
i didnt want to force that
gnu supported it as an extension, though idk about msvc
msvc does it too iirc
TCC doesnt tho 
good thing in rust you can "tag" enum values with integers and tell the enum to behave like a integer
bruh
me when <source>(1): error C2059: syntax error: ':'
and then use transmute on that, what could go wrong
embrace extinguish etc went wrong
zig has enums and tagged unions separately so it works out here too where it treats it as an int on the abi level
mfw you just commited at least 5 war crimes by writing 3 lines of rust code
sadly zig tagged unions arent c abi compatible because theres no standard for where to put the tag
but i can make an extern union for the things that go like that
it sucks there isnt an abi for automatic optimized struct layout
and do some actual nonsense too https://github.com/uACPI/zuacpi/blob/main/src/uacpi/resources.zig#L151-L187
i love comptime
i love zig war crimes
bruh
then you havent seen my transmute_copy on generic types to read/write them unaligned as byte arrays
and you learn to embrace it
i think that code is actually broken
lmao
zig comptime war crimes are fun
ill fix it when i actually try calling the resources functions lol
but yeah the idea is i can take the extern union and automatically generate at comptime the tagged union
and then use inline else to convert the two without having to serialize the field names to the binary
you can macro and ifdef around it
lol
ugly
wait for pitust to come up with a way to achieve this with the most cursed set of macros ever
lol
i mean enum E UACPI_IS(base) could work?
you can also just newtype uacpi_status to a struct
at the cost of breaking api
you mean the ones that broke msvc and clang on windows for me 
If we can decide on what our real hardware benchmark machine should be, I have found a aspect that should be considered. Newer Intel cpus tell you the tsc frequency, using such a machine removes discrepancies from inaccurate tsc calibration
true ig, although newer cpus allow you to have tsc scaling in VMs so u can set any frequency you want
also kvm reports it as well
But it would make the test more complex if you also have to compensate for tsc calibration or the hypervisor needs to trap cpuid calls and emulate those leafs or similar
true
Is this normal that bochs returns resources->entries[0].irq.num_irqs == 0 for all IRQs in uacpi_get_pci_routing_table?
show code
I think I've fixed it
(I was reading from 0xd00 instead of 0x3fc)
Though now, suspiciously, all interrupts point to GSI 9 and GSI 11??
hm, how is that related to rsources?
yeah thats where bochs routes pci irqs
It was reading from PCI ports to get the interrupt numbers
ah
thats nice
this was a literal trillion yrs ago but wrk pushlocks are literally identical to the reactos implementation - that isnt to say he literally looked at the wrk itself, that was just an observation i made at some point while looking at reactos pushlocks to figure out how to implement them myself
i got suspicious because of what you mentioned about the comments not understanding what the pushlocks were actually doing
but that could be just as much an effect of 1:1 decompilation without really getting what it was doing
Btw how's reactos new acpi coming along?
as opposed to literally copying code or something
maybe
ive been focusing on getting ready for CLT ill continue post march (28~ specifically)
Idk probably haiku
this is what im losing my mind over atm
last thing i need to do before clt
seems to work?
ah
damn, good luck
How do I wake up bochs from S3?
try pressing a key in the window
bochs window
i've studied proxima sources for a bit
pretty smart stuff
well the pre-split proxima
there is like 4 ways a power button can be routed
the simplest one aka the fixed event is just a callback from interrupt context
if u add support for embedded controllers then you just install a notify handler to a power button device
Notify() is how AML calls into a kernel
for the fixed event there's a uacpi_install_fixed_event_handler
the third way is a GPIO device, this is applicable to modern AMDs, works similarly to an EC
the fourth way is a generic event device, also similar idea, but needs a separate os driver as well
only applicable to embedded
and qemu on aarch64 i think
okay so what do I do lol
uacpi_install_fixed_event_handler
this will cover most hardware
well most desktops
and older laptops
and for covering all hardware I gotta do that plus GPIO device? whats a GPIO device
let's say this covers 60% of hardware
EC driver covers 30%
9% is GPIO
1% is GED
thats how id put it
okay life sucks is the takeaway
ec and gpio drivers are both like 200 loc of C
for a crappy version that will mostly work
if u want it fancy and async then maybe 1k loc
e.g. pmos supports all 4
well no it doesnt support the GED
but thats mostly for arm crap
@calm latch has a spec for AMD GPIO
It's in the AMD manual whatever
really?
ah
Linux source for it was not too insane
and this was on your amd laptop or pc?
thanks
on my laptop
ill give a look to what pmos does, the 60% setup should be easy
the primary sources were manual and linux
All my desktops have normal fixed events (I think)
Not even EC
thats nice
Btw, how does power button work on RISC-V in QEMU?
see the GED link I sent above
for EC-routed power buttons i have a short summary on the osdev wiki
exact same idea as gpio but simpler
yeah of course
qemu uses PNP0C0C yeah
nah
i dont think it even has a PNP0C0C
even if it does, its still routed as a fixed event
oh my bad, i thought PNP0C0C was for the fixed event
i misremembered
it's the device u hook up with a notify handler usually
issue of the skill
I’ve ported all of the sysdeps for uacpi @fiery turtle
Now I have to actually implement it
Should I init uacpi at the beginning of my kernels main function?
how does this thing work in the background, does it just call the handler from an ISR?
could it be the irq not firing?
I am checking if it is
last time i checked it was a no op
lol
okay it works now
I wasnt unmasking it in my lapics
I pagefault on return but thats details
you got me scared for a second
lol
a lot of kernels using uacpi do it because they dont have softirq or workqueue etc
does the return address or anything of the sort get passed in the uacpi handler context of the ISR
wdym? uacpi doesnt care about anything like that, it just reads a few regs and stuff
you know that you have a variable you gotta pass to the interrupt when called
the context thing
its just uacpi state
could not respecting that have to do with this misterious write to 0x30 that is pagefaulting me
nah
or wait
do u literally discard the context lol
that does fit the bill in not respecting it
lets say, the void
yeah the page fault to 0x30 could just be you trying to access a structure element in the handle
yeah it just retrieves some stuff from the ctx associated with that irq
yeah its probably that
how does linux handle power button events, I will need to expose this to userland somehow
does it just send a SIGPWR and userland picks the pieces?
no lol
the power button gets an object in sysfs or wahtever
then u can listen to it as if it was a keyboard
or w/e
lol
gobless evdev
Hi Infy sorry to bother but could you answer my question I asked earlier?
ah right
This one
i mean depends on you
see when other kernels do it
you probably want early table access so u can bootstrap stuff
Should I have like the idt and stuff initialized
yes
Okay
when you call uacpi_initialize your scheduler must be online
Okay so I could go memory, gdt, idt, tmpfs, sched uacpi?
You don't need FS
Oh okay
you need to initialize it after scheduling primitives are available but before you enumerate any buses
uacpi_kernel_mkdir 
it will also need memory management
and pci/port io access
and an allocator
so make sure all of that is available befoe calling uacpi_initialize and friends
Okay sounds good
Okay done
I’m going to spend hours on gdb and get back to you guys

Well now I’m having a great time
okay, after making an abomination, Ironclad now handles poweroff just fine passing it to userland as a signal, which then the init chooses to poweroff with
ill clean up the thing a bit and I am done
If it works it works
when uacpi JavaScript bindings? 
Cool, it's <200 LoC in Linux...
So it's like EC?
(from linux)
static irqreturn_t acpi_ged_irq_handler(int irq, void *data)
{
struct acpi_ged_event *event = data;
acpi_status acpi_ret;
acpi_ret = acpi_execute_simple_method(event->handle, NULL, event->gsi);
if (ACPI_FAILURE(acpi_ret))
dev_err_once(event->dev, "IRQ method execution failed\n");
return IRQ_HANDLED;
}
Maybe I'll write a driver for it
Btw, how does uACPI handle device hotplug?
ACPI based hotplug is not that useful
Implementing PCIe based hotplug probably makes more sense
I dont really have any data on that, but qemu recently switch to acpi hotplug by default because SHPC is racey and sucks
shpc is not pcie though
PCIe hotplug works fine
Probably
TIL ACPI has a hotplug mechanism?
Acpi is best for virtual environments
Yea
And you can actually use it on real hw on most modern boards
Acpi hotplug is nice because it doesnt have any sort of timeouts
You have to ack it or its denied
What's it used for?
devices can be marked as "not inserted" and that status can change (when it does you get a notify)
Anything, pci devices, ram sticks, cpus
yes?
- on virtual machines ;D
both cpu and ram hotplug has been a thing for a while
You get a notify, what do you do with it?
How does cpu hotplug work on severs
Re read status
I guess I'm thinking too much of real HW?
No
But devices will always be there?
In the namespace yes
insertion: scan the device and its children for devices whose _STA indicates they've been newly inserted (if you encounter enumerable buses like pci i'm pretty sure you're supposed to re-enumerate those too)
removal: same thing but for newly removed
Damn, I want to support CPU and RAM hotplug on BadgerOS now
Its trivial on qemu
any devices that need to end up in the namespace will be there from the beginning
For ram just read _CRS when its inserted
PCIe hotplug works on any thunderbolt controller though and also on many ports (they may not expose a physical button for hot plug / hot remove but there are expansion cards that do)
BadgerOS doesn't even need any big modifications to support that funnily enough.
NT had supported acpi hotplug since forever so idk if korona is right about it being vm only
For both cpus and ram
I'm not saying that acpi hotplug in general is VM only
Well and pci ofc
Well NT VMs exist too, it's not like windows only gets run on real hardware
But hot plugging ram or cpus is VM only
Why? Cant u insert ram sticks at runtime lol
Iirc there is ACPI hotplug for pci devices that also works on real hw
On server hw
No
Why?
Because the memory controller doesn't support it
Like all of them?
I'm not aware of any x86 machine that supports ram or cpu hotplug
AFAIK there exist some high-end expensive stuff that does actually allow for RAM hot plugging with real HW
Like the IBM Z mainframes for example
But i know that plenty machines (even intel consumer hw) support hotplug of pci devices
That's basically mandatory with the whole USB4 situation and its PCIe tunneling
Yes, afaik there are mainframes that support hot plug of RAM
But they obviously don't run acpi
No
Can QEMU also remove said RAM and CPUs again?
CPU hotplug on VMMs is useful, that's true
By calling _EJ0
I mean makes sense
Does acpi really support ram hotplug btw? How does it work?
You wouldn't want a CPU core suddenly poofing out of existence while it's still running
Why would you ever do this instead of virtio balloon?
The devices exist in the namespace from boot, but _STA returns 0. Then on hotplug u get a notify on that ram stick, re read _STA, then get its ranges via _CRS
Its a different idea
I'm not asking about hotplug in general, I'm asking: how can ram be represented in the namespace
Does that exist?
*that is marked as not present/inserted/whatever
Of course
I wonder if there are any devices doing ram offlining with acpi
Which pnp id is it?
PNP0A06
Thats what qemu uses I think
Official QEMU mirror. Please see https://www.qemu.org/contribute/ for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website. - qemu/qemu
Wait no its PNP0C80
Memory module
This one is just a generic resources container
I see. I didn't know that the namespace can represent memory
https://www.aliexpress.com/item/1005007468105944.html
i think i just found the most cursed device to test acpi on
Chinese acpi
🔥 hell yes
Wtf is ubundu
Maybe its saying that windows 11 supports them
How bad can it be?
-famous last words
I could test uACPI on a UEFI implementation that's compatible with my phone 
Managarm?
Keyronex
next time I'm doing shenanigans w/ my phone I might give it a try then
Ah
Does it actually support acpi in aarch64, or does it mostly rely on dts
it does support acpi iirc
i started work on UACPI_BAREBONES_MODE, only need to solve these now
it should compile only with this available
very nice
pog
what about a non interactive mode?
whats that?
every other subsystem besides tables is useless if you have no AML, so yeah
👍
but
this one has no allocation or thread safety
so there can be like a TABLES_ONLY_MODE that does feature allocation and mutexes
but nothing else
idk if it's as useful
not sure about a use case for that
there probably isnt
for what?
Ah
So a primitive table mode is definitely useful. For example, we'll use it in Managarm to detect CPUs in eir
= the prekernel
yeah, a primitive one can be used in bootloaders, pre-kernels, microkernels, etc
builtin drivers as well
That's useful because it allows to pre-allocate some data structures
a fully featured one, idk
Also, in the future we'll use SRAT for numa support etc
yeah
An advanced one sounds a bit useless, agree
although that would probably be parsed by managarm itself
yeah once we get tables-only mode i plan to make a pre-kernel for imaginarium
added some docs to uacpi_kernel_map
nice 👍
busd: info: successfully loaded 1 AML blob, 1705 ops in 3434ms (avg 496/s)
👍
how 💀
conditional breakpoints in uacpi's main loop
are you working on proxima 2.0?
yeah
nice
I see d at the end of bus 
bus daemon?
-O0 TCG? is that with qemu in debugging mode?
that sounds painful
including proxima 1.0! and it's running in userspace!
how tho
this is probably because as of right now the libc isn't capable of threading and thus does not bother doing locking
I've also just found a skill issue in my mutex, so maybe pmOS will be a bit faster
technically its illegal because no locking
cant wait for acpi.sys 
iirc i asked you a while ago if it'd be legal if a single-threaded userspace server (that inherently does not need to care about locking) does not lock
and you said yes
so by that standard this is legal
but it's a bit cheesy
also this doesn't use any cache-related cheats
this is the first run, nothing has been paged in yet, allocator cache is empty
whats the libc and allocator used?
plibc (proxima libc), which uses a stripped-down version of the allocator in hydrogen
are you planning on using it forever?
yes
well its fast
people are welcome to use it if they wanna go through the effort ig
but all the code assumes it runs on proxima
You could make it more portable
okay wtf i switched to uacpi's builtin uacpi_kernel_alloc_zeroed instead of mine that's aware of when something's already zeroed and the performance went up
Btw would you switch to bare bones mode for the kernel instead of own impl if I implemented it?
i guess the check's more expensive than actually zeroing
Huh lol
managarm could probably beat managarm's score by running uacpi in userspace as well
Probably
idk, i don't really want the kernel to have any outside deps and my acpi code is tiny so it's really not a maintenance burden
time for a third uACPI in userspace implementation 
Makes sense
like i'm pretty sure i have as many lines of table defs as actual logic in the acpi stuff
nah, it's too much work just for the meme
@gentle peak will you do suspend/resume?
i want to do so eventually but it's a really low priority
It's not hard if you have libc (which you do)
no, proxima would probably still be better optimized for this use case
It's hard in managarm world because a lot of stuff in the kernel uses it
i mean there aren't really any uacpi optimizations here
i cobbled together this kernel api impl in a few hours
Is the src for everything available btw?
well i haven't pushed busd yet but yeah
might take a while, i haven't implemented all the primitives necessary for the full kernel api impl and i'm not pushing until that's done
Luckily work stuff should be trivial in userspace
yeah especially single-threaded
Would you do it with an event loop?
probably
Yeah
I just create a pthread_create
i'll need an event loop anyway for ipc
How are you planning to do your IPC btw?
Would be cool if you make it with coroutines
So that e.g. uacpi sleep pauses instead of blocking
Only with c coroutines maybe (?)
makecontext stuff
two methods, which one is used depends on traffic type (message size, amount of traffic, etc)
- a unix socket like thing which can bidirectionally send/receive bytes and/or handles
- shared memory for submission & completion queues and futexes to notify either side of a new message
I mean qemu has it so proxima can too probably
As in, most qemu work is done in coroutines
Afaik stackless C++/Rust coroutines need all the code to be async, which uACPI isn't
Stackless sucks anyway
but this could be done, yeah
but at this point why not just use threads
Proxima fibers when
You can use userspace scheduler
Because threads are more expensive
Than fibers
And for stuff like busd u probably dont need threads
yeah threads are only for stuff that really needs high perf like the posix server
= basically managarm's design
But threads are also convenient and easy to use 
So are fibers lol except u dont get race conditions
is it? i haven't really looked at managarm's internals at all
Managarm has shared memory queues for kernel <-> userspace communication
and it has mostly single threaded drivers in userspace
I mean pmOS as well, everything is single threaded not parallel atm
Didnt u say u use pthreads
Lol
Like there is a single event loop in everything, and I just create threads when I feel like it
Ok, maybe it's only half true
My pipes server creates a thread per pipe
But my AHCI driver is using C++ coroutines
i wanted to see what the score would be like if i did the funny uacpi_state_reset thing, instead i got vmm whack a mole
Like a bug?
so many bugs
i should've expected this from something i wrote mostly between 2am and 4am
i should add more asserts
My IPC "ports" (message queues) have single receiver and are tied to a thread, and I haven't come up with a good abstraction to make stuff multithreaded
Asserts are good if you don't confuse them with ensure/panic 
Slippery slope 
the stuff that's used a lot is mostly bug free i'm pretty sure, but busd is the first time i'm creating more than like 10 vmm regions
so there's a lot of very untested code paths i'm hitting
Is it an rb tree?
avl tree yeah
Ah
Where does it die?
it dies while trying to initialize a new page for busd's allocator, for some reason it can't find the region it just created
i'm investigating rn
things like tree data structures etc. are like the one thing I consider important enough to test at the moment
Yep
I wonder why the old proxima was triple faulting on that pc
which pc
Oberrows pc
for my own sanity i'm just gonna assume he downloaded one of the march=native images
Lol
okay nvm it's definitely the tree code, the region's in the linked list but not in the tree
if you look for vmatree in the commit history of my current kernel, you will see like four or five commits just fixing bugs that I found by testing with randomly-generated test data from a Python script.
and even then, I managed to miss a bug
Yeah lol these self balancing trees are very easy to fuck up
Linux still has code to debug them and verify
it wasn't the self-balancing part that I messed up, though
rather
the auxiliary data I keep for fast free space lookup
yeah
Good thing they're easy to cover with tests in userspace
what do you do for that? rn i just keep a linked list alongside the tree and do first fit
it's not exactly easy to think in terms of invariants everywhere
well that's not good
I haven't actually managed to make a completely working one myself which is why I originally just rewrote the frigg rbtree to be iterative instead of recursive and in c, then later on for the c++ kernel I rewrote my c tree in c++
basically, for each node:
- store a prev_gap, the gap between this node and the previous node
- store max_prev_gap, the maximum value of prev_gap in this subtree
Damn, how did you make it iterative
Do u still have the code btw
hmm
sounds like a lot of extra edge cases lol
it's relatively easy to see how this permits O(log N) find a free area of size >=something
yeah. that's mainly why I wrote the testing code
however to find an area with >PAGE_SIZE alignment is still O(n^2)
I was pretty amazed at how simple old proxima was yet fast af
simple = fast usually
Like pmm and heap allocator were trivial yet fast
lines of code in the fast path is in many cases a great estimate for performance
(incl. iterations)
what was it that Einstein said now again? 
True
I have my own impl, tested by the kernel's insanity 
well it wasn't that hard as frigg mostly had stuff that could be tail call optimized so I basically just replaced them with while loops and setting the node when traversing up
Nice
that could probably be merged to upstream frigg
I tried to implement something like the relatively new Linux maple tree for virtual address space management, based on some blog post or something that described the datastructure.
I won't be going down that road again for a very long time.
Tbh it should have been iterative from the start
and yes I do have it in https://github.com/Qwinci/hzutils/blob/main/include/hz/rb_tree.hpp (and in https://github.com/Qwinci/crescent/blob/main_c/kernel/src/utils/rb_tree.c), there are some other optimizations that could be done like merging the color with the parent but I haven't bothered doing that
self balancing BSTs are magical
they are also a bit of a pain to implement
old proxima just used a plain old non-balancing bst for the vmm
but once you have them they're great yeah
copyright violation 
there was one time that, for a competitive programming problem, I implemented a multiplicative segment tree over matrices. (segment tree=poor man'scompetitive programmer's self-balancing BST)
But would be nice if you upstreamed iterative stuff
I did mention it in the commit I think, and I didn't copy paste it
but yeah ig
Initializing lawsuit... OK
My vmm uses splay trees 
Lol
lol
don't worry, but it would be nice to add a comment to indicate the origin of the code
I could add a mention about frigg at the top yeah
"Initializing <whatever>... OK" is basically osdev brainrot
what did it even originate from?
my favorite
Initializing prison sentence... SUCCESS
initializing gdt... ok
oh you mean who
no
i think lapfed
every osdev project ever showcased
that did not feature anything more impressive than a shitty ps2 keyboard driver
I should print that in my rewrite just for the meme
ow
basically because beginners print out stupid stuff like that and its funny
essential proxima code
how did it even exist without that
a slight problem for me... I initialize the GDT before any C++ code is even executed 💀
dont forget IDT
fake OS
have a ring buffer
that is flushed when logger is initialized
yes
but yeah, I should probably implement a printk ringbuffer
lol
limine provides one
to seem like a cool os
because limine's stack is in memory that i want to reclaim
Stage 1 GDT init... starting
own stack = I know what I get
and the stack used for the entry point stays used for the lifetime of the system because the entry thread becomes the idle thread
so i wasn't totally deranged for doing that
good to know
I also do that ```x86asm
.lcomm STACK, 0x8000, 16
.section .text
.globl _start
.def _start
.type 32
.endef
_start:
lea rsp, [rip + STACK + 0x8000 - 40]
mov rax, cr0
// clear EM
and rax, ~(1 << 2)
// set MP
or rax, 1 << 1
mov cr0, rax
// set OSXMMEXCPT and OSFXSR
mov rax, cr4
or rax, (1 << 10 | 1 << 9)
mov cr4, rax
jmp early_start
Quick question, how do I stop clang from optimizing entered_sleep away? 
asm volatile("" :: "m"(entered_sleep) : "memory");

