i was pretty sure i wasn't going to need any additional logic chips for the io decode unit
#OBOS (not vibecoded)
flint idol
but then i forgot i need to account for #IO/M being set to enable I/O space
but i had additional gates open on my NAND gate
uncut narwhal
nice
flint idol
does it make sense to tie the flash's #WR to the bus #WR, or should i just make the flash read only (by tying flash #WR high)
i don't think it would make sense
cuz u have to send a specific command sequence
to enable writing
but u can't initiate a read while u write
but again u could just go to RAM
uncut narwhal
yeah if its meant for like permanent stuff i wouldnt tie it in
flint idol
yeah
uncut narwhal
or tie it to some sort of io thing so that firmware/software can muck with it manually later
flint idol
or that
i'd need another latch for that (for an io register) and i can't afford that rn soo
uncut narwhal
stretch goals lol
uncut narwhal
kinda fucked is a fact of most pcs at that level of processor tbf
flint idol
it'd be fucked to the point where it'd probably not actually work at all
oh no
oh no
uncut narwhal
yeah lol probs not worth in this case
flint idol
i just had a terrible idea
uncut narwhal
oh?
flint idol
if i could somehow
nvm it wouldn't work
i'd need an extra address line
my idea would be to have the I/O port be the flag somehow
idk how to explain it
anyway i wired the PIC unit in my schematic
it's relatively simple compared to the others
uncut narwhal
its almost like its designed to integrate lol
flint idol
lol
like all i needed to do was NAND A8 and IO/M, throw that in #CS, then hook up the address, data, #RD, and #WR lines
and i was done
as well as #INTR and #INTA
it has IRn pins which are all connected to ground rn (because of a lack of IRQ sources)
im gonna use the rest of the space on the breadboard for the UART module
im gonna use the 16550
uncut narwhal
the classic
flint idol
yup
i might just rip off some other 16550 UART circuit tbh
i have no clue what half these pins do
uncut narwhal
check the data sheet maybe? theyve usually got example circuits
uncut narwhal
oh so you dont need NANDs?
uncut narwhal
yeah for sure
flint idol
I can just tie CS2# low, CS0 to IO/M, and CS1 to A9 (0x200 is the I/O address of the UART in my thing)
this also means i can get a PIT timer in since i won't need to buy a new NAND chip
uncut narwhal
nice
flint idol
oh damn
i need an extra inverter
for the uart module
ugh i was gonna buy two just in case but i changed my mind last minute
i can use the extra NAND gates as NOT gates
and my extra NOR gates
neat
i need 7 inverters
now what happens when i actually need the NAND gates for NAND stuff?
i make my own inverter
uncut narwhal
lol
flint idol
my school has a decent amount of transistors so a few disappearing wouldn't be noticed lmao
uncut narwhal
lmao
flint idol
i might seriously start using transistors when i run out of gates completely
like an inverter is just one transistor
but i am short on funds
lol
uncut narwhal
for gates more complex than an inverter i wouldnt tbh
ttl is way more complex than the basic transistor setups and single transistors you grab from the bin will be slower
flint idol
idk ig it depends on how desperately i need the logic
flint idol
ttl is way more complex than the basic transistor setups and single transistors ...
i see
well i'll figure it out when i run out NAND gates
uncut narwhal
well i'll figure it out when i run out NAND gates
specifically TTL uses transistors with multiple collectors
which dont exist discrete except for this one legacy thing from the 60s called an INCH
that isnt made anymore
theres a good curiousmarc video where he managed to get some INCHes and actually built a TTL nand from scratch and its wild how much of a pain he had getting it running even remotely fast
flint idol
i see well thanks
uncut narwhal
(for inverters its probably fine tho. one transistor will be ok)
flint idol
ok after school i will be making the circuit actually feasible to build and work
and by that i mean
i'll be adding in resistors and capacitors wherever needed and making sure the thing is powered properly
and this will be after i finish the UART unit and possibly a 16x2 LCD unit
aka this thing
i'll use it as a basic logger
mmmmm breadboard
also my teacher is letting me take breadboards
lean glen
mmmmm breadboard
they're expensive but I recommend getting proper quality breadboards
the BB830 ones are good
flint idol
i've already pushed my budget enough unfortunately
i can't spend 82 CAD on all the breadboards i'd need
as the circuit needs 6 breadboards so far
7 if i add the lcd unit, possibly
flint idol
i ordered my ROM chip
concluding all the materials i will need for this project
now i just need to play the waiting game
and finish the circuit
weary hound
i hate the waiting game
flint idol
same
weary hound
i am currently waiting for pcbs to arrive
flint idol
😔
i had an idea for my ROM module
since i am not using some address lines
i might use them to be able to store multiple programs at once in the flash
and then i'll have it configurable with some sort of switch panel to choose the program to use
giving me space for 8 programs in one rom
(i have 512KiB split into 64K)
the memory map for the thing is 0 through 0x10'000 RAM, 0x10'000-0xf0'000 reserved, and ROM covers the rest of the physical address space
weary hound
huh, from earlier descriptions it sounded like you were doing partial decoding
where the same stuff is mirrored 2^N times across the address space
flint idol
well i am
so that would happen
since it's just AND(A16-A19) = ROM CS
but i say reserved because i didn't think about that before
weary hound
ah no i thought you meant that A16-A19 would be completely unconnected on the cpu side
so 0x0.... would be mirrored at 0x1...., 0x2...., 0x3...., etc up to 0xf....
flint idol
ah no
flint idol
since it's just AND(A16-A19) = ROM CS
(IO/M is also included in this logic to differentiate between memory space access and io space accesses)
flint idol
i might underclock the i8088
as 24mHZ on a breadboard doesn't sound very uh
healthy
and i asked clanker to calculate my max current draw for the circuit
and it says 850mA
which cannot possibly be safe cuz the breadboards are rated for 1A
but idk if that's a problem
flint idol
so i took a small break from wiring the circuit
and i am now setting up an ia16-elf gcc environment and script
targetting my system
ENTRY(_entry)
SECTIONS
{
. = 0x00000;
.bss : { *(.bss) *(.bss.*) *(COMMON) }
/DISCARD/ :
{
*(.data)
*(.data*)
}
. = 0xf0000;
.text : { *(.text) *(.text.*) }
.rodata : { *(.rodata) *(.rodata.*) }
. = 0xffff0;
.rstvec : { *(.rstvec) }
/DISCARD/ : { *(*) }
}```
this is my linker scripti discard .data because i can't have initialized RW data in the flash, and i can't have initialized data in RAM when this is the "firmware" of sorts
ENTRY(_entry)
SECTIONS
{
. = 0x00000;
.ivt : {*(.ivt)}
. = 0x00400;
_bss_begin = .;
.bss : { *(.bss) *(.bss.*) *(COMMON) }
. = ALIGN(4);
_bss_end = .;
. = 0x0E000;
.stack : {*(.stack)}
. = 0x10000;
/DISCARD/ :
{
*(.data)
*(.data*)
}
. = 0xf0000;
.text : { *(.text) *(.text.*) }
.rodata : { *(.rodata) *(.rodata.*) }
. = 0xffff0;
.rstvec : { *(.rstvec) }
/DISCARD/ : { *(*) }
}```
this is my final linker script, for now, probably(for the breadboard i8088 thing)
i added some sections for the stack and IVT so the linker doesn't define anything there
and symbols for bss start and end so the allocator can know where it can allocate stuff
and the allocator will be interesting to write, if i ever do write one
i can't do a slab allocator as i dont have the concept of pages (i think, and even if i did, i don't have enough pages)
so ill have to write some other silly allocator
weary hound
i discard .data because i can't have initialized RW data in the flash, and i can...
you can do something like this to tell the linker the data lives in ram, but has to be loaded at runtime from rom ```
MEMORY {
ram (rwx) : ORIGIN = 0x00000, LENGTH = 64k
rom (rx) : ORIGIN = 0xf0000, LENGTH = 64k
}
SECTIONS {
.text : { ... } >rom
.data : {
__data_start = .;
*(.data .data.*)
__data_end = .;
. = ALIGN(4);
} >ram AT >rom
__data_loadaddr = LOADADDR(.data);
}
```, then just memcpy(&__data_loadaddr, &__data_start, &__data_end - &__data_start); or such
flint idol
you can do something like this to tell the linker the data lives in ram, but has...
no but thanks anyways lol
weary hound
no problem
flint idol
with qookie's inspiration, i have spit out this abomination:
i have the third memory region "rst" so that the linker spits out the reset vector at the right offset
(.text+0xf): relocation truncated to fit: R_386_16 against symbol `__data_loadaddr' defined in *ABS* section in bin/rom.elf
wait
this linker script can't work
cuz the linker has no idea what a segment is
i probably shouldn't be doing any of this in C
at least, not the memcpy
i also need to put rodata in RAM
i did NOT know real-mode assembly was that annoying
"no, let's not let him use sp as an effective address"
trim bay
yeah it's rather restrictive
flint idol
void *memcpy_far(void* dest, uint16_t es, const void *src, uint16_t ds, size_t len);
I added a memcpy_far
and also i am now linking with --noinhibit-exec
flint idol
```
(.text+0xf): relocation truncated to fit: R_386_16 against symbol `__data_lo...
to force finishing the link even with relocation errors like this
real mode C my behated
i added these too:
void set_ds(uint16_t segment);
void set_es(uint16_t segment);```idk if they're really going to be useful
weary hound
doesn't ia16-gcc give you access to far pointers directly from the language?
with the __far qualifier and MK_FP
flint idol
oh it does
hmm
ia16-elf-ld: R_386_OZSEG16 or R_386_OZRELSEG16 for symbol with no output section
flint idol
const char __far* lol = "hello";
char cpy[6] = {};
memcpy(cpy, lol, 6);```
well the compiler isn't quite emitting the code for this rightit emits
f0045: 57 push di ; di is 0x6
f0046: 16 push ss
f0047: b8 00 08 mov ax,0x800
f004a: 50 push ax
f004b: 16 push ss
f004c: 56 push si
f004d: e8 44 00 call f0094 <memcpy>
which uses ss for the rodata variable
which isn't correct cuz rodata is in 0xf0000
and ss is zero
so like
the segments are wrong
nshit
trim bay
what code model are you compiling for?
as in -mcmodel
it might be assuming cs = ds = ss
flint idol
small
trim bay
yeah I'm pretty sure the small code model is supposed to be single-segment
uncut narwhal
thatll do it lmao
flint idol
f0029: 8d 76 fa lea si,[bp-0x6]
f002c: bf 06 00 mov di,0x6
f002f: 57 push di
f0030: 06 push es
f0031: 56 push si
f0032: e8 73 00 call f00a8 <memset>
f0035: 57 push di
f0036: 16 push ss
f0037: b8 49 01 mov ax,0x149
f003a: 50 push ax
f003b: 16 push ss
f003c: 56 push si
f003d: e8 44 00 call f0084 <memcpy>
it spits this out now
which lgtm
hexdumping the ROM binary does indeed put my "hello" literal at 0xf000:0x149
wait
it still pushes ss
uncut narwhal
memset might just be using the segment registers
without needing to push them
idk maybe check the asm of memcpy?
flint idol
000f00a8 <memset>:
f00a8: 55 push bp
f00a9: 89 e5 mov bp,sp
f00ab: c5 46 04 lds ax,DWORD PTR [bp+0x4]
f00ae: 8b 4e 0a mov cx,WORD PTR [bp+0xa]
f00b1: 49 dec cx
f00b2: 74 0c je f00c0 <memset+0x18>
f00b4: 89 c3 mov bx,ax
f00b6: 8a 56 08 mov dl,BYTE PTR [bp+0x8]
f00b9: 36 88 17 mov BYTE PTR ss:[bx],dl
f00bc: 43 inc bx
f00bd: 49 dec cx
f00be: 75 f6 jne f00b6 <memset+0xe>
f00c0: 8c da mov dx,ds
f00c2: 5d pop bp
f00c3: 16 push ss
f00c4: 1f pop ds
f00c5: c3 ret```000f0084 <memcpy>:
f0084: 56 push si
f0085: 55 push bp
f0086: 89 e5 mov bp,sp
f0088: c5 46 06 lds ax,DWORD PTR [bp+0x6]
f008b: 8b 76 0a mov si,WORD PTR [bp+0xa]
f008e: 8b 4e 0e mov cx,WORD PTR [bp+0xe]
f0091: 49 dec cx
f0092: 74 0d je f00a1 <memcpy+0x1d>
f0094: 89 c3 mov bx,ax
f0096: 36 8a 14 mov dl,BYTE PTR ss:[si]
f0099: 36 88 17 mov BYTE PTR ss:[bx],dl
f009c: 43 inc bx
f009d: 46 inc si
f009e: 49 dec cx
f009f: 75 f5 jne f0096 <memcpy+0x12>
f00a1: 8c da mov dx,ds
f00a3: 5d pop bp
f00a4: 5e pop si
f00a5: 16 push ss
f00a6: 1f pop ds
f00a7: c3 ret```no it doesn't look like these change the segment registers
uncut narwhal
is using ss tho
flint idol
ye
if i just put rodata in the .data segment actually
that fixes it
because ss refers to RAM
unfortunate that i have to include read only data in RAM, but it is what it is
flint idol
local man writes PIC code for real mode
what happens next is shocking
wait
noise on the data bus in the INTA sequence
can cause the cpu to get invalid IRQ vectors
from the PIC
(let's hope that doesn't happen)
real pecan
from the PIC
is there like an integrated pic there?
flint idol
wdym
flint idol
its a separate chip yes
real pecan
did u actually buy it
flint idol
yes
flint idol
i don't know when it will arrive
flint idol
lmao
i also am getting my logic and ram chips monday
they are in my city rn they just need to be delivered
my rom chips are coming soon too
flint idol
my rom chips are coming soon too
around thursday
at the earliest
then the 8088 and 8284 are coming mid-may
and finally the 16550 uart is arriving the 8th of may
the thing will be assembled late may hopefully
uncut narwhal
nice
flint idol
i have infinite jumper wires since my tech teacher said use what u need
(he's a good teacher)
hopefully i'll have enough capacitors and resistors
and a good power supply
i need 1A to drive this
i forgot to mention i'm going to be adding a 16x2 lcd unit
for debugging probably
uncut narwhal
how are you hooking it up? I'm curious
uncut narwhal
no I meant how are you hooking up the lcd
flint idol
not i2c
flint idol
oh io ports
uncut narwhal
cool
flint idol
yea
i should make a thread for this project
in non os project report
follow pls
flint idol
my UART module might be slightly broken
(just a bit)
as i give it an 8mHZ clock
but that's not standard
so the divisor register has to be changed accordingly
in programs using the UART
but the uart cannot produce a comprehensible baud rate at 8mHZ
oops
im gonna have to fix that
wait that's the wrong thread
uncut narwhal
lmao
flint idol
dead project icl
maybe eventually ill do something for this
but rn i have gained some sort of social life
still working on my 8088 breadboard computer tho
coarse elk
but rn i have gained some sort of social life
sadly many such cases
cedar geyser
but rn i have gained some sort of social life
flint idol
https://tenor.com/view/incrediboy-incredibles-poster-throw-syndrome-gif-17947237...
i'm still working on my 8088 breadboard computer