#Makefiles in C
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In unix,
if i type gcc -o main main.c reminder.c linked_list.c interact.c, I get an executable called main
when I ran it with ./main, it worked perfectly fine
I double checked,
- interact.c uses interact.h, reminder.h
- linked_list.c uses linked_list.h
- main.c uses reminder.h, interact.h
- reminder.c uses reminder.h, linked_list.h
But everytime I type make main in unix, I get these long errors
Which completely don't make sense to me.
Why are you compiling like that? I.e. why are you first compiling each file individually to a shared object and then try to link them together (which is where your approach stops working).
Just do:
gcc -o main main.c interact.c reminder.c linked_list.c
Why do you want to do this linking process manually?
*Also btw, I don't think your Makefile would compile the files to shared objects first, i.e. it would just try to brainlessly take the existing shared objects, without recompiling beforehand, though tbh I'm not 100% sure about this.
Regardless, here's how I like to do it if I'm manually writing my Makefiles.
CC ?= gcc
CFLAGS = -O3 -Wall -Wextra -Wconversion
CFLAGS_DEBUG = -O0 -g3 -Wall -Wextra -Wconversion -fsanitize=address,undefined
.PHONY: debug, release
debug: main.c interact.c reminder.c linked_list.c
$(CC) $(CFLAGS_DEBUG) -o $@ $^
release: main.c interact.c reminder.c linked_list.c
$(CC) $(CFLAGS) -o $@ $^
What .PHONY does you may ask? Well, I really don't know, I can just tell you what google tells you:
A phony target is one that is not really the name of a file; rather it is just a name for a recipe to be executed when you make an explicit request. There are two reasons to use a phony target: to avoid a conflict with a file of the same name, and to improve performance.
Now I know that in Makefiles you're supposed to write like <program_name>: <program_files> but I've honestly never used it like that as I always just use it with .PHONY ๐ , basically just creating myself shorter aliases for more complicated commands.
Btw, if you wonder what $@ and $^ do:
$@ evaluates to the rule's name, i.e. in this case debug or release and $^ evaluates to the entire list of files after the :, i.e. in this case main.c interact.c reminder.c linked_list.c
Hi! Sorry i just saw this
We dont cover much of this in class, and the only slide my professor showed me was like that
I will try to understand your method, but I will also try to do it in the way my prof taught --
thank you so much by the way
its just quite odd that when I run both of our make files, unix throws the same exact error
maybe its a problem with my c files..
@granite igloo Has your question been resolved? If so, type !solved :)
Can heavily recommend to give this a read: https://makefiletutorial.com/
But yeah, typically you wouldn't be writing your own Makefiles though, typically you would use a meta-build system like CMake which would then generate the Makefiles/Ninja files/files for whatever build tool you use, for you
I definitely will
thank you so much for your time
either way
have an amazing night
u 2