🚀CODE FOR HARDWARE: ROCm Challenge🚀 | AMD Developer Community | Page 1

balmy hazel Dec 19, 2025, 4:33 AM

#

We’re kicking off a fun (and very real) way to turn open-source contributions into hardware rewards.
AMD is giving away 20 Strix Halo laptops (128GB) to developers who help squash bugs in the PyTorch or vLLM ROCm backlogs.

Here’s how it works:

Pick issues from the PyTorch or vLLM ROCm backlogs
Submit and merge 10 PRs
Post your merged PRs to claim a Strix Halo 128GB laptop

Start squashing 🐛

No fluff. Just code, impact, and serious hardware. Let’s build. 💻

pliant garnet Dec 22, 2025, 10:23 PM

#

I love this challenge, it's great. Baked five PRs, one's merged so far (others are going) and resolved 13 issues, are we expected to make 10 PRs no matter the size or resolve 10 ISSUES instead? Just wanted to clarify

pliant garnet Dec 22, 2025, 10:40 PM

#

@balmy hazel Sorry for not pinging the first time, realized very belatedly
Regarding the 13 fixed issues (this is merged right now): https://github.com/pytorch/pytorch/pull/170849

GitHub

[ROCm] Enable 13 stale-skipped tests in test_cuda.py by FIM43-Redey...

This PR enables 13 tests in test_cuda.py that were skipped for ROCm but now pass.
Changes
TestBlockStateAbsorption (11 tests)
Remove TEST_WITH_ROCM from the class-level skip. Memory checkpoint pool...

naive pike Dec 23, 2025, 2:48 AM

#

@balmy hazel Thanks for the opportunity. Here is my PR that addresses 10 tickets: https://github.com/pytorch/pytorch/pull/171152

GitHub

[ROCm] unskip matmul, MHA, flex attention tests by curvedinf · Pul...

Passing rocm tests unskipped

DISABLED test_return_aux_deprecation_warnings_cuda_float16 (main.TestFlexAttentionCUDA) #162464 DISABLED test_return_aux_deprecation_warnings_cuda_float16 — DISABL...

pliant garnet Dec 23, 2025, 6:54 PM

#

Two more merged PRs, resolving eight issues total
https://github.com/pytorch/pytorch/pull/170850
https://github.com/pytorch/pytorch/pull/170826

GitHub

[ROCm] Enable device-side assertion tests on ROCm by FIM43-Redeye ...

This PR enables 4 tests that verify device-side assertion behavior on ROCm.
Background
ROCm can be built with TORCH_USE_HIP_DSA=1 to enable proper device-side assertions. Without this flag, ROCm ra...

GitHub

[ROCm] Enable CUDA graph tests on ROCm by FIM43-Redeye · Pull Requ...

ROCm has supported CUDA graphs in some capacity since ROCm 4.5.2 and absolutely seems to support it now. Remove the TEST_WITH_ROCM exclusion from graph tests that now pass. test_graph_timing is muc...

pliant garnet Dec 25, 2025, 1:27 AM

#

Never mind, in touch with Anush about it, all's well - thanks again for this great contest!

pastel galleon Jan 30, 2026, 9:52 AM

#

balmy hazel We’re kicking off a fun (and very real) way to turn open-source contributions in...

Hi, is this challenge still running?

empty hornet Feb 3, 2026, 2:51 AM

#

while not VLLM or Pytorch related, I did create a PR to get bitsandbytes compiling on Windows for AMD

https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1846. The hard part seems to be getting code owners to review it 🙂

GitHub

Build software better, together

GitHub is where people build software. More than 150 million people use GitHub to discover, fork, and contribute to over 420 million projects.

inland slate Apr 3, 2026, 9:55 PM

#

Got TRELLIS.2 running end-to-end on my 9070 XT — full textured GLB export at 512 and 1024.

Also found a platform bug while working on this: torch.mm produces data-dependent NaN when input exceeds ~500K rows on gfx1201. Same data computes correctly in 100K chunks or on CPU. Will file on the ROCm repo with a reproducer.

#🚀CODE FOR HARDWARE: ROCm Challenge🚀