I'm using an ESP32 Wroom32 S3, i've been trying to get the I2S bus working in ESPIDF 5.5 to some of my gpio pins as fast parallel outputs. What is going on? Am I architecturally getting something wrong?
static esp_lcd_i80_bus_handle_t i80_bus = nullptr;
static esp_lcd_panel_io_handle_t io_handle = nullptr;
uint8_t pattern_over_time[] = {
0b11111100, // pad 2 LSBs for 8-bit alignment
0b00000000,
0b11111100,
0b00000000
};
const size_t pattern_len = sizeof(pattern_over_time);
void setup_i80() {
esp_lcd_i80_bus_config_t bus_config = {};
bus_config.wr_gpio_num = (gpio_num_t)PIN_WR;
bus_config.dc_gpio_num = (gpio_num_t)PIN_DC;
bus_config.data_gpio_nums[0] = PIN_D0;
bus_config.data_gpio_nums[1] = PIN_D1;
bus_config.data_gpio_nums[2] = PIN_D2;
bus_config.data_gpio_nums[3] = PIN_D3;
bus_config.data_gpio_nums[4] = PIN_D4;
bus_config.data_gpio_nums[5] = PIN_D5;
bus_config.data_gpio_nums[6] = GPIO_NUM_NC; // NC pins for 8-bit width
bus_config.data_gpio_nums[7] = GPIO_NUM_NC;
bus_config.bus_width = 8; // Must be 8 for DMA to work
bus_config.clk_src = LCD_CLK_SRC_PLL160M;
bus_config.max_transfer_bytes = 4096;
ESP_ERROR_CHECK(esp_lcd_new_i80_bus(&bus_config, &i80_bus));
esp_lcd_panel_io_i80_config_t io_config = {};
io_config.cs_gpio_num = GPIO_NUM_NC;
io_config.pclk_hz = 2000000; // 2 MHz for scope
io_config.trans_queue_depth = 2;
io_config.lcd_cmd_bits = 8;
io_config.lcd_param_bits = 8;
ESP_ERROR_CHECK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handle));
}
void write_pattern() {
// DMA works now because bus width is 8
ESP_ERROR_CHECK(esp_lcd_panel_io_tx_param(io_handle, 0, pattern_over_time, pattern_len));
}
extern "C" void app_main() {
setup_i80();
while (1) {
write_pattern();
vTaskDelay(pdMS_TO_TICKS(200)); // small delay for DMA
}
}