#Variable width multiplier with high and low outputs

3 messages · Page 1 of 1 (latest)

atomic nexus
#

I've verified it works for 8 bit inputs, but it should also work for 16 and 32 bit inputs. It probably doesn't work for 64 bit inputs yet since that will require it to use the following things which may or may not be broken.

  • 128 bit delay lines
  • 128 bit lsl
  • 128 bit mux
  • 128 bit switch
  • 65 bit neg
  • 65 bit mux
  • 63, 65 -> 128 concatenator
  • 64, 64 -> 128 concatenator

The top input is the start input which tells the multiplier to read in the 2 inputs below it and multiply them. It will not start multiplying until the start input is turned off. You can interrupt the multiply by starting a new multiply.

The 2nd from the bottom input is the size input which you use to tell the multiplier if you're doing an 8, 16, 32, or 64 bit multiply (obviously requires the A and B inputs to be at least as large as that for it to work properly).

The bottom input tells the multiplier whether or not the multiply is signed or unsigned.

The top output is the busy output which is on when the multiplier is doing a multiply and off when it's finished with a multiply. The output below that is the lower half of the outer and the bottom output is the upper half of the output.

While this circuit does use a double width accumulator and sign extends the B input so that it's double length, it will take at most b + 1 ticks to perform the multiply where b is the bit width of the A input.

NOTE: The multiplier assumes and enforces that the A and B inputs have the same width. If the widths differ, it will assume they're both the larger of the 2 widths wide

#

The whole section on the right from the delay line (exclusive) to the concatenator (inclusive) is purely for adjusting the result when A < 0 and the only bit set for B is the MSB so that signed multiplies work correctly.