#512 bit vpshufb only acting on first 128

1 messages · Page 1 of 1 (latest)

fresh sail
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As @shuffle requires a comptime known mask, attempting to shuffle as follows:

const ByteVector = @vector(std.simd.suggestVectorLength(u8) orelse @panic(), u8);

fn shuffle(src: Byte~~Vector, mask: ByteVector) ByteVector {
    std.debug.print(~~"\nmask={}\n", .{mask});
    std.debug.print("src={}\n", .{src});

    const res = asm ("vpshufb %[mask], %[src], %[dst]"
        : [dst] "=x" (-> ByteVector),
        : [src] "x" (src),
          [mask] "x" (mask),
    );

    std.debug.print("shuffled={}\n", .{res});

    return res;
}

On my device, the suggested vector length is 64 bytes, which makes sense as my cpu is supporting AVX512, and std.Target.x86.featureSetHas(builtin.cpu.features, .avx512f) returns true

However, this is an example output of the above shuffle:

mask={ 0, 13, 10, 13, 0, 13, 0, 13, 0, 13, 10, 13, 0, 13, 0, 13, 0, 13, 10, 13, 0, 13, 0, 13, 0, 13, 10, 13, 0, 13, 0, 13, 0, 13, 10, 13, 0, 13, 0, 13, 0, 13, 10, 13, 0, 13, 0, 13, 0, 13, 10, 13, 0, 13, 0, 13, 0, 13, 10, 13, 0, 13, 0, 13 }
src={ 65, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 239, 32, 71, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
shuffled={ 65, 71, 252, 71, 65, 71, 65, 71, 65, 71, 252, 71, 65, 71, 65, 71, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }

The shuffle only operated on the first 16 bytes, not the full 64

godbolt confirms that the above function should generate a 512 bit shuffle if avx512 is supported as can see use of zmmword: https://godbolt.org/z/jGG7Mr7oY

Anyone have any idea as to what the issue is here? been stuck on this for a while now

Compiler Explorer - Zig (zig 0.11.0)

const ByteVector = @Vector(64, u8);

export fn shuffle(src: ByteVector, mask: ByteVector) ByteVector {

return asm ("vpshufb %[mask], %[src], %[dst]"
    : [dst] "=x" (-> ByteVector),
    : [src] "x" (src),
      [mask] "x" (mask),
);

}

signal bramble
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I mean that's just how x86_64 works

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a 512-bit vshufb is identical to 4 parallel 128-bit vshufb operations

fresh sail
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but it has only done 1 128bit op here, not 4? or am i misunderstanding

signal bramble
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the input of the other 3 operations was all zeros, so the output must therefore be all zeros

fresh sail
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oh i get it

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ok need to just broadcast the first 16 bytes then

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thanks