weary saddle
Since I started to resolve bugs in HW v1, I need advice on the HW for the next version.
Kicad project is here.
Bugs fixed:
weary saddle
V1 was "full featured". All possible features were included. So USART1 is also in a separate port (and was used for debugging).
For V2, I'm resolving problems and try to simplify. Ie. I'll remove the UART1 separate port since UART1 will be used for split transport.
For référence, I join the v1 schematics
weary saddle
New version v2 being routed:
solemn reef
At a super quick first glance, I’d suggest some minor things if you want to simplify some stuff, like consolidating resistor values to reduce BOM lines
Like, the 43k and 82k resistor divider could be 43k and 43k+43k
solemn reef
I'd also suggest adding an SPI flash, for future expansion reasons
would strongly suggest doing USB-C split instead of micro, too
weary saddle
Thank for your advice. I'll check for space for SPI flash but SPI currently used for SK6805 RGB matrix without CS. So this will be complicated for the V2.
Is there any reason the 256KB of internal flash won't be enough?
For USB-C split, I think it will be more problematic. I don't want user to use it by error and connect it to host.
USB microB is also very easy to do for hobbyist and 5 pins micro B male connector easy to find to made custom link cable
(and avoid short-circuit problem the TRRS have)
