#It s the DMA controller that does the

1 messages · Page 1 of 1 (latest)

sleek notch
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This is a great example. I want to drive 6 displays. I think it should be possible. Each PIO can hold 16 bits of data.

karmic bay
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If you make the technique work I'd love to hear about it!

sleek notch
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Me too.

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If you could chain interrupts so that the first PIO puts the lower 8 bits on the bus, then the higher and then triggers the next to do the same...

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The forth could just strobe the grid.

karmic bay
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OSR can hold 32 bits, which is more than 4*7. So for a 4-digit display like I used you just have to have code that says something like:

  • non-destructively copy next 7 bits of OSR (this part seems tricky but I think it can be done) to X
  • copy X to pins and side-set the digit select
  • unroll that loop manually to 4 copies, one for each digit
  • and pull noblock to grab next data if available
    however I don't see how this would scale up to 6 displays/digits. I think you can side-set max 5 pins (so you can't select enough digits if you do it by side-set) and the registers can't store as many bits as you have total segments.
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maybe you can somehow shuffle data among OSR, ISR, X and Y to get 64 or 96 effective bits, I'm too tired to think it through. And put a very small amount of external logic (like a 1-of-8 multiplexer?) to turn a smaller number of side-set pins into the digit select using binary