Same logic circuit can produce 2 different results. For example, this attached image of XOR binary counter (0,0) connected to 1-tick pulse clock.
If you attempt to rebuild this counter starting at state (0,0) you will get one of the 2 possible results after 1-tick pulse:
- counter state will be (1,0) and most people will expect that.
- counter state will be (1,1) and most people will probably not expect that.
This can be easily changed by removing and placing again left XOR or GATE and depending on which one you replaced last, you get one of the results above.
Since there is no way of knowing what will happen by just looking at the circuit, I believe it is a bug.
Also I think order of placement shouldn't matter for logic gates.
Edit: Better wording.